[i2c.h] Inter-Integrated Circuit

Functions
void	I2CMasterInitExpClk (uint32_t ui32Base, uint32_t ui32I2CClk, bool bFast)
	Initializes the I2C Master block. More...
static void	I2CMasterControl (uint32_t ui32Base, uint32_t ui32Cmd)
	Controls the state of the I2C Master module. More...
static void	I2CMasterSlaveAddrSet (uint32_t ui32Base, uint8_t ui8SlaveAddr, bool bReceive)
	Sets the address that the I2C Master will place on the bus. More...
static void	I2CMasterEnable (uint32_t ui32Base)
	Enables the I2C Master block. More...
static void	I2CMasterDisable (uint32_t ui32Base)
	Disables the I2C master block. More...
static bool	I2CMasterBusy (uint32_t ui32Base)
	Indicates whether or not the I2C Master is busy. More...
static bool	I2CMasterBusBusy (uint32_t ui32Base)
	Indicates whether or not the I2C bus is busy. More...
static uint32_t	I2CMasterDataGet (uint32_t ui32Base)
	Receives a byte that has been sent to the I2C Master. More...
static void	I2CMasterDataPut (uint32_t ui32Base, uint8_t ui8Data)
	Transmits a byte from the I2C Master. More...
uint32_t	I2CMasterErr (uint32_t ui32Base)
	Gets the error status of the I2C Master module. More...
static void	I2CMasterIntEnable (uint32_t ui32Base)
	Enables the I2C Master interrupt. More...
static void	I2CMasterIntDisable (uint32_t ui32Base)
	Disables the I2C Master interrupt. More...
static void	I2CMasterIntClear (uint32_t ui32Base)
	Clears I2C Master interrupt sources. More...
static bool	I2CMasterIntStatus (uint32_t ui32Base, bool bMasked)
	Gets the current I2C Master interrupt status. More...
static void	I2CSlaveEnable (uint32_t ui32Base)
	Enables the I2C Slave block. More...
static void	I2CSlaveInit (uint32_t ui32Base, uint8_t ui8SlaveAddr)
	Initializes the I2C Slave block. More...
static void	I2CSlaveAddressSet (uint32_t ui32Base, uint8_t ui8SlaveAddr)
	Sets the I2C slave address. More...
static void	I2CSlaveDisable (uint32_t ui32Base)
	Disables the I2C slave block. More...
static uint32_t	I2CSlaveStatus (uint32_t ui32Base)
	Gets the I2C Slave module status. More...
static uint32_t	I2CSlaveDataGet (uint32_t ui32Base)
	Receives a byte that has been sent to the I2C Slave. More...
static void	I2CSlaveDataPut (uint32_t ui32Base, uint8_t ui8Data)
	Transmits a byte from the I2C Slave. More...
static void	I2CSlaveIntEnable (uint32_t ui32Base, uint32_t ui32IntFlags)
	Enables individual I2C Slave interrupt sources. More...
static void	I2CSlaveIntDisable (uint32_t ui32Base, uint32_t ui32IntFlags)
	Disables individual I2C Slave interrupt sources. More...
static void	I2CSlaveIntClear (uint32_t ui32Base, uint32_t ui32IntFlags)
	Clears I2C Slave interrupt sources. More...
static uint32_t	I2CSlaveIntStatus (uint32_t ui32Base, bool bMasked)
	Gets the current I2C Slave interrupt status. More...
void	I2CIntRegister (uint32_t ui32Base, void(*pfnHandler)(void))
	Registers an interrupt handler for the I2C module in the dynamic interrupt table. More...
void	I2CIntUnregister (uint32_t ui32Base)
	Unregisters an interrupt handler for the I2C module in the dynamic interrupt table. More...

Detailed Description

Introduction

The Inter-Integrated Circuit (I²C) API provides a set of functions for using the CC26xx I²C master and slave module. Functions are provided to perform the following actions:

• Initialize the I²C module.
• Send and receive data.
• Obtain status.
• Manage interrupts for the I²C module.

The I²C master and slave module provide the ability to communicate to other IC devices over an I²C bus. The I²C bus is specified to support devices that can both transmit and receive (write and read) data. Also, devices on the I²C bus can be designated as either a master or a slave. The CC26xx I²C module supports both sending and receiving data as either a master or a slave, and also support the simultaneous operation as both a master and a slave. Finally, the CC26xx I²C module can operate at two speeds: standard (100 kb/s) and fast (400 kb/s).

The master and slave I²C module can generate interrupts. The I²C master module generates interrupts when a transmit or receive operation completes (or aborts due to an error). The I²C slave module can generate interrupts when data is sent or requested by a master and when a START or STOP condition is present.

Master Operations

When using this API to drive the I²C master module, the user must first initialize the I²C master module with a call to I2CMasterInitExpClk(). This function sets the bus speed and enables the master module.

The user may transmit or receive data after the successful initialization of the I²C master module. Data is transferred by first setting the slave address using I2CMasterSlaveAddrSet(). This function is also used to define whether the transfer is a send (a write to the slave from the master) or a receive (a read from the slave by the master). Then, if connected to an I²C bus that has multiple masters, the CC26xx I²C master must first call I2CMasterBusBusy() before trying to initiate the desired transaction. After determining that the bus is not busy, if trying to send data, the user must call the I2CMasterDataPut() function. The transaction can then be initiated on the bus by calling the I2CMasterControl() function with any of the following commands:

• I2C_MASTER_CMD_SINGLE_SEND
• I2C_MASTER_CMD_SINGLE_RECEIVE
• I2C_MASTER_CMD_BURST_SEND_START
• I2C_MASTER_CMD_BURST_RECEIVE_START

Any of these commands result in the master arbitrating for the bus, driving the start sequence onto the bus, and sending the slave address and direction bit across the bus. The remainder of the transaction can then be driven using either a polling or interrupt-driven method.

For the single send and receive cases, the polling method involves looping on the return from I2CMasterBusy(). Once the function indicates that the I²C master is no longer busy, the bus transaction is complete and can be checked for errors using I2CMasterErr(). If there are no errors, then the data has been sent or is ready to be read using I2CMasterDataGet(). For the burst send and receive cases, the polling method also involves calling the I2CMasterControl() function for each byte transmitted or received (using either the I2C_MASTER_CMD_BURST_SEND_CONT or I2C_MASTER_CMD_BURST_RECEIVE_CONT commands), and for the last byte sent or received (using either the I2C_MASTER_CMD_BURST_SEND_FINISH or I2C_MASTER_CMD_BURST_RECEIVE_FINISH commands).

If any error is detected during the burst transfer, the appropriate stop command (I2C_MASTER_CMD_BURST_SEND_ERROR_STOP or I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP) should be used to call the I2CMasterControl() function.

For the interrupt-driven transaction, the user must register an interrupt handler for the I²C devices and enable the I²C master interrupt; the interrupt occurs when the master is no longer busy.

Slave Operations

When using this API to drive the I²C slave module, the user must first initialize the I²C slave module with a call to I2CSlaveInit(). This function enables the I²C slave module and initializes the address of the slave. After the initialization completes, the user may poll the slave status using I2CSlaveStatus() to determine if a master requested a send or receive operation. Depending on the type of operation requested, the user can call I2CSlaveDataPut() or I2CSlaveDataGet() to complete the transaction. Alternatively, the I²C slave can handle transactions using an interrupt handler registered with I2CIntRegister(), and by enabling the I²C slave interrupt.

API

The I²C API is broken into three groups of functions: those that handle status and initialization, those that deal with sending and receiving data, and those that deal with interrupts.

Status and initialization functions for the I²C module are:

• I2CMasterInitExpClk()
• I2CMasterEnable()
• I2CMasterDisable()
• I2CMasterBusBusy()
• I2CMasterBusy()
• I2CMasterErr()
• I2CSlaveInit()
• I2CSlaveEnable()
• I2CSlaveDisable()
• I2CSlaveStatus()

Sending and receiving data from the I²C module is handled by the following functions:

• I2CMasterSlaveAddrSet()
• I2CSlaveAddressSet()
• I2CMasterControl()
• I2CMasterDataGet()
• I2CMasterDataPut()
• I2CSlaveDataGet()
• I2CSlaveDataPut()

The I²C master and slave interrupts are handled by the following functions:

• I2CIntRegister()
• I2CIntUnregister()
• I2CMasterIntEnable()
• I2CMasterIntDisable()
• I2CMasterIntClear()
• I2CMasterIntStatus()
• I2CSlaveIntEnable()
• I2CSlaveIntDisable()
• I2CSlaveIntClear()
• I2CSlaveIntStatus()

Function Documentation

void I2CIntRegister	(	uint32_t	ui32Base,
		void(*)(void)	pfnHandler
	)

Registers an interrupt handler for the I2C module in the dynamic interrupt table.

Note

Only use this function if you want to use the dynamic vector table (in SRAM)!

This function registers a function as the interrupt handler for a specific interrupt and enables the corresponding interrupt in the interrupt controller.

Specific I2C interrupts must be enabled via I2CMasterIntEnable() and I2CSlaveIntEnable(). If necessary, it is the interrupt handler's responsibility to clear the interrupt source via I2CMasterIntClear() and I2CSlaveIntClear().

Parameters

ui32Base	is the base address of the I2C Master module.
pfnHandler	is a pointer to the function to be called when the I2C interrupt occurs.

Returns

None

See also

IntRegister() for important information about registering interrupt handlers.

{
    uint32_t ui32Int;

    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Get the interrupt number.
    ui32Int = INT_I2C_IRQ;

    // Register the interrupt handler, returning an error if an error occurs.
    IntRegister(ui32Int, pfnHandler);

    // Enable the I2C interrupt.
    IntEnable(ui32Int);
}

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void I2CIntUnregister

(

uint32_t

ui32Base

)

Unregisters an interrupt handler for the I2C module in the dynamic interrupt table.

This function will clear the handler to be called when an I2C interrupt occurs. This will also mask off the interrupt in the interrupt controller so that the interrupt handler no longer is called.

Parameters

ui32Base

is the base address of the I2C Master module.

Returns

None

See also

IntRegister() for important information about registering interrupt handlers.

{
    uint32_t ui32Int;

    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Get the interrupt number.
    ui32Int = INT_I2C_IRQ;

    // Disable the interrupt.
    IntDisable(ui32Int);

    // Unregister the interrupt handler.
    IntUnregister(ui32Int);
}

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static bool I2CMasterBusBusy ( uint32_t  ui32Base )

inlinestatic

Indicates whether or not the I2C bus is busy.

This function returns an indication of whether or not the I2C bus is busy. This function can be used in a multi-master environment to determine if another master is currently using the bus.

Parameters

ui32Base

is the base address of the I2C module.

Returns

Returns status of the I2C bus:

• true : I2C bus is busy.
• false : I2C bus is not busy.

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Return the bus busy status.
    if(HWREG(I2C0_BASE + I2C_O_MSTAT) & I2C_MSTAT_BUSBSY)
    {
        return(true);
    }
    else
    {
        return(false);
    }
}

static bool I2CMasterBusy ( uint32_t  ui32Base )

inlinestatic

Indicates whether or not the I2C Master is busy.

This function returns an indication of whether or not the I2C Master is busy transmitting or receiving data.

Parameters

ui32Base

is the base address of the I2C module.

Returns

Returns status of I2C Master:

• true : I2C Master is busy.
• false : I2C Master is not busy.

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Return the busy status.
    if(HWREG(I2C0_BASE + I2C_O_MSTAT) & I2C_MSTAT_BUSY)
    {
        return(true);
    }
    else
    {
        return(false);
    }
}

static void I2CMasterControl ( uint32_t  ui32Base, uint32_t  ui32Cmd  )

inlinestatic

Controls the state of the I2C Master module.

This function is used to control the state of the Master module send and receive operations.

Parameters

ui32Base

is the base address of the I2C module.

ui32Cmd

is the command to be issued by the I2C Master module The parameter can be one of the following values: I2C_MASTER_CMD_SINGLE_SEND I2C_MASTER_CMD_SINGLE_RECEIVE I2C_MASTER_CMD_BURST_SEND_START I2C_MASTER_CMD_BURST_SEND_CONT I2C_MASTER_CMD_BURST_SEND_FINISH I2C_MASTER_CMD_BURST_SEND_ERROR_STOP I2C_MASTER_CMD_BURST_RECEIVE_START I2C_MASTER_CMD_BURST_RECEIVE_CONT I2C_MASTER_CMD_BURST_RECEIVE_FINISH I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP

Returns

None

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));
    ASSERT((ui32Cmd == I2C_MASTER_CMD_SINGLE_SEND) ||
    //     (ui32Cmd == I2C_MASTER_CMD_SINGLE_RECEIVE) || -> Equal to SINGLE_SEND
           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_START) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_CONT) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_FINISH) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_SEND_ERROR_STOP) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_START) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_CONT) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_FINISH) ||
           (ui32Cmd == I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP));

    // Send the command.
    HWREG(I2C0_BASE + I2C_O_MCTRL) = ui32Cmd;

    // Delay minimum four cycles in order to ensure that the I2C_O_MSTAT
    // register has been correctly updated before function exit
    CPUdelay(2);
}

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static uint32_t I2CMasterDataGet ( uint32_t  ui32Base )

inlinestatic

Receives a byte that has been sent to the I2C Master.

This function reads a byte of data from the I2C Master Data Register.

Parameters

ui32Base

is the base address of the I2C module.

Returns

Returns the byte received from by the I2C Master, cast as an uint32_t.

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Read a byte.
    return(HWREG(I2C0_BASE + I2C_O_MDR));
}

static void I2CMasterDataPut ( uint32_t  ui32Base, uint8_t  ui8Data  )

inlinestatic

Transmits a byte from the I2C Master.

This function will place the supplied data into I2C Master Data Register.

Parameters

ui32Base	is the base address of the I2C module.
ui8Data	is the data to be transmitted by the I2C Master

Returns

None

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Write the byte.
    HWREG(I2C0_BASE + I2C_O_MDR) = ui8Data;
}

static void I2CMasterDisable ( uint32_t  ui32Base )

inlinestatic

Disables the I2C master block.

This will disable operation of the I2C master block.

Parameters

ui32Base

is the base address of the I2C module.

Returns

None

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Disable the master block.
    HWREG(I2C0_BASE + I2C_O_MCTRL) = 0;

    // Disable the clock for the master.
    HWREGBITW(I2C0_BASE + I2C_O_MCR, I2C_MCR_MFE_BITN) = 0;
}

static void I2CMasterEnable ( uint32_t  ui32Base )

inlinestatic

Enables the I2C Master block.

This will enable operation of the I2C Master block.

Parameters

ui32Base

is the base address of the I2C module.

Returns

None

Referenced by I2CMasterInitExpClk().

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Enable the clock for the master.
    HWREGBITW(I2C0_BASE + I2C_O_MCR, I2C_MCR_MFE_BITN) = 1;

    // Enable the master block.
    HWREG(I2C0_BASE + I2C_O_MCTRL) = I2C_MCTRL_RUN;
}

uint32_t I2CMasterErr

(

uint32_t

ui32Base

)

Gets the error status of the I2C Master module.

This function is used to obtain the error status of the Master module send and receive operations.

Parameters

ui32Base

is the base address of the I2C module.

Returns

Returns the error status of the Master module:

• I2C_MASTER_ERR_NONE
• I2C_MASTER_ERR_ADDR_ACK
• I2C_MASTER_ERR_DATA_ACK
• I2C_MASTER_ERR_ARB_LOST

{
    uint32_t ui32Err;

    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Get the raw error state.
    ui32Err = HWREG(I2C0_BASE + I2C_O_MSTAT);

    // If the I2C master is busy, then all the other status bits are invalid,
    // and there is no error to report.
    if(ui32Err & I2C_MSTAT_BUSY)
    {
        return(I2C_MASTER_ERR_NONE);
    }

    // Check for errors.
    if(ui32Err & (I2C_MSTAT_ERR | I2C_MSTAT_ARBLST))
    {
        return(ui32Err & (I2C_MSTAT_ARBLST | I2C_MSTAT_DATACK_N | I2C_MSTAT_ADRACK_N));
    }
    else
    {
        return(I2C_MASTER_ERR_NONE);
    }
}

void I2CMasterInitExpClk	(	uint32_t	ui32Base,
		uint32_t	ui32I2CClk,
		bool	bFast
	)

Initializes the I2C Master block.

This function initializes operation of the I2C Master block. Upon successful initialization of the I2C block, this function will have set the bus speed for the master, and will have enabled the I2C Master block.

If the parameter bFast is true, then the master block will be set up to transfer data at 400 kbps; otherwise, it will be set up to transfer data at 100 kbps.

Parameters

ui32Base	is the base address of the I2C module.
ui32I2CClk	is the rate of the clock supplied to the I2C module.
bFast	set up for fast data transfers.

Returns

None

{
    uint32_t ui32SCLFreq;
    uint32_t ui32TPR;

    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Must enable the device before doing anything else.
    I2CMasterEnable(I2C0_BASE);

    // Get the desired SCL speed.
    if(bFast == true)
    {
        ui32SCLFreq = 400000;
    }
    else
    {
        ui32SCLFreq = 100000;
    }

    // Compute the clock divider that achieves the fastest speed less than or
    // equal to the desired speed. The numerator is biased to favor a larger
    // clock divider so that the resulting clock is always less than or equal
    // to the desired clock, never greater.
    ui32TPR = ((ui32I2CClk + (2 * 10 * ui32SCLFreq) - 1) / (2 * 10 * ui32SCLFreq)) - 1;
    HWREG(I2C0_BASE + I2C_O_MTPR) = ui32TPR;
}

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static void I2CMasterIntClear ( uint32_t  ui32Base )

inlinestatic

Clears I2C Master interrupt sources.

The I2C Master interrupt source is cleared, so that it no longer asserts. This must be done in the interrupt handler to keep it from being called again immediately upon exit.

Note

Due to write buffers and synchronizers in the system it may take several clock cycles from a register write clearing an event in a module and until the event is actually cleared in the NVIC of the system CPU. It is recommended to clear the event source early in the interrupt service routine (ISR) to allow the event clear to propagate to the NVIC before returning from the ISR. At the same time, an early event clear allows new events of the same type to be pended instead of ignored if the event is cleared later in the ISR. It is the responsibility of the programmer to make sure that enough time has passed before returning from the ISR to avoid false re-triggering of the cleared event. A simple, although not necessarily optimal, way of clearing an event before returning from the ISR is:

1. Write to clear event (interrupt source). (buffered write)
2. Dummy read from the event source module. (making sure the write has propagated)
3. Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)

Parameters

ui32Base

is the base address of the I2C module.

Returns

None

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Clear the I2C master interrupt source.
    HWREG(I2C0_BASE + I2C_O_MICR) = I2C_MICR_IC;
}

static void I2CMasterIntDisable ( uint32_t  ui32Base )

inlinestatic

Disables the I2C Master interrupt.

Disables the I2C Master interrupt source.

Parameters

ui32Base

is the base address of the I2C module.

Returns

None

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Disable the master interrupt.
    HWREG(I2C0_BASE + I2C_O_MIMR) = 0;
}

static void I2CMasterIntEnable ( uint32_t  ui32Base )

inlinestatic

Enables the I2C Master interrupt.

Enables the I2C Master interrupt source.

Parameters

ui32Base

is the base address of the I2C module.

Returns

None

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Enable the master interrupt.
    HWREG(I2C0_BASE + I2C_O_MIMR) = I2C_MIMR_IM;
}

static bool I2CMasterIntStatus ( uint32_t  ui32Base, bool  bMasked  )

inlinestatic

Gets the current I2C Master interrupt status.

This returns the interrupt status for the I2C Master module. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Parameters

ui32Base	is the base address of the I2C Master module.
bMasked	selects either raw or masked interrupt status. false : Raw interrupt status is requested. true : Masked interrupt status is requested.

Returns

Returns the current interrupt status.

• true : Active.
• false : Not active.

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Return either the interrupt status or the raw interrupt status as
    // requested.
    if(bMasked)
    {
        return((HWREG(I2C0_BASE + I2C_O_MMIS)) ? true : false);
    }
    else
    {
        return((HWREG(I2C0_BASE + I2C_O_MRIS)) ? true : false);
    }
}

static void I2CMasterSlaveAddrSet ( uint32_t  ui32Base, uint8_t  ui8SlaveAddr, bool  bReceive  )

inlinestatic

Sets the address that the I2C Master will place on the bus.

This function will set the address that the I2C Master will place on the bus when initiating a transaction. When the bReceive parameter is set to true, the address will indicate that the I2C Master is initiating a read from the slave; otherwise the address will indicate that the I2C Master is initiating a write to the slave.

Parameters

ui32Base	is the base address of the I2C module.
ui8SlaveAddr	is a 7-bit slave address
bReceive	flag indicates the type of communication with the slave. true : I2C Master is initiating a read from the slave. false : I2C Master is initiating a write to the slave.

Returns

None

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));
    ASSERT(!(ui8SlaveAddr & 0x80));

    // Set the address of the slave with which the master will communicate.
    HWREG(I2C0_BASE + I2C_O_MSA) = (ui8SlaveAddr << 1) | bReceive;
}

static void I2CSlaveAddressSet ( uint32_t  ui32Base, uint8_t  ui8SlaveAddr  )

inlinestatic

Sets the I2C slave address.

This function writes the specified slave address.

Parameters

ui32Base	is the base address of the I2C Slave module.
ui8SlaveAddr	is the 7-bit slave address

Returns

None.

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));
    ASSERT(!(ui8SlaveAddr & 0x80));

    // Set up the primary slave address.
    HWREG(I2C0_BASE + I2C_O_SOAR) = ui8SlaveAddr;
}

static uint32_t I2CSlaveDataGet ( uint32_t  ui32Base )

inlinestatic

Receives a byte that has been sent to the I2C Slave.

This function reads a byte of data from the I2C Slave Data Register.

Parameters

ui32Base

is the base address of the I2C Slave module.

Returns

Returns the byte received from by the I2C Slave, cast as an uint32_t.

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Read a byte.
    return(HWREG(I2C0_BASE + I2C_O_SDR));
}

static void I2CSlaveDataPut ( uint32_t  ui32Base, uint8_t  ui8Data  )

inlinestatic

Transmits a byte from the I2C Slave.

This function will place the supplied data into I2C Slave Data Register.

Parameters

ui32Base	is the base address of the I2C Slave module.
ui8Data	data to be transmitted from the I2C Slave.

Returns

None

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Write the byte.
    HWREG(I2C0_BASE + I2C_O_SDR) = ui8Data;
}

static void I2CSlaveDisable ( uint32_t  ui32Base )

inlinestatic

Disables the I2C slave block.

This will disable operation of the I2C slave block.

Parameters

ui32Base

is the base address of the I2C Slave module.

Returns

None

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Disable the slave.
    HWREG(I2C0_BASE + I2C_O_SCTL) = 0x0;

    // Disable the clock to the slave block.
    HWREGBITW(I2C0_BASE + I2C_O_MCR, I2C_MCR_SFE_BITN) = 0;
}

static void I2CSlaveEnable ( uint32_t  ui32Base )

inlinestatic

Enables the I2C Slave block.

This will enable operation of the I2C Slave block.

Parameters

ui32Base

is the base address of the I2C Slave module.

Returns

None

Referenced by I2CSlaveInit().

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Enable the clock to the slave block.
    HWREGBITW(I2C0_BASE + I2C_O_MCR, I2C_MCR_SFE_BITN) = 1;

    // Enable the slave.
    HWREG(I2C0_BASE + I2C_O_SCTL) = I2C_SCTL_DA;
}

static void I2CSlaveInit ( uint32_t  ui32Base, uint8_t  ui8SlaveAddr  )

inlinestatic

Initializes the I2C Slave block.

This function initializes operation of the I2C Slave block. Upon successful initialization of the I2C blocks, this function will have set the slave address and have enabled the I2C Slave block.

The parameter ui8SlaveAddr is the value that will be compared against the slave address sent by an I2C master.

Parameters

ui32Base	is the base address of the I2C Slave module.
ui8SlaveAddr	is the 7-bit slave address.

Returns

None

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));
    ASSERT(!(ui8SlaveAddr & 0x80));

    // Must enable the device before doing anything else.
    I2CSlaveEnable(I2C0_BASE);

    // Set up the slave address.
    HWREG(I2C0_BASE + I2C_O_SOAR) = ui8SlaveAddr;
}

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static void I2CSlaveIntClear ( uint32_t  ui32Base, uint32_t  ui32IntFlags  )

inlinestatic

Clears I2C Slave interrupt sources.

The specified I2C Slave interrupt sources are cleared, so that they no longer assert. This must be done in the interrupt handler to keep it from being called again immediately upon exit.

Note

Due to write buffers and synchronizers in the system it may take several clock cycles from a register write clearing an event in a module and until the event is actually cleared in the NVIC of the system CPU. It is recommended to clear the event source early in the interrupt service routine (ISR) to allow the event clear to propagate to the NVIC before returning from the ISR. At the same time, an early event clear allows new events of the same type to be pended instead of ignored if the event is cleared later in the ISR. It is the responsibility of the programmer to make sure that enough time has passed before returning from the ISR to avoid false re-triggering of the cleared event. A simple, although not necessarily optimal, way of clearing an event before returning from the ISR is:

1. Write to clear event (interrupt source). (buffered write)
2. Dummy read from the event source module. (making sure the write has propagated)
3. Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)

Parameters

ui32Base	is the base address of the I2C module.
ui32IntFlags	is a bit mask of the interrupt sources to be cleared. The parameter is the bitwise OR of any of the following: I2C_SLAVE_INT_STOP I2C_SLAVE_INT_START I2C_SLAVE_INT_DATA

Returns

None

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Clear the I2C slave interrupt source.
    HWREG(I2C0_BASE + I2C_O_SICR) = ui32IntFlags;
}

static void I2CSlaveIntDisable ( uint32_t  ui32Base, uint32_t  ui32IntFlags  )

inlinestatic

Disables individual I2C Slave interrupt sources.

Disables the indicated I2C Slave interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters

ui32Base	is the base address of the I2C Slave module.
ui32IntFlags	is the bit mask of the interrupt sources to be disabled. The parameter is the bitwise OR of any of the following: I2C_SLAVE_INT_STOP I2C_SLAVE_INT_START I2C_SLAVE_INT_DATA

Returns

None

{
    uint32_t ui32Val;

    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));
    ASSERT(ui32IntFlags & (I2C_SLAVE_INT_STOP | I2C_SLAVE_INT_START |
                           I2C_SLAVE_INT_DATA));

    // Disable the slave interrupt.
    ui32Val = HWREG(I2C0_BASE + I2C_O_SIMR);
    ui32Val &= ~ui32IntFlags;
    HWREG(I2C0_BASE + I2C_O_SIMR) = ui32Val;
}

static void I2CSlaveIntEnable ( uint32_t  ui32Base, uint32_t  ui32IntFlags  )

inlinestatic

Enables individual I2C Slave interrupt sources.

Enables the indicated I2C Slave interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters

ui32Base	is the base address of the I2C module.
ui32IntFlags	is the bit mask of the slave interrupt sources to be enabled. The parameter is the bitwise OR of any of the following: I2C_SLAVE_INT_STOP I2C_SLAVE_INT_START I2C_SLAVE_INT_DATA

Returns

None

{
    uint32_t ui32Val;

    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));
    ASSERT(ui32IntFlags & (I2C_SLAVE_INT_STOP | I2C_SLAVE_INT_START |
                           I2C_SLAVE_INT_DATA));

    // Enable the slave interrupt.
    ui32Val = HWREG(I2C0_BASE + I2C_O_SIMR);
    ui32Val |= ui32IntFlags;
    HWREG(I2C0_BASE + I2C_O_SIMR) = ui32Val;
}

static uint32_t I2CSlaveIntStatus ( uint32_t  ui32Base, bool  bMasked  )

inlinestatic

Gets the current I2C Slave interrupt status.

This returns the interrupt status for the I2C Slave module. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Parameters

ui32Base	is the base address of the I2C Slave module.
bMasked	selects either raw or masked interrupt status. false : Raw interrupt status is requested. true : Masked interrupt status is requested.

Returns

Returns the current interrupt status as an OR'ed combination of:

• I2C_SLAVE_INT_STOP
• I2C_SLAVE_INT_START
• I2C_SLAVE_INT_DATA

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Return either the interrupt status or the raw interrupt status as
    // requested.
    if(bMasked)
    {
        return(HWREG(I2C0_BASE + I2C_O_SMIS));
    }
    else
    {
        return(HWREG(I2C0_BASE + I2C_O_SRIS));
    }
}

static uint32_t I2CSlaveStatus ( uint32_t  ui32Base )

inlinestatic

Gets the I2C Slave module status.

This function will return the action requested from a master, if any.

Parameters

ui32Base

is the base address of the I2C Slave module.

Returns

Returns the status of the I2C Slave module:

• I2C_SLAVE_ACT_NONE : No action has been requested of the I2C Slave module.
• I2C_SLAVE_ACT_RREQ : An I2C master has sent data to the I2C Slave module.
• I2C_SLAVE_ACT_TREQ : An I2C master has requested that the I2C Slave module send data.
• I2C_SLAVE_ACT_RREQ_FBR : An I2C master has sent data to the I2C slave and the first byte following the slave's own address has been received.

{
    // Check the arguments.
    ASSERT(I2CBaseValid(ui32Base));

    // Return the slave status.
    return(HWREG(I2C0_BASE + I2C_O_SSTAT));
}

Macro Definition Documentation

#define I2C_MASTER_CMD_BURST_RECEIVE_CONT   0x00000009

Referenced by I2CMasterControl().

#define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP   0x00000004

Referenced by I2CMasterControl().

#define I2C_MASTER_CMD_BURST_RECEIVE_FINISH   0x00000005

Referenced by I2CMasterControl().

#define I2C_MASTER_CMD_BURST_RECEIVE_START   0x0000000b

Referenced by I2CMasterControl().

#define I2C_MASTER_CMD_BURST_SEND_CONT   0x00000001

Referenced by I2CMasterControl().

#define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP   0x00000004

Referenced by I2CMasterControl().

#define I2C_MASTER_CMD_BURST_SEND_FINISH   0x00000005

Referenced by I2CMasterControl().

#define I2C_MASTER_CMD_BURST_SEND_START   0x00000003

Referenced by I2CMasterControl().

#define I2C_MASTER_CMD_SINGLE_RECEIVE   0x00000007

#define I2C_MASTER_CMD_SINGLE_SEND   0x00000007

Referenced by I2CMasterControl().

#define I2C_MASTER_ERR_ADDR_ACK   0x00000004

#define I2C_MASTER_ERR_ARB_LOST   0x00000010

#define I2C_MASTER_ERR_DATA_ACK   0x00000008

#define I2C_MASTER_ERR_NONE   0

Referenced by I2CMasterErr().

#define I2C_SLAVE_ACT_NONE   0

#define I2C_SLAVE_ACT_RREQ   0x00000001

#define I2C_SLAVE_ACT_RREQ_FBR   0x00000005

#define I2C_SLAVE_ACT_TREQ   0x00000002

#define I2C_SLAVE_INT_DATA   0x00000001

Referenced by I2CSlaveIntDisable(), and I2CSlaveIntEnable().

#define I2C_SLAVE_INT_START   0x00000002

Referenced by I2CSlaveIntDisable(), and I2CSlaveIntEnable().

#define I2C_SLAVE_INT_STOP   0x00000004

Referenced by I2CSlaveIntDisable(), and I2CSlaveIntEnable().