CC26xx Driver Library
setup.c File Reference
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_adi.h"
#include "../inc/hw_adi_2_refsys.h"
#include "../inc/hw_adi_3_refsys.h"
#include "../inc/hw_aon_ioc.h"
#include "../inc/hw_aon_sysctl.h"
#include "../inc/hw_aon_wuc.h"
#include "../inc/hw_aux_wuc.h"
#include "../inc/hw_ccfg.h"
#include "../inc/hw_fcfg1.h"
#include "../inc/hw_flash.h"
#include "../inc/hw_prcm.h"
#include "../inc/hw_vims.h"
#include "aon_wuc.h"
#include "aux_wuc.h"
#include "chipinfo.h"
#include "setup.h"
#include "setup_rom.h"

Macros

#define CPU_DELAY_MICRO_SECONDS(x)   CPUdelay(((uint32_t)((( x ) * 48.0 ) / 5.0 )) - 1 )
 

Functions

static void TrimAfterColdReset (void)
 Trims to be applied when coming from PIN_RESET. More...
 
static void TrimAfterColdResetWakeupFromShutDown (uint32_t ui32Fcfg1Revision)
 Trims to be applied when coming from SHUTDOWN (also called when coming from PIN_RESET). More...
 
static void TrimAfterColdResetWakeupFromShutDownWakeupFromPowerDown (void)
 Trims to be applied when coming from POWER_DOWN (also called when coming from SHUTDOWN and PIN_RESET). More...
 
void SetupTrimDevice (void)
 Performs the necessary trim of the device which is not done in boot code. More...
 

Macro Definition Documentation

#define CPU_DELAY_MICRO_SECONDS (   x)    CPUdelay(((uint32_t)((( x ) * 48.0 ) / 5.0 )) - 1 )

Function Documentation

static void TrimAfterColdReset ( void  )
static

Trims to be applied when coming from PIN_RESET.

Returns
None

Referenced by SetupTrimDevice().

353 {
354  // Currently no specific trim for Cold Reset
355 }
static void TrimAfterColdResetWakeupFromShutDown ( uint32_t  ui32Fcfg1Revision)
static

Trims to be applied when coming from SHUTDOWN (also called when coming from PIN_RESET).

Parameters
ui32Fcfg1Revision
Returns
None

Referenced by SetupTrimDevice().

246 {
247  uint32_t ccfg_ModeConfReg ;
248  uint32_t mp1rev ;
249 
250  // Force AUX on and enable clocks
251  //
252  // No need to save the current status of the power/clock registers.
253  // At this point both AUX and AON should have been reset to 0x0.
254  HWREG(AON_WUC_BASE + AON_WUC_O_AUXCTL) = AON_WUC_AUXCTL_AUX_FORCE_ON;
255 
256  // Wait for power on on the AUX domain
257  while( ! ( HWREGBITW( AON_WUC_BASE + AON_WUC_O_PWRSTAT, AON_WUC_PWRSTAT_AUX_PD_ON_BITN )));
258 
259  // Enable the clocks for AUX_DDI0_OSC and AUX_ADI4
260  HWREG(AUX_WUC_BASE + AUX_WUC_O_MODCLKEN0) = AUX_WUC_MODCLKEN0_AUX_DDI0_OSC |
261  AUX_WUC_MODCLKEN0_AUX_ADI4;
262 
263  // It's found to be optimal to override the FCFG1..DCDC_IPEAK setting as follows:
264  // if ( alternative DCDC setting in CCFG is enabled ) ADI3..IPEAK = CCFG..DCDC_IPEAK
265  // else ADI3..IPEAK = 2
266  if (( HWREG( CCFG_BASE + CCFG_O_SIZE_AND_DIS_FLAGS ) & CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING ) == 0 ) {
267  // ADI_3_REFSYS:DCDCCTL5[3] (=DITHER_EN) = CCFG_MODE_CONF_1[19] (=ALT_DCDC_DITHER_EN)
268  // ADI_3_REFSYS:DCDCCTL5[2:0](=IPEAK ) = CCFG_MODE_CONF_1[18:16](=ALT_DCDC_IPEAK )
269  // Using a single 4-bit masked write since layout is equal for both source and destination
270  HWREGB( ADI3_BASE + ADI_O_MASK4B + ( ADI_3_REFSYS_O_DCDCCTL5 * 2 )) = ( 0xF0 |
271  ( HWREG( CCFG_BASE + CCFG_O_MODE_CONF_1 ) >> CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_S ));
272 
273  } else {
274  HWREGB( ADI3_BASE + ADI_O_MASK4B + ( ADI_3_REFSYS_O_DCDCCTL5 * 2 )) = 0x72;
275  }
276 
277  //
278  // Enable for JTAG to be powered down (will still be powered on if debugger is connected)
280 
281  // read the MODE_CONF register in CCFG
282  ccfg_ModeConfReg = HWREG( CCFG_BASE + CCFG_O_MODE_CONF );
283 
284  // First part of trim done after cold reset and wakeup from shutdown:
285  // -Adjust the VDDR_TRIM_SLEEP value.
286  // -Configure DCDC.
287  SetupAfterColdResetWakeupFromShutDownCfg1( ccfg_ModeConfReg );
288 
289  // Second part of trim done after cold reset and wakeup from shutdown:
290  // -Configure XOSC.
291 #if ( CCFG_BASE == CCFG_BASE_DEFAULT )
292  SetupAfterColdResetWakeupFromShutDownCfg2( ui32Fcfg1Revision, ccfg_ModeConfReg );
293 #else
294  NOROM_SetupAfterColdResetWakeupFromShutDownCfg2( ui32Fcfg1Revision, ccfg_ModeConfReg );
295 #endif
296 
297  // Increased margin between digital supply voltage and VDD BOD during standby.
298  // VTRIM_UDIG: signed 4 bits value to be incremented by 2 (max = 7)
299  // VTRIM_BOD: unsigned 4 bits value to be decremented by 1 (min = 0)
300  // This applies to chips with mp1rev < 542 for cc13x0 and for mp1rev < 527 for cc26x0
301  mp1rev = (( HWREG( FCFG1_BASE + FCFG1_O_TRIM_CAL_REVISION ) & FCFG1_TRIM_CAL_REVISION_MP1_M ) >>
302  FCFG1_TRIM_CAL_REVISION_MP1_S ) ;
303  if ( mp1rev < 527 ) {
304  uint32_t ldoTrimReg = HWREG( FCFG1_BASE + FCFG1_O_BAT_RC_LDO_TRIM );
305  uint32_t vtrim_bod = (( ldoTrimReg & FCFG1_BAT_RC_LDO_TRIM_VTRIM_BOD_M ) >>
306  FCFG1_BAT_RC_LDO_TRIM_VTRIM_BOD_S ); // bit[27:24] unsigned
307  uint32_t vtrim_udig = (( ldoTrimReg & FCFG1_BAT_RC_LDO_TRIM_VTRIM_UDIG_M ) >>
308  FCFG1_BAT_RC_LDO_TRIM_VTRIM_UDIG_S ); // bit[19:16] signed but treated as unsigned
309  if ( vtrim_bod > 0 ) {
310  vtrim_bod -= 1;
311  }
312  if ( vtrim_udig != 7 ) {
313  if ( vtrim_udig == 6 ) {
314  vtrim_udig = 7;
315  } else {
316  vtrim_udig = (( vtrim_udig + 2 ) & 0xF );
317  }
318  }
319  HWREGB( ADI2_BASE + ADI_2_REFSYS_O_SOCLDOCTL0 ) =
320  ( vtrim_udig << ADI_2_REFSYS_SOCLDOCTL0_VTRIM_UDIG_S ) |
321  ( vtrim_bod << ADI_2_REFSYS_SOCLDOCTL0_VTRIM_BOD_S ) ;
322  }
323 
324  // Third part of trim done after cold reset and wakeup from shutdown:
325  // -Configure HPOSC.
326  // -Setup the LF clock.
327 #if ( CCFG_BASE == CCFG_BASE_DEFAULT )
328  SetupAfterColdResetWakeupFromShutDownCfg3( ccfg_ModeConfReg );
329 #else
330  NOROM_SetupAfterColdResetWakeupFromShutDownCfg3( ccfg_ModeConfReg );
331 #endif
332 
333  // Allow AUX to power down
335 
336  // Leaving on AUX and clock for AUX_DDI0_OSC on but turn off clock for AUX_ADI4
337  HWREG( AUX_WUC_BASE + AUX_WUC_O_MODCLKEN0 ) = AUX_WUC_MODCLKEN0_AUX_DDI0_OSC;
338 
339  // Disable EFUSE clock
340  HWREGBITW( FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_EFUSECLK_BITN ) = 1;
341 }
#define AUX_WUC_POWER_DOWN
Definition: aux_wuc.h:95
void AUXWUCPowerCtrl(uint32_t ui32PowerMode)
Control the power to the AUX domain.
Definition: aux_wuc.c:254
void SetupAfterColdResetWakeupFromShutDownCfg3(uint32_t ccfg_ModeConfReg)
Third part of configuration required when waking up from shutdown.
Definition: setup_rom.c:277
void SetupAfterColdResetWakeupFromShutDownCfg1(uint32_t ccfg_ModeConfReg)
First part of configuration required when waking up from shutdown.
Definition: setup_rom.c:117
void SetupAfterColdResetWakeupFromShutDownCfg2(uint32_t ui32Fcfg1Revision, uint32_t ccfg_ModeConfReg)
Second part of configuration required when waking up from shutdown.
Definition: setup_rom.c:172
static void AONWUCJtagPowerOff(void)
Request power off of the JTAG domain.
Definition: aon_wuc.h:792

Here is the call graph for this function:

static void TrimAfterColdResetWakeupFromShutDownWakeupFromPowerDown ( void  )
static

Trims to be applied when coming from POWER_DOWN (also called when coming from SHUTDOWN and PIN_RESET).

Returns
None

Referenced by SetupTrimDevice().

230 {
231  // Currently no specific trim for Powerdown
232 }