Data Structures
struct	I2SControlTable
	A structure that defines an audio control table. Note: Memory for this structure must be initialized by user application. See detailed description! More...

Functions
void	I2SEnable (uint32_t ui32Base)
	Enables the I2S module for operation. More...

static void	I2SDisable (uint32_t ui32Base)
	Disables the I2S module for operation. More...

void	I2SAudioFormatConfigure (uint32_t ui32Base, uint32_t ui32FmtCfg, uint32_t ui32BitClkDelay)
	Configures the I2S module. More...

void	I2SChannelConfigure (uint32_t ui32Base, uint32_t ui32Chan0Cfg, uint32_t ui32Chan1Cfg)
	Setup the audio channel configuration. More...

static void	I2SClockConfigure (uint32_t ui32Base, uint32_t ui32ClkConfig)
	Configure the I2S frame clock. More...

void	I2SBufferConfig (uint32_t ui32Base, uint32_t ui32InBufBase, uint32_t ui32OutBufBase, uint16_t ui16DMABufSize, uint16_t ui16ChanBufSize)
	Set the input buffer pointers. More...

void	I2SPointerUpdate (uint32_t ui32Base, bool bInput)
	Update the buffer pointers. More...

void	I2SPointerSet (uint32_t ui32Base, bool bInput, void *pNextPointer)
	Set a buffer pointer (input or output) directly. More...

static void	I2SIntRegister (uint32_t ui32Base, void(*pfnHandler)(void))
	Registers an interrupt handler for an I2S interrupt in the dynamic interrupt table. More...

static void	I2SIntUnregister (uint32_t ui32Base)
	Unregisters an interrupt handler for a I2S interrupt in the dynamic interrupt table. More...

static void	I2SIntEnable (uint32_t ui32Base, uint32_t ui32IntFlags)
	Enables individual I2S interrupt sources. More...

static void	I2SIntDisable (uint32_t ui32Base, uint32_t ui32IntFlags)
	Disables individual I2S interrupt sources. More...

static uint32_t	I2SIntStatus (uint32_t ui32Base, bool bMasked)
	Gets the current interrupt status. More...

static void	I2SIntClear (uint32_t ui32Base, uint32_t ui32IntFlags)
	Clears I2S interrupt sources. More...

static void	I2SSampleStampEnable (uint32_t ui32Base)
	Enable the Sample Stamp generator. More...

static void	I2SSampleStampDisable (uint32_t ui32Base)
	Disable the Sample Stamp generator. More...

void	I2SSampleStampConfigure (uint32_t ui32Base, bool bInput, bool bOutput)
	Configure the sample stamp generator. More...

uint32_t	I2SSampleStampGet (uint32_t ui32Base, uint32_t ui32Channel)
	Get the current value of a sample stamp counter. More...

Variables
I2SControlTable *	g_pControlTable

Detailed Description

Function Documentation

void I2SAudioFormatConfigure	(	uint32_t	ui32Base,
		uint32_t	ui32FmtCfg,
		uint32_t	ui32BitClkDelay
	)

Configures the I2S module.

The word length defines the size of the word transmitted on the data lines. For single phased formats I2S_WORD_LENGTH_x is the exact number of bits per word. In dual phased format this is the maximum number of bits per word. The size is set using I2S_WORD_LENGTH_8, I2S_WORD_LENGTH_16 or I2S_WORD_LENGTH_24.

Parameters

ui32Base	is the I2S module base address.
ui32FmtCfg	is the bitwise OR of several options: Sample size: I2S_MEM_LENGTH_16 I2S_MEM_LENGTH_24 Clock edge sampling: I2S_POS_EDGE I2S_NEG_EDGE Phase: I2S_DUAL_PHASE_FMT I2S_SINGLE_PHASE_FMT Word length: I2S_WORD_LENGTH_8 I2S_WORD_LENGTH_16 I2S_WORD_LENGTH_24
ui32BitClkDelay	defines the bit clock delay by setting the number of bit clock periods between the positive word clock edge and the MSB of the first word in a phase. The bit clock delay is determined by the ratio between the bit clock and the frame clock and the chosen audio format. The bit clock delay must be configured depending on the chosen audio format: 0 : Left Justified Format (LJF). 1 : I2S and DSP format. 2-255 : Right Justified format (RJF).

Returns: None

See also: I2SChannelConfigure()

 {
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
     ASSERT(ui32BitClkDelay <= 255);
 
     // Save the length of the audio words stored in memory.
     g_pControlTable->ui16MemLen = (ui32FmtCfg & I2S_MEM_LENGTH_24) ? 24 : 16;
 
     // Write the configuration.
     HWREG(I2S0_BASE + I2S_O_AIFFMTCFG) = ui32FmtCfg | (ui32BitClkDelay << I2S_AIFFMTCFG_DATA_DELAY_S);
 }

void I2SBufferConfig	(	uint32_t	ui32Base,
		uint32_t	ui32InBufBase,
		uint32_t	ui32OutBufBase,
		uint16_t	ui16DMABufSize,
		uint16_t	ui16ChanBufSize
	)

Set the input buffer pointers.

The next pointer should always be written while the DMA is using the previous written pointer. If not written in time an I2S_INT_PTR_ERR will occur and all outputs will be disabled.

Note: At startup the next data pointer should be written just before and just after calling the I2SEnable().

Parameters

ui32Base	is the base address of the I2S module.
ui32InBufBase	is the address of the input buffer.
ui32OutBufBase	is the address of the output buffer.
ui16DMABufSize	is the size of the DMA buffers. Must be greater than 0!
ui16ChanBufSize	is the size of the channel buffers.

Returns: None

 {
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
     ASSERT(ui16DMABufSize > 0);
 
     // Setup the input data pointer and buffer sizes.
     g_pControlTable->ui16DMABufSize = ui16DMABufSize;
     g_pControlTable->ui16ChBufSize = ui16ChanBufSize;
     g_pControlTable->ui32InBase = ui32InBufBase;
     g_pControlTable->ui32OutBase = ui32OutBufBase;
 }

void I2SChannelConfigure	(	uint32_t	ui32Base,
		uint32_t	ui32Chan0Cfg,
		uint32_t	ui32Chan1Cfg
	)

Setup the audio channel configuration.

The channel configuration is a bitwise OR of the input/output mode of each data line and the active audio channels within a specific audio frame.

Setting up the input/output mode use one of:

For dual phased audio (LJF,RJF,I2S) only mono and stereo modes are allowed. For single phased audio format (DSP) up to 8 active channels are allowed on a single data line. For setting up the active channels in a frame use:

Single phased, use a bitwise OR'ed combination of:
Dual phased, use one of:
- I2S_MONO_MODE (same as I2S_CHAN0_ACT)
- I2S_STEREO_MODE (same as I2S_CHAN0_ACT | I2S_CHAN1_ACT)

Note: The audio format and the clock configuration should be set using I2SAudioFormatConfigure()

Parameters

ui32Base	is base address of the I2S module.
ui32Chan0Cfg	defines the channel configuration for data line 0.
ui32Chan1Cfg	defines the channel configuration for data line 1.

Returns: None

See also: I2SAudioFormatConfigure()

 {
     uint32_t ui32InChan;
     uint32_t ui32OutChan;
     uint32_t ui32ChanMask;
 
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
     ASSERT(ui32Chan0Cfg & (I2S_CHAN_CFG_MASK | I2S_LINE_MASK))
     ASSERT(ui32Chan1Cfg & (I2S_CHAN_CFG_MASK | I2S_LINE_MASK))
 
     ui32InChan = 0;
     ui32OutChan = 0;
 
     // Configure input/output channels.
     HWREG(I2S0_BASE + I2S_O_AIFDIRCFG) = (
         (( ui32Chan0Cfg << I2S_AIFDIRCFG_AD0_S) & I2S_AIFDIRCFG_AD0_M ) |
         (( ui32Chan1Cfg << I2S_AIFDIRCFG_AD1_S) & I2S_AIFDIRCFG_AD1_M )   );
 
     // Configure the valid channel mask.
     HWREG(I2S0_BASE + I2S_O_AIFWMASK0) = (ui32Chan0Cfg >> 8) & I2S_AIFWMASK0_MASK_M;
     HWREG(I2S0_BASE + I2S_O_AIFWMASK1) = (ui32Chan1Cfg >> 8) & I2S_AIFWMASK1_MASK_M;
 
     // Resolve and save the number of input and output channels.
     ui32ChanMask = (ui32Chan0Cfg & I2S_CHAN_CFG_MASK) >> 8;
     if(ui32Chan0Cfg & I2S_LINE_INPUT)
     {
         while(ui32ChanMask)
         {
             if(ui32ChanMask & 0x1)
             {
                 ui32InChan++;
             }
             // Shift down channel mask
             ui32ChanMask >>= 1;
         }
 
     }
     else if(ui32Chan0Cfg & I2S_LINE_OUTPUT)
     {
         while(ui32ChanMask)
         {
             if(ui32ChanMask & 0x1)
             {
                 ui32OutChan++;
             }
             // Shift down channel mask
             ui32ChanMask >>= 1;
         }
     }
 
     ui32ChanMask = (ui32Chan1Cfg & I2S_CHAN_CFG_MASK) >> 8;
     if(ui32Chan1Cfg & I2S_LINE_INPUT)
     {
         while(ui32ChanMask)
         {
             if(ui32ChanMask & 0x1)
             {
                 ui32InChan++;
             }
             // Shift down channel mask
             ui32ChanMask >>= 1;
         }
     }
     else if(ui32Chan1Cfg & I2S_LINE_OUTPUT)
     {
         while(ui32ChanMask)
         {
             if(ui32ChanMask & 0x1)
             {
                 ui32OutChan++;
             }
             // Shift down channel mask
             ui32ChanMask >>= 1;
         }
     }
 
     g_pControlTable->ui8InChan = (uint8_t)ui32InChan;
     g_pControlTable->ui8OutChan = (uint8_t)ui32OutChan;
 }

static void I2SClockConfigure	(	uint32_t	ui32Base,
		uint32_t	ui32ClkConfig
	)

inlinestatic

Configure the I2S frame clock.

Configure I2S clock to be either internal or external and either normal or inverted.

Note: The bit clock configuration is done externally, but the internal/ external setting must match what is chosen internally in the I2S module for the frame clock.

Parameters

ui32Base	is the base address of the I2S module.
ui32ClkConfig	is the clock configuration parameter. Bitwise OR'ed combination of clock source and clock polarity: Clock source: I2S_EXT_WCLK : External clock. I2S_INT_WCLK : Internal clock. Clock polarity: I2S_NORMAL_WCLK : Normal clock. I2S_INVERT_WCLK : Inverted clock.

Returns: None

 {
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
 
     // Setup register WCLK Source.
     HWREG(I2S0_BASE + I2S_O_AIFWCLKSRC) = ui32ClkConfig &
                                          (I2S_AIFWCLKSRC_WCLK_INV_M |
                                           I2S_AIFWCLKSRC_WCLK_SRC_M);
 }

static void I2SDisable ( uint32_t ui32Base )

inlinestatic

Disables the I2S module for operation.

This function will immediately disable the I2S module. To ensure that all buffer operations are completed before shutting down, the correct procedure is:

Do not update the data pointers using I2SPointerUpdate().
Await next interrupt resulting in I2S_INT_PTR_ERR.
Disable the I2S using I2SDisable() and clear the pointer error using I2SIntClear().
Disable bit clock source (done externally).

Parameters

ui32Base is the I2S module base address.

Returns: None

 {
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
 
     // Disable the I2S module.
     HWREG(I2S0_BASE + I2S_O_AIFDMACFG) = 0x0;
 }

void I2SEnable ( uint32_t ui32Base )

Enables the I2S module for operation.

Note: The module should only be enabled after configuration. When the module is disabled, no data or clocks will be generated on the I2S signals.; Immediately after enabling the module the programmer should update the DMA data pointer registers using I2SPointerUpdate() to ensure a new pointer is written before the DMA transfer completes. Failure to update the pointer in time will result in an I2S_INT_PTR_ERR.

Parameters

ui32Base is the I2S module base address.

Returns: None

 {
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
 
     // Make sure the control table pointer is setup to a memory location.
     if(!(g_pControlTable))
     {
         return;
     }
 
     // Write the address to the first input/output buffer.
     HWREG(I2S0_BASE + I2S_O_AIFINPTRNEXT) = g_pControlTable->ui32InBase;
     g_pControlTable->ui32InOffset = 0;
     HWREG(I2S0_BASE + I2S_O_AIFOUTPTRNEXT) = g_pControlTable->ui32OutBase;
     g_pControlTable->ui32OutOffset = 0;
 
     // Enable the I2S module.
     HWREG(I2S0_BASE + I2S_O_AIFDMACFG) = (uint32_t)g_pControlTable->ui16DMABufSize - 1;
 }

static void I2SIntClear	(	uint32_t	ui32Base,
		uint32_t	ui32IntFlags
	)

inlinestatic

Clears I2S interrupt sources.

The specified I2S interrupt sources are cleared, so that they no longer assert. This function must be called in the interrupt handler to keep the interrupt from being recognized again immediately upon exit.

Note

Due to write buffers and synchronizers in the system it may take several clock cycles from a register write clearing an event in a module and until the event is actually cleared in the NVIC of the system CPU. It is recommended to clear the event source early in the interrupt service routine (ISR) to allow the event clear to propagate to the NVIC before returning from the ISR. At the same time, an early event clear allows new events of the same type to be pended instead of ignored if the event is cleared later in the ISR. It is the responsibility of the programmer to make sure that enough time has passed before returning from the ISR to avoid false re-triggering of the cleared event. A simple, although not necessarily optimal, way of clearing an event before returning from the ISR is:

Write to clear event (interrupt source). (buffered write)
Dummy read from the event source module. (making sure the write has propagated)
Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)

Parameters

ui32Base	is the base address of the I2S port.
ui32IntFlags	is a bit mask of the interrupt sources to be cleared. The parameter is the bitwise OR of any of the following: I2S_INT_DMA_IN I2S_INT_DMA_OUT I2S_INT_TIMEOUT I2S_INT_BUS_ERR I2S_INT_WCLK_ERR I2S_INT_PTR_ERR I2S_INT_ALL (covers all the above)

Returns: None

 {
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
 
     // Clear the requested interrupt sources.
     HWREG(I2S0_BASE + I2S_O_IRQCLR) = ui32IntFlags;
 }

static void I2SIntDisable	(	uint32_t	ui32Base,
		uint32_t	ui32IntFlags
	)

inlinestatic

Disables individual I2S interrupt sources.

This function disables the indicated I2S interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters

ui32Base	is the base address of the I2S port.
ui32IntFlags	is the bit mask of the interrupt sources to be disabled. The parameter is the bitwise OR of any of the following: I2S_INT_DMA_IN I2S_INT_DMA_OUT I2S_INT_TIMEOUT I2S_INT_BUS_ERR I2S_INT_WCLK_ERR I2S_INT_PTR_ERR I2S_INT_ALL (covers all the above)

Returns: None.

 {
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
 
     // Disable the specified interrupts.
     HWREG(I2S0_BASE + I2S_O_IRQMASK) &= ~ui32IntFlags;
 }

static void I2SIntEnable	(	uint32_t	ui32Base,
		uint32_t	ui32IntFlags
	)

inlinestatic

Enables individual I2S interrupt sources.

This function enables the indicated I2S interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters

ui32Base	is the base address of the I2S port.
ui32IntFlags	is the bit mask of the interrupt sources to be enabled. The parameter is the bitwise OR of any of the following: I2S_INT_DMA_IN I2S_INT_DMA_OUT I2S_INT_TIMEOUT I2S_INT_BUS_ERR I2S_INT_WCLK_ERR I2S_INT_PTR_ERR I2S_INT_ALL (covers all the above)

Returns: None.

 {
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
 
     // Enable the specified interrupts.
     HWREG(I2S0_BASE + I2S_O_IRQMASK) |= ui32IntFlags;
 }

static void I2SIntRegister	(	uint32_t	ui32Base,
		void(*)(void)	pfnHandler
	)

inlinestatic

Registers an interrupt handler for an I2S interrupt in the dynamic interrupt table.

Note: Only use this function if you want to use the dynamic vector table (in SRAM)!

This function registers a function as the interrupt handler for a specific interrupt and enables the corresponding interrupt in the interrupt controller.

Specific I2S interrupts must be enabled via I2SIntEnable(). It is the interrupt handler's responsibility to clear the interrupt source.

Parameters

ui32Base	is the base address of the I2S module.
pfnHandler	is a pointer to the function to be called when the I2S interrupt occurs.

Returns: None

See also: IntRegister() for important information about registering interrupt handlers.

 {
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
 
     // Register the interrupt handler.
     IntRegister(INT_I2S_IRQ, pfnHandler);
 
     // Enable the I2S interrupt.
     IntEnable(INT_I2S_IRQ);
 }

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static uint32_t I2SIntStatus	(	uint32_t	ui32Base,
		bool	bMasked
	)

inlinestatic

Gets the current interrupt status.

This function returns the interrupt status for the specified I2S. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Parameters

ui32Base	is the base address of the I2S port
bMasked	selects between raw and masked interrupt status: `false` : Raw interrupt status is required. `true` : Masked interrupt status is required.

Returns

Returns the current interrupt status as a vector of:

 {
     uint32_t ui32Mask;
 
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
 
     // Return either the interrupt status or the raw interrupt status as
     // requested.
     if(bMasked)
     {
         ui32Mask = HWREG(I2S0_BASE + I2S_O_IRQFLAGS);
         return(ui32Mask & HWREG(I2S0_BASE + I2S_O_IRQMASK));
     }
     else
     {
         return(HWREG(I2S0_BASE + I2S_O_IRQFLAGS));
     }
 }

static void I2SIntUnregister ( uint32_t ui32Base )

inlinestatic

Unregisters an interrupt handler for a I2S interrupt in the dynamic interrupt table.

This function does the actual unregistering of the interrupt handler. It clears the handler to be called when an I2S interrupt occurs. This function also masks off the interrupt in the interrupt controller so that the interrupt handler no longer is called.

Parameters

ui32Base is the base address of the I2S port.

Returns: None

See also: IntRegister() for important information about registering interrupt handlers.

 {
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
 
     // Disable the interrupt.
     IntDisable(INT_I2S_IRQ);
 
     // Unregister the interrupt handler.
     IntUnregister(INT_I2S_IRQ);
 }

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void I2SPointerSet	(	uint32_t	ui32Base,
		bool	bInput,
		void *	pNextPointer
	)

Set a buffer pointer (input or output) directly.

This function allows bypassing of the pointers in the global control table.

The next pointer should always be written while the DMA is using the previous written pointer. If not written in time an I2S_INT_PTR_ERR will occur and all outputs will be disabled. Nothing is preventing the pointers from being identical, but this function relies on both pointers (input or output pointers) are pointing to a valid address.

Note: It is recommended that the pointer update is done in an interrupt context to ensure that the update is performed before the buffer is full.

Parameters

ui32Base	is the base address of the I2S module.
bInput	determines whether to update input or output pointer. `true` : Update input pointer. `false` : Update output pointer
pNextPointer	is a void pointer to user defined buffer.

Returns: None

See also: I2SPointerUpdate()

 {
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
 
     // Update the next input/output pointer with the correct address.
     if(bInput == true)
     {
         HWREG(I2S0_BASE + I2S_O_AIFINPTRNEXT) = (uint32_t)pNextPointer;
     }
     else
     {
         HWREG(I2S0_BASE + I2S_O_AIFOUTPTRNEXT) = (uint32_t)pNextPointer;
     }
 }

void I2SPointerUpdate	(	uint32_t	ui32Base,
		bool	bInput
	)

Update the buffer pointers.

The next pointer should always be written while the DMA is using the previous written pointer. If not written in time an I2S_INT_PTR_ERR will occur and all outputs will be disabled. Nothing is preventing the pointers from being identical, but this function relies on both pointers (input or output pointers) are pointing to a valid address.

Note: It is recommended that the pointer update is done in an interrupt context to ensure that the update is performed before the buffer is full.

Parameters

ui32Base	is the base address of the I2S module.
bInput	determines whether to update input or output pointer. `true` : Update input pointer. `false` : Update output pointer

Returns: None

See also: I2SPointerSet()

 {
     uint32_t ui32NextPtr;
 
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
 
     // Update the next input/output pointer with the correct address.
     if(bInput == true)
     {
         ui32NextPtr = (g_pControlTable->ui8InChan *
                        (g_pControlTable->ui16MemLen >> 3)) *
                       g_pControlTable->ui16DMABufSize;
         g_pControlTable->ui32InOffset = ((g_pControlTable->ui32InOffset +
                                          ui32NextPtr) %
                                          g_pControlTable->ui16ChBufSize);
         HWREG(I2S0_BASE + I2S_O_AIFINPTRNEXT) = g_pControlTable->ui32InOffset +
                                                g_pControlTable->ui32InBase;
     }
     else
     {
         ui32NextPtr = (g_pControlTable->ui8OutChan *
                        (g_pControlTable->ui16MemLen >> 3)) *
                       g_pControlTable->ui16DMABufSize;
         g_pControlTable->ui32OutOffset = ((g_pControlTable->ui32OutOffset +
                                          ui32NextPtr) %
                                          g_pControlTable->ui16ChBufSize);
         HWREG(I2S0_BASE + I2S_O_AIFOUTPTRNEXT) =
                          g_pControlTable->ui32OutOffset +
                          g_pControlTable->ui32OutBase;
     }
 }

void I2SSampleStampConfigure	(	uint32_t	ui32Base,
		bool	bInput,
		bool	bOutput
	)

Configure the sample stamp generator.

Use this function to configure the sample stamp generator.

Parameters

ui32Base	is the base address of the I2S module.
bInput	enables triggering of the sample stamp generator on input.
bOutput	enables triggering of the sample stamp generator on output.

Returns: None

 {
     uint32_t ui32Trigger;
 
     // Check the arguments.
     ASSERT(I2SBaseValid(ui32Base));
 
     ui32Trigger = HWREG(I2S0_BASE + I2S_O_STMPWCNT);
     ui32Trigger = (ui32Trigger + 2) % g_pControlTable->ui16ChBufSize;
 
     // Setup the sample stamp trigger for input streams.
     if(bInput)
     {
         HWREG(I2S0_BASE + I2S_O_STMPINTRIG) = ui32Trigger;
     }
 
     // Setup the sample stamp trigger for output streams.
     if(bOutput)
     {
         HWREG(I2S0_BASE + I2S_O_STMPOUTTRIG) = ui32Trigger;
     }
 
 }

static void I2SSampleStampDisable ( uint32_t ui32Base )

inlinestatic

Disable the Sample Stamp generator.

Use this function to disable the sample stamp generators. When the sample stamp generator is disabled, the clock counters are automatically cleared.

Returns: None

 {
     // Clear the enable bit.
     HWREG(I2S0_BASE + I2S_O_STMPCTL) = 0;
 
 }

static void I2SSampleStampEnable ( uint32_t ui32Base )

inlinestatic

Enable the Sample Stamp generator.

Use this function to enable the sample stamp generators.

Note: It is the user's responsibility to ensure that the sample stamp generator is properly configured before it is enabled. It is the setting of the Input and Output triggers configured using I2SSampleStampConfigure() that triggers the start point of the audio streams.

Returns: None

 {
     // Set the enable bit.
     HWREG(I2S0_BASE + I2S_O_STMPCTL) = I2S_STMPCTL_STMP_EN;
 }

uint32_t I2SSampleStampGet	(	uint32_t	ui32Base,
		uint32_t	ui32Channel
	)

Get the current value of a sample stamp counter.

Parameters

ui32Base	is the base address of the I2S module.
ui32Channel	is the sample stamp counter to sample

Returns: Returns the current value of the selected sample stamp channel.

 {
     uint32_t ui32FrameClkCnt;
     uint32_t ui32SysClkCnt;
     uint32_t ui32PeriodSysClkCnt;
     uint32_t ui32SampleStamp;
 
     // Get the number of Frame clock counts since last stamp.
     ui32FrameClkCnt = HWREG(I2S0_BASE + I2S_O_STMPWCNTCAPT0);
 
     // Get the number of system clock ticks since last frame clock edge.
     ui32SysClkCnt = HWREG(I2S0_BASE + I2S_O_STMPXCNTCAPT0);
 
     // Get the number system clock ticks in the last frame clock period.
     ui32PeriodSysClkCnt = HWREG(I2S0_BASE + I2S_O_STMPXPER);
 
     // Calculate the sample stamp.
     ui32SampleStamp = (ui32SysClkCnt << 16) / ui32PeriodSysClkCnt;
     ui32SampleStamp = (ui32SampleStamp > I2S_STMP_SATURATION) ?
                       I2S_STMP_SATURATION : ui32SampleStamp;
     ui32SampleStamp |= (ui32FrameClkCnt << 16);
 
     return (ui32SampleStamp);
 }

Macro Definition Documentation

#define I2S_CHAN0_ACT 0x00000100

#define I2S_CHAN1_ACT 0x00000200

#define I2S_CHAN2_ACT 0x00000400

#define I2S_CHAN3_ACT 0x00000800

#define I2S_CHAN4_ACT 0x00001000

#define I2S_CHAN5_ACT 0x00002000

#define I2S_CHAN6_ACT 0x00004000

#define I2S_CHAN7_ACT 0x00008000

#define I2S_CHAN_CFG_MASK 0x0000FF00

Referenced by I2SChannelConfigure().

#define I2S_DMA_BUF_SIZE_128 0x00000080

#define I2S_DMA_BUF_SIZE_256 0x00000100

#define I2S_DMA_BUF_SIZE_64 0x00000040

#define I2S_DUAL_PHASE_FMT 0x00000020

#define I2S_EXT_WCLK 0x00000001

#define I2S_INT_ALL 0x0000003F

#define I2S_INT_BUS_ERR 0x00000004

#define I2S_INT_DMA_IN 0x00000020

#define I2S_INT_DMA_OUT 0x00000010

#define I2S_INT_PTR_ERR 0x00000001

#define I2S_INT_TIMEOUT 0x00000008

#define I2S_INT_WCLK 0x00000002

#define I2S_INT_WCLK_ERR 0x00000002

#define I2S_INVERT_WCLK 0x00000004

#define I2S_LINE_INPUT 0x00000001

Referenced by I2SChannelConfigure().

#define I2S_LINE_MASK 0x00000003

Referenced by I2SChannelConfigure().

#define I2S_LINE_OUTPUT 0x00000002

Referenced by I2SChannelConfigure().

#define I2S_LINE_UNUSED 0x00000000

#define I2S_MEM_LENGTH_16 0x00000000

#define I2S_MEM_LENGTH_24 0x00000080

Referenced by I2SAudioFormatConfigure().

#define I2S_MONO_MODE 0x00000100

#define I2S_NEG_EDGE 0x00000000

#define I2S_NORMAL_WCLK 0x00000000

#define I2S_POS_EDGE 0x00000040

#define I2S_SINGLE_PHASE_FMT 0x00000000

#define I2S_STEREO_MODE 0x00000300

#define I2S_STMP0 0x00000001

#define I2S_STMP1 0x00000002

#define I2S_STMP_SATURATION 0x0000FFFF

Referenced by I2SSampleStampGet().

#define I2S_WORD_LENGTH_16 0x00000010

#define I2S_WORD_LENGTH_24 0x00000018

#define I2S_WORD_LENGTH_8 0x00000008

Variable Documentation

I2SControlTable* g_pControlTable

Data Structures

Functions

Variables

Detailed Description

Function Documentation

Macro Definition Documentation

Variable Documentation