power_xwrLx4xx.h

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/*
 * Copyright (C) 2022 Texas Instruments Incorporated
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer.
 *
 * Redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the
 * distribution.
 *
 * Neither the name of Texas Instruments Incorporated nor the names of
 * its contributors may be used to endorse or promote products derived
 * from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
 
#ifndef POWER_XWRLX4XX_H
#define POWER_XWRLX4XX_H
 
#include <stdint.h>
#include <drivers/utils/List.h>
#include <drivers/hw_include/hw_types.h>
#include <drivers/pinmux.h>
#include <drivers/power.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* Power resources */
#define POWER_PERIPH_CAN        0
 
#define POWER_PERIPH_SPI        1
 
#define POWER_PERIPH_QSPI       2
 
#define POWER_PERIPH_TOPSS      3
 
#define POWER_PERIPH_APP_RTI    4
 
#define POWER_PERIPH_WD         5
 
#define POWER_PERIPH_UART0      6
 
#define POWER_PERIPH_UART1      7
 
#define POWER_PERIPH_I2C        8
 
#define POWER_PERIPH_LIN        9
 
#define POWER_PERIPH_ESM        10
 
#define POWER_PERIPH_EDMA        11
 
#define POWER_PERIPH_CRC        12
 
#define POWER_PERIPH_PWM        13
 
#define POWER_PERIPH_GIO        14
 
#define POWER_PERIPH_HWASS      15
 
/* \cond */
#define POWER_NUMRESOURCES        16 /* Number of resources in database */
/* \endcond */
 
 
/*
 *  Power constraints on the 64XX device
 */
#define POWER_DISALLOW_LPDS       0
 
#define POWER_DISALLOW_SLEEP   1
 
#define POWER_DISALLOW_IDLE   2
 
/* \cond */
#define POWER_NUMCONSTRAINTS      3   
/* \endcond */
 
/*
 *  Power events on the 64XX device
 *
 *  Each event must be a power of two, and the event IDs must be sequential
 *  without any gaps.
 */
#define POWER_ENTERING_LPDS       0x1
 
#define POWER_ENTERING_SLEEP      0x2
 
#define POWER_ENTERING_IDLE       0x4
 
#define POWER_AWAKE_LPDS          0x8
 
#define POWER_AWAKE_SLEEP         0x10
 
#define POWER_AWAKE_IDLE          0x20
 
/* \cond */
#define POWER_NUMEVENTS           6    
/* \endcond */
 
/* \cond */
/* Use by NVIC Register structure */
#define POWER_numNVICSetEnableRegs    6
#define POWER_numNVICIntPriority      49
/* \endcond */
 
/* \cond */
/* Number of pins that can be parked in LPDS */
#define POWER_NUMPINS             24
/* \endcond */
 
typedef struct {
    uint32_t pin;
    uint32_t parkState;
} Power_ParkInfo;
 
typedef enum {
    POWER_GPIO_WAKEUP_LPDS,
    POWER_SYNCIN_IO_WAKEUP_LPDS
}Power_GPIO_SYNCIO_Wakeup_Enable;
 
typedef struct {
    Power_PolicyInitFxn policyInitFxn;
    Power_PolicyFxn policyFxn;
    void (*enterLPDSHookFxn)(void);
    void (*resumeLPDSHookFxn)(void);
    void (*enteridle3HookFxn)(void);
    void (*resumeidle3HookFxn)(void);
 
    bool enablePolicy;
 
    bool enableGPIOSyncIOWakeupLPDS;
 
    bool enableSleepCounterWakeupLPDS;
 
    bool enableUARTWakeupLPDS;
 
    bool enableSPICSWakeupLPDS;
 
    bool enableRTCWakeupLPDS;
 
    bool enableFRCWakeupLPDS;
 
    Power_GPIO_SYNCIO_Wakeup_Enable selectGpioSyncIOLpds;
    uint32_t wakeupGPIOEdgeLPDS;
    uint32_t wakeupSyncIOEdgeLPDS;
 
    uint32_t ramRetentionMaskLPDS;
 
    Power_ParkInfo * pinParkDefs;
    uint32_t numPins;
    uint32_t LPDSThreshold;
    uint32_t totalLatencyForLPDS;
 
    uint32_t resumeLatencyForLPDS;
    uint32_t sleepThreshold;
    uint32_t totalLatencyForSleep;
 
    uint32_t resumeLatencyForSleep;
    uint32_t idleThreshold;
    uint32_t totalLatencyForIdle;
 
    uint32_t resumeLatencyForIdle;
 
} Power_ConfigV1;
 
typedef struct {
    uint32_t vectorTable;
    uint32_t auxCtrl;
    uint32_t intCtrlState;
    uint32_t appInt;
    uint32_t sysCtrl;
    uint32_t configCtrl;
    uint32_t sysPri1;
    uint32_t sysPri2;
    uint32_t sysPri3;
    uint32_t sysHcrs;
    uint32_t systickCtrl;
    uint32_t systickReload;
    uint32_t systickCalib;
    uint32_t intSetEn[POWER_numNVICSetEnableRegs];
    uint32_t intPriority[POWER_numNVICIntPriority];
} Power_NVICRegisters;
typedef struct {
    uint32_t msp;
    uint32_t psp;
    uint32_t psr;
    uint32_t primask;
    uint32_t faultmask;
    uint32_t basepri;
    uint32_t control;
} Power_MCURegisters;
typedef struct {
    Power_MCURegisters m4Regs;
    Power_NVICRegisters nvicRegs;
} Power_SaveRegisters;
typedef enum {
    POWER_PARK,
    POWER_DONT_PARK
} Power_ParkState;
 
typedef enum {
    POWER_PIN_PAD_AA = PIN_PAD_AA,
    POWER_PIN_PAD_AB = PIN_PAD_AB,
    POWER_PIN_PAD_AC = PIN_PAD_AC,
    POWER_PIN_PAD_AD = PIN_PAD_AD,
    POWER_PIN_PAD_AE = PIN_PAD_AE,
    POWER_PIN_PAD_AF = PIN_PAD_AF,
    POWER_PIN_PAD_AG = PIN_PAD_AG,
    POWER_PIN_PAD_AH = PIN_PAD_AH,
    POWER_PIN_PAD_AI = PIN_PAD_AI,
    POWER_PIN_PAD_AJ = PIN_PAD_AJ,
    POWER_PIN_PAD_AK = PIN_PAD_AK,
    POWER_PIN_PAD_AL = PIN_PAD_AL,
    POWER_PIN_PAD_AM = PIN_PAD_AM,
    POWER_PIN_PAD_AN = PIN_PAD_AN,
    POWER_PIN_PAD_AO = PIN_PAD_AO,
    POWER_PIN_PAD_AP = PIN_PAD_AP,
    POWER_PIN_PAD_AQ = PIN_PAD_AQ,
    POWER_PIN_PAD_AR = PIN_PAD_AR,
    POWER_PIN_PAD_AS = PIN_PAD_AS,
    POWER_PIN_PAD_AT = PIN_PAD_AT,
    POWER_PIN_PAD_AU = PIN_PAD_AU,
    POWER_PIN_PAD_AV = PIN_PAD_AV,
    POWER_PIN_PAD_AW = PIN_PAD_AW,
    POWER_PIN_PAD_AX = PIN_PAD_AX,
} Power_Pin;
typedef struct {
 
    bool enableGPIOSyncIOWakeupLPDS;
    Power_GPIO_SYNCIO_Wakeup_Enable selectGpioSyncIOLpds;
    bool enableSleepCounterWakeupLPDS;
    bool enableUARTWakeupLPDS;
    bool enableSPICSWakeupLPDS;
    bool enableRTCWakeupLPDS;
    bool enableFRCWakeupLPDS;
    uint32_t wakeupGPIOEdgeLPDS;
    uint32_t wakeupSyncIOEdgeLPDS;
 
} Power_Wakeup;
 
typedef struct {
    List_List notifyList;
    uint32_t constraintMask;
    uint32_t state;
    uint16_t dbRecords[POWER_NUMRESOURCES];
    bool enablePolicy;
    bool initialized;
    uint8_t refCount[POWER_NUMRESOURCES];
    uint8_t constraintCounts[POWER_NUMCONSTRAINTS];
    Power_PolicyFxn policyFxn;
    uint32_t pinMode[POWER_NUMPINS];
    uint32_t pinLockMask;
    Power_Wakeup wakeupConfig;
} Power_ModuleState;
void Power_configureWakeup(Power_Wakeup *wakeup);
 
void Power_initPolicy(void);
 
void Power_getWakeup(Power_Wakeup *wakeup);
 
void Power_sleepPolicy(unsigned long long sleepTimeus);
 
int_fast16_t Power_reset(uint_fast16_t resourceId);
 void Power_Idle3();
 
/* \cond */
#define Power_getPerformanceLevel(void)   0
#define Power_setPerformanceLevel(level)  Power_EFAIL
/* \endcond */
 
#ifdef __cplusplus
}
#endif
 
#endif /* POWER_XWRLX4XX_H */