![Logo](ti_logo.svg) |
xWRL6432 MMWAVE-L-SDK
05.04.00.01
|
|
Go to the documentation of this file.
61 #include <drivers/hw_include/csl_types.h>
62 #include <drivers/hw_include/cslr_mcspi.h>
63 #include <drivers/hw_include/cslr.h>
87 #define MCSPI_CHANNEL_0 (0U)
88 #define MCSPI_CHANNEL_1 (1U)
89 #define MCSPI_CHANNEL_2 (2U)
90 #define MCSPI_CHANNEL_3 (3U)
101 #define MCSPI_OPER_MODE_POLLED (0U)
102 #define MCSPI_OPER_MODE_INTERRUPT (1U)
103 #define MCSPI_OPER_MODE_DMA (2U)
107 #define MCSPI_MAX_NUM_CHANNELS (4U)
117 #define MCSPI_TRANSFER_COMPLETED (0U)
118 #define MCSPI_TRANSFER_STARTED (1U)
119 #define MCSPI_TRANSFER_CANCELLED (2U)
120 #define MCSPI_TRANSFER_FAILED (3U)
121 #define MCSPI_TRANSFER_CSN_DEASSERT (4U)
122 #define MCSPI_TRANSFER_TIMEOUT (5U)
144 #define MCSPI_TRANSFER_MODE_BLOCKING (0U)
149 #define MCSPI_TRANSFER_MODE_CALLBACK (1U)
168 #define MCSPI_MS_MODE_CONTROLLER (CSL_APP_SPI_MODULCTRL_MS_MASTER)
170 #define MCSPI_MS_MODE_PERIPHERAL (CSL_APP_SPI_MODULCTRL_MS_SLAVE)
187 #define MCSPI_FF_POL0_PHA0 (0U)
188 #define MCSPI_FF_POL0_PHA1 (1U)
189 #define MCSPI_FF_POL1_PHA0 (2U)
190 #define MCSPI_FF_POL1_PHA1 (3U)
202 #define MCSPI_CS_POL_HIGH (CSL_APP_SPI_CH0CONF_EPOL_ACTIVEHIGH)
204 #define MCSPI_CS_POL_LOW (CSL_APP_SPI_CH0CONF_EPOL_ACTIVELOW)
213 #define MCSPI_TR_MODE_TX_RX (CSL_APP_SPI_CH0CONF_TRM_TRANSRECEI)
214 #define MCSPI_TR_MODE_RX_ONLY (CSL_APP_SPI_CH0CONF_TRM_RECEIVONLY)
215 #define MCSPI_TR_MODE_TX_ONLY (CSL_APP_SPI_CH0CONF_TRM_TRANSONLY)
224 #define MCSPI_LOOPBACK_DISABLE (0U)
225 #define MCSPI_LOOPBACK_ENABLE (1U)
236 #define MCSPI_IS_D0 (CSL_APP_SPI_CH0CONF_IS_LINE0)
238 #define MCSPI_IS_D1 (CSL_APP_SPI_CH0CONF_IS_LINE1)
248 #define MCSPI_DPE_ENABLE (CSL_APP_SPI_CH0CONF_DPE0_ENABLED)
250 #define MCSPI_DPE_DISABLE (CSL_APP_SPI_CH0CONF_DPE0_DISABLED)
259 #define MCSPI_SLV_CS_SELECT_0 (CSL_APP_SPI_CH0CONF_SPIENSLV_SPIEN0)
260 #define MCSPI_SLV_CS_SELECT_1 (CSL_APP_SPI_CH0CONF_SPIENSLV_SPIEN1)
261 #define MCSPI_SLV_CS_SELECT_2 (CSL_APP_SPI_CH0CONF_SPIENSLV_SPIEN2)
262 #define MCSPI_SLV_CS_SELECT_3 (CSL_APP_SPI_CH0CONF_SPIENSLV_SPIEN3)
272 #define MCSPI_SB_POL_HIGH (CSL_APP_SPI_CH0CONF_SBPOL_HIGHLEVEL)
274 #define MCSPI_SB_POL_LOW (CSL_APP_SPI_CH0CONF_SBPOL_LOWLEVEL)
286 #define MCSPI_TCS0_0_CLK (CSL_APP_SPI_CH0CONF_TCS0_ZEROCYCLEDLY)
288 #define MCSPI_TCS0_1_CLK (CSL_APP_SPI_CH0CONF_TCS0_ONECYCLEDLY)
290 #define MCSPI_TCS0_2_CLK (CSL_APP_SPI_CH0CONF_TCS0_TWOCYCLEDLY)
292 #define MCSPI_TCS0_3_CLK (CSL_APP_SPI_CH0CONF_TCS0_THREECYCLEDLY)
305 #define MCSPI_CH_MODE_SINGLE (CSL_APP_SPI_MODULCTRL_SINGLE_SINGLE)
307 #define MCSPI_CH_MODE_MULTI (CSL_APP_SPI_MODULCTRL_SINGLE_MULTI)
320 #define MCSPI_PINMODE_3PIN (CSL_APP_SPI_MODULCTRL_PIN34_3PINMODE)
321 #define MCSPI_PINMODE_4PIN (CSL_APP_SPI_MODULCTRL_PIN34_4PINMODE)
333 #define MCSPI_INITDLY_0 (CSL_APP_SPI_MODULCTRL_INITDLY_NODELAY)
335 #define MCSPI_INITDLY_4 (CSL_APP_SPI_MODULCTRL_INITDLY_4CLKDLY)
337 #define MCSPI_INITDLY_8 (CSL_APP_SPI_MODULCTRL_INITDLY_8CLKDLY)
339 #define MCSPI_INITDLY_16 (CSL_APP_SPI_MODULCTRL_INITDLY_16CLKDLY)
341 #define MCSPI_INITDLY_32 (CSL_APP_SPI_MODULCTRL_INITDLY_32CLKDLY)
853 #define MCSPI_FIFO_LENGTH (64U)
857 #define MCSPI_RX_FIFO_ENABLE ((uint32_t) CSL_APP_SPI_CH0CONF_FFER_FFENABLED \
859 CSL_APP_SPI_CH0CONF_FFER_SHIFT)
864 #define MCSPI_RX_FIFO_DISABLE ((uint32_t) CSL_APP_SPI_CH0CONF_FFER_FFDISABLED \
865 << CSL_APP_SPI_CH0CONF_FFER_SHIFT)
870 #define MCSPI_TX_FIFO_ENABLE ((uint32_t) CSL_APP_SPI_CH0CONF_FFEW_FFENABLED \
871 << CSL_APP_SPI_CH0CONF_FFEW_SHIFT)
876 #define MCSPI_TX_FIFO_DISABLE ((uint32_t) CSL_APP_SPI_CH0CONF_FFEW_FFDISABLED \
877 << CSL_APP_SPI_CH0CONF_FFEW_SHIFT)
882 #define MCSPI_REG_OFFSET (0x14U)
884 #define APP_SPI_CHCONF(x) ((uint32_t) CSL_APP_SPI_CH0CONF + \
885 (uint32_t) ((uint32_t) MCSPI_REG_OFFSET * \
888 #define APP_SPI_CHSTAT(x) ((uint32_t) CSL_APP_SPI_CH0STAT + \
889 (uint32_t) ((uint32_t) MCSPI_REG_OFFSET * \
892 #define APP_SPI_CHCTRL(x) ((uint32_t) CSL_APP_SPI_CH0CTRL + \
893 (uint32_t) ((uint32_t) MCSPI_REG_OFFSET * \
896 #define APP_SPI_CHTX(x) ((uint32_t) CSL_APP_SPI_TX0 + \
897 (uint32_t) ((uint32_t) MCSPI_REG_OFFSET * \
900 #define APP_SPI_CHRX(x) ((uint32_t) CSL_APP_SPI_RX0 + \
901 (uint32_t) ((uint32_t) MCSPI_REG_OFFSET * \
904 #define MCSPI_CLKD_MASK (0x0FU)
907 #define APP_SPI_IRQSTATUS_CLEAR_ALL (CSL_APP_SPI_IRQSTATUS_EOW_MASK | \
908 CSL_APP_SPI_IRQSTATUS_WKS_MASK | \
909 CSL_APP_SPI_IRQSTATUS_RX3_FULL_MASK | \
910 CSL_APP_SPI_IRQSTATUS_TX3_UNDERFLOW_MASK | \
911 CSL_APP_SPI_IRQSTATUS_TX3_EMPTY_MASK | \
912 CSL_APP_SPI_IRQSTATUS_RX2_FULL_MASK | \
913 CSL_APP_SPI_IRQSTATUS_TX2_UNDERFLOW_MASK | \
914 CSL_APP_SPI_IRQSTATUS_TX2_EMPTY_MASK | \
915 CSL_APP_SPI_IRQSTATUS_RX1_FULL_MASK | \
916 CSL_APP_SPI_IRQSTATUS_TX1_UNDERFLOW_MASK | \
917 CSL_APP_SPI_IRQSTATUS_TX1_EMPTY_MASK | \
918 CSL_APP_SPI_IRQSTATUS_RX0_OVERFLOW_MASK | \
919 CSL_APP_SPI_IRQSTATUS_RX0_FULL_MASK | \
920 CSL_APP_SPI_IRQSTATUS_TX0_UNDERFLOW_MASK | \
921 CSL_APP_SPI_IRQSTATUS_TX0_EMPTY_MASK)
949 uint32_t numWordsRxTx);
1026 static inline uint32_t
MCSPI_readChConf(uint32_t baseAddr, uint32_t chNum);
1080 uint32_t enableFlag);
1102 uint32_t enableFlag);
1139 uint32_t dataWidth);
1145 uint32_t bufWidthShift = 0U;
1151 else if(dataSize <= 16U)
1160 return bufWidthShift;
1201 uint32_t enableFlag)
1206 APP_SPI_CH0CONF_FFEW,
1207 enableFlag >> CSL_APP_SPI_CH0CONF_FFEW_SHIFT);
1212 uint32_t enableFlag)
1217 APP_SPI_CH0CONF_FFER,
1218 enableFlag >> CSL_APP_SPI_CH0CONF_FFER_SHIFT);
1233 CSL_FINS(regVal, APP_SPI_CH0CONF_WL, (dataWidth - 1U));
Definition: mcspi_dma_edma.h:51
#define MCSPI_IS_D1
Data line 1 (SPIDAT[1]) selected for reception.
Definition: mcspi/v0/mcspi.h:238
int32_t MCSPI_dmaChConfig(MCSPI_Handle handle, const MCSPI_ChConfig *chCfg, const MCSPI_DmaChConfig *dmaChCfg)
Function to configure a DMA of a channel.
void MCSPI_close(MCSPI_Handle handle)
Function to close a MCSPI peripheral specified by the MCSPI handle.
MCSPI instance attributes - used during init time.
Definition: mcspi/v0/mcspi.h:491
#define APP_SPI_CHCONF(x)
Base address of McSPI_CHCONF(x)
Definition: mcspi/v0/mcspi.h:884
uint32_t transferTimeout
Definition: mcspi/v0/mcspi.h:429
static uint32_t MCSPI_readRxDataReg(uint32_t baseAddr, uint32_t chNum)
This API will return the data present in the MCSPI_RX register.
Definition: mcspi/v0/mcspi.h:1221
MCSPI channel object.
Definition: mcspi/v0/mcspi.h:529
uint32_t count
Definition: mcspi/v0/mcspi.h:378
static void MCSPI_writeTxDataReg(uint32_t baseAddr, uint32_t txData, uint32_t chNum)
This API will put the data on to the McSPI Channel transmit register.
Definition: mcspi/v0/mcspi.h:1191
#define APP_SPI_CHRX(x)
Base address of McSPI_CHRX(x)
Definition: mcspi/v0/mcspi.h:900
static uint32_t MCSPI_readChCtrlReg(uint32_t baseAddr, uint32_t chNum)
This API returns Channel control register value.
Definition: mcspi/v0/mcspi.h:1169
void(* MCSPI_CallbackFxn)(MCSPI_Handle handle, MCSPI_Transaction *transaction)
The definition of a callback function used by the SPI driver when used in MCSPI_TRANSFER_MODE_CALLBAC...
Definition: mcspi/v0/mcspi.h:412
uint32_t operMode
Definition: mcspi/v0/mcspi.h:505
uint32_t status
Definition: mcspi/v0/mcspi.h:401
Data structure used with MCSPI_transfer()
Definition: mcspi/v0/mcspi.h:357
uint32_t initDelay
Definition: mcspi/v0/mcspi.h:517
uint32_t effTxFifoDepth
Definition: mcspi/v0/mcspi.h:571
static void MCSPI_enableRxFIFO(uint32_t baseAddr, uint32_t chNum, uint32_t enableFlag)
This API will enable/disable the Rx FIFOs of McSPI peripheral.
Definition: mcspi/v0/mcspi.h:1210
static uint32_t MCSPI_readChStatusReg(uint32_t baseAddr, uint32_t chNum)
This API will return the status of the McSPI channel currently in use.
Definition: mcspi/v0/mcspi.h:1163
MCSPI_ChConfig chCfg
Definition: mcspi/v0/mcspi.h:533
uint32_t intrMask
Definition: mcspi/v0/mcspi.h:575
static uint32_t MCSPI_readChConf(uint32_t baseAddr, uint32_t chNum)
This API returns Channel Config register value.
Definition: mcspi/v0/mcspi.h:1180
#define MCSPI_CS_POL_LOW
SPIEN (CS) is held low during the ACTIVE state.
Definition: mcspi/v0/mcspi.h:204
int32_t MCSPI_reConfigFifo(MCSPI_Handle handle, uint32_t chNum, uint32_t numWordsRxTx)
Function to re-configure Effective FIFO Words.
static uint32_t MCSPI_getBufWidthShift(uint32_t dataSize)
This API will return the buffer width in bytes based on dataSize.
Definition: mcspi/v0/mcspi.h:1143
uint32_t transferMode
Definition: mcspi/v0/mcspi.h:427
#define MCSPI_MS_MODE_CONTROLLER
The module generates the clock and CS.
Definition: mcspi/v0/mcspi.h:168
#define MCSPI_DPE_DISABLE
No transmission on Data Line.
Definition: mcspi/v0/mcspi.h:250
MCSPI driver object.
Definition: mcspi/v0/mcspi.h:584
uint32_t MCSPI_getBaseAddr(MCSPI_Handle handle)
Function to get base address of MCSPI instance of a particular handle.
#define MCSPI_SB_POL_LOW
Start-bit polarity is held to 0 during MCSPI transfer.
Definition: mcspi/v0/mcspi.h:274
#define APP_SPI_CHTX(x)
Base address of McSPI_CHTX(x)
Definition: mcspi/v0/mcspi.h:896
uint32_t bitRate
Definition: mcspi/v0/mcspi.h:460
void MCSPI_deinit(void)
This function de-initializes the MCSPI module.
MCSPI_Handle handle
Definition: mcspi/v0/mcspi.h:588
#define MCSPI_MAX_NUM_CHANNELS
Max number of channels/Chip Select (CS) supported.
Definition: mcspi/v0/mcspi.h:107
MCSPI Parameters.
Definition: mcspi/v0/mcspi.h:426
#define SystemP_WAIT_FOREVER
Value to use when needing a timeout of infinity or wait forver until resource is available.
Definition: SystemP.h:103
uint32_t csDisable
Definition: mcspi/v0/mcspi.h:361
#define MCSPI_LOOPBACK_DISABLE
Definition: mcspi/v0/mcspi.h:224
void * MCSPI_Handle
A handle that is returned from a MCSPI_open() call.
Definition: mcspi/v0/mcspi.h:76
uint32_t trMode
Definition: mcspi/v0/mcspi.h:464
MCSPI_Object * object
Definition: mcspi/v0/mcspi.h:631
uint32_t txFifoTrigLvl
Definition: mcspi/v0/mcspi.h:567
uint32_t inputClkFreq
Definition: mcspi/v0/mcspi.h:497
void MCSPI_init(void)
This function initializes the MCSPI module.
#define MCSPI_TRANSFER_MODE_BLOCKING
MCSPI_transfer() blocks execution. This mode can only be used when called within a Task context
Definition: mcspi/v0/mcspi.h:144
uint32_t isOpen
Definition: mcspi/v0/mcspi.h:539
HwiP_Object hwiObj
Definition: mcspi/v0/mcspi.h:609
SemaphoreP_Object transferSemObj
Definition: mcspi/v0/mcspi.h:605
uint32_t baseAddr
Definition: mcspi/v0/mcspi.h:495
uint32_t rxFifoTrigLvl
Definition: mcspi/v0/mcspi.h:569
uint32_t curRxWords
Definition: mcspi/v0/mcspi.h:553
uint32_t csPolarity
Definition: mcspi/v0/mcspi.h:462
static void MCSPI_setDataWidth(uint32_t baseAddr, uint32_t chNum, uint32_t dataWidth)
This API will set the data width in the channel config register.
Definition: mcspi/v0/mcspi.h:1227
uint32_t startBitPolarity
Definition: mcspi/v0/mcspi.h:478
#define APP_SPI_CHCTRL(x)
Base address of McSPI_CHCTRL(x)
Definition: mcspi/v0/mcspi.h:892
#define MCSPI_SLV_CS_SELECT_0
Definition: mcspi/v0/mcspi.h:259
static void MCSPI_writeChCtrlReg(uint32_t baseAddr, uint32_t chNum, uint32_t regVal)
This API sets Channel control register value.
Definition: mcspi/v0/mcspi.h:1174
uint32_t chMode
Definition: mcspi/v0/mcspi.h:513
uint32_t loopback
Definition: mcspi/v0/mcspi.h:433
int32_t MCSPI_transfer(MCSPI_Handle handle, MCSPI_Transaction *transaction)
Function to perform MCSPI transactions.
uint32_t intrNum
Definition: mcspi/v0/mcspi.h:503
int32_t MCSPI_transferCancel(MCSPI_Handle handle)
Function to cancel MCSPI transactions on channel of a SPI peripheral specified by the MCSPI handle.
uint32_t msMode
Definition: mcspi/v0/mcspi.h:435
const uint8_t * curTxBufPtr
Definition: mcspi/v0/mcspi.h:545
static void MCSPI_Transaction_init(MCSPI_Transaction *trans)
Function to initialize the MCSPI_Transaction struct to its defaults.
Definition: mcspi/v0/mcspi.h:835
uint32_t csDisable
Definition: mcspi/v0/mcspi.h:541
void * args
Definition: mcspi/v0/mcspi.h:399
uint32_t dataWidthBitMask
Definition: mcspi/v0/mcspi.h:565
uint32_t pinMode
Definition: mcspi/v0/mcspi.h:515
uint32_t startBitEnable
Definition: mcspi/v0/mcspi.h:475
#define MCSPI_TCS0_0_CLK
0.5 clock cycles delay
Definition: mcspi/v0/mcspi.h:286
void * txBuf
Definition: mcspi/v0/mcspi.h:381
void * rxBuf
Definition: mcspi/v0/mcspi.h:392
uint32_t effRxFifoDepth
Definition: mcspi/v0/mcspi.h:573
uint32_t dataSize
Definition: mcspi/v0/mcspi.h:367
static void MCSPI_ChConfig_init(MCSPI_ChConfig *chConfig)
Function to initialize the MCSPI_ChConfig struct to its defaults.
Definition: mcspi/v0/mcspi.h:815
uint32_t curTxWords
Definition: mcspi/v0/mcspi.h:549
uint32_t slvCsSelect
Definition: mcspi/v0/mcspi.h:472
int32_t MCSPI_chConfig(MCSPI_Handle handle, const MCSPI_ChConfig *chCfg)
Function to configure a MCSPI channel.
uint8_t intrPriority
Definition: mcspi/v0/mcspi.h:507
static void MCSPI_enableTxFIFO(uint32_t baseAddr, uint32_t chNum, uint32_t enableFlag)
This API will enable/disable the Tx FIFOs of McSPI peripheral.
Definition: mcspi/v0/mcspi.h:1199
void * mcspiDmaHandle
Definition: mcspi/v0/mcspi.h:614
uint8_t bufWidthShift
Definition: mcspi/v0/mcspi.h:559
MCSPI global configuration array.
Definition: mcspi/v0/mcspi.h:628
void * transferSem
Definition: mcspi/v0/mcspi.h:602
#define APP_SPI_CHSTAT(x)
Base address of McSPI_CHSTAT(x)
Definition: mcspi/v0/mcspi.h:888
MCSPI_Transaction * currTransaction
Definition: mcspi/v0/mcspi.h:612
uint8_t * curRxBufPtr
Definition: mcspi/v0/mcspi.h:547
#define MCSPI_FF_POL0_PHA0
Definition: mcspi/v0/mcspi.h:187
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:91
MCSPI_OpenParams openPrms
Definition: mcspi/v0/mcspi.h:590
uint32_t defaultTxData
Definition: mcspi/v0/mcspi.h:484
static void MCSPI_OpenParams_init(MCSPI_OpenParams *openPrms)
Function to initialize the MCSPI_OpenParams struct to its defaults.
Definition: mcspi/v0/mcspi.h:803
uint32_t dpe1
Definition: mcspi/v0/mcspi.h:470
uint32_t gMcspiConfigNum
Externally defined driver configuration array size.
uint32_t csEnable
Definition: mcspi/v0/mcspi.h:543
Opaque semaphore object used with the semaphore APIs.
Definition: SemaphoreP.h:59
MCSPI_DmaChConfig dmaChCfg
Definition: mcspi/v0/mcspi.h:577
int32_t mcspiDmaIndex
Definition: mcspi/v0/mcspi.h:437
#define MCSPI_TRANSFER_COMPLETED
Definition: mcspi/v0/mcspi.h:117
uint32_t channel
Definition: mcspi/v0/mcspi.h:358
#define MCSPI_TR_MODE_TX_RX
Definition: mcspi/v0/mcspi.h:213
uint32_t inputSelect
Definition: mcspi/v0/mcspi.h:466
uint32_t isOpen
Definition: mcspi/v0/mcspi.h:600
uint32_t dpe0
Definition: mcspi/v0/mcspi.h:468
static void MCSPI_writeChConfReg(uint32_t baseAddr, uint32_t chNum, uint32_t regVal)
This API sets Channel Config register value.
Definition: mcspi/v0/mcspi.h:1185
MCSPI_Handle MCSPI_open(uint32_t index, const MCSPI_OpenParams *openPrms)
This function opens a given MCSPI peripheral.
MCSPI configuration parameters for the channel.
Definition: mcspi/v0/mcspi.h:455
MCSPI_Config gMcspiConfig[]
Externally defined driver configuration array.
MCSPI_CallbackFxn transferCallbackFxn
Definition: mcspi/v0/mcspi.h:431
uint32_t baseAddr
Definition: mcspi/v0/mcspi.h:592
const MCSPI_Attrs * attrs
Definition: mcspi/v0/mcspi.h:629
#define MCSPI_CHANNEL_0
Definition: mcspi/v0/mcspi.h:87
uint32_t frameFormat
Definition: mcspi/v0/mcspi.h:458
uint32_t csIdleTime
Definition: mcspi/v0/mcspi.h:481
#define MCSPI_DPE_ENABLE
Data line selected for transmission.
Definition: mcspi/v0/mcspi.h:248
uint32_t chNum
Definition: mcspi/v0/mcspi.h:456
void * hwiHandle
Definition: mcspi/v0/mcspi.h:607