Watchdog reset mode

Table of Contents

• Introduction
• Flow chart
• Supported Combinations
• Using SDK with SysConfig
• Steps to Run the Example
• See Also
• Sample Output

Introduction

This example uses the WDT module in reset mode to trigger SOC warm reset. Servicing the WDT for few iterations before triggering the warm reset. It will reset the device once it reaches the expiry time set by user.
Make sure to confirm the following configuration in syscfg.
WDT Reset Mode: trigger warm reset

Flow chart

The user can perform the following sequence if they want to reload complete image from flash during a watchdog reset. After exiting watchdog reset RBL is made to reload from flash by issuing a controlled warm reset with boot vector set to 0. Also when frontend is being used by the application, we have to ensure that frontend PD is ON to enable the RBL to load the frontend firmware.

If the user does not want to reload image from flash and when frontend is not being used we can maintain a backup of the data section so as to restore after watchdog reset. If the user reloads an image from Flash, we do not need to maintain a backup of the data section. The user can update the linker to have the data section only at the run address.

Supported Combinations

Parameter	Value
CPU + OS	m4fss0-0 freertos
Toolchain	ti-arm-clang
Boards	xWRL6432-evm
Example folder	examples/kernel/freertos/task_switch

Using SDK with SysConfig

A GUI tool SysConfig is used to configure different modules and peripherals of the example. Using this tool, users can select and customize different modules and peripherals. The SysConfig tool will generate the code for initializing and configuring these modules. This configuration is saved to a file called example.syscfg for every example. To know more about how to use SDK with SysConfig, Visit this page

Using SDK with SysConfig

Steps to Run the Example

• When using CCS projects to build, import the CCS project for the required combination and build it using the CCS project menu (see Using SDK with CCS Projects).
• When using makefiles to build, note the required combination and build using make command (see Using SDK with Makefiles)
• Launch a CCS debug session and run the executable, see CCS Launch, Load and Run
• Please select the UART port used for console as mentioned in Setup UART Terminal

See Also

WATCHDOG

Sample Output

Shown below is a sample output when the application is run, Please note that application prints in both CCS and UART console.

Note

Console prints will be stopped once WDT triggers warm reset.

CCS Console:

[MAIN_Cortex_R5_0_0] Watchdog reset Mode Test Started ...
Servicing WDT for few iterations
Watchdog triggers warm reset in 3000 (ms)
All tests have passed!!
Prints will be stopped after reset
Prints will be stopped after reset
Prints will be stopped after reset
'' ''
'' ''
'' ''
Prints will be stopped after reset

UART Console:

Watchdog reset Mode Test Started ...
Servicing WDT for few iterations
Watchdog triggers warm reset in 3000 (ms)
All tests have passed!!
Prints will be stopped after reset
Prints will be stopped after reset
Prints will be stopped after reset
'' ''
'' ''
'' ''
Prints will be stopped after reset