xWRL6432 MMWAVE-L-SDK  05.01.00.04
edma/v0/edma.h
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1 /*
2  * Copyright (C) 2021 Texas Instruments Incorporated
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
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9  * notice, this list of conditions and the following disclaimer.
10  *
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12  * notice, this list of conditions and the following disclaimer in the
13  * documentation and/or other materials provided with the
14  * distribution.
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18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
61 #ifndef EDMA_V0_H_
62 #define EDMA_V0_H_
63 
64 #ifdef __cplusplus
65 extern "C" {
66 #endif
67 
68 /* ========================================================================== */
69 /* Include Files */
70 /* ========================================================================== */
71 
72 #include <drivers/hw_include/cslr_edma.h>
73 #include <drivers/hw_include/cslr_soc.h>
74 #include <drivers/hw_include/tistdtypes.h>
75 #include <kernel/dpl/SystemP.h>
76 #include <kernel/dpl/HwiP.h>
77 
78 /* ========================================================================== */
79 /* Macros */
80 /* ========================================================================== */
85 #define EDMACC_DMAQNUM_CLR(chNum) \
86  (~((uint32_t) 0x7U << (((chNum) % 8U) * 4U)))
87 
88 #define EDMACC_DMAQNUM_SET(chNum, queNum) \
89  (((uint32_t) 0x7U & (queNum)) << (((chNum) % 8U) * 4U))
90 
91 #define EDMACC_QDMAQNUM_CLR(chNum) \
92  (~((uint32_t) 0x7U << ((chNum) * 4U)))
93 
94 #define EDMACC_QDMAQNUM_SET(chNum, queNum) \
95  (((uint32_t) 0x7U & (queNum)) << ((chNum) * 4U))
96 
103 #define EDMACC_QCHMAP_PAENTRY_CLR ((uint32_t) (~((uint32_t)EDMA_TPCC_QCHMAPN_PAENTRY_MASK)))
104 
105 #define EDMACC_QCHMAP_PAENTRY_SET(paRAMId) \
106  (((EDMA_TPCC_QCHMAPN_PAENTRY_MASK >> EDMA_TPCC_QCHMAPN_PAENTRY_SHIFT) \
107  & (paRAMId)) << EDMA_TPCC_QCHMAPN_PAENTRY_SHIFT) \
108 
109 #define EDMACC_QCHMAP_TRWORD_CLR ((uint32_t) (~((uint32_t)EDMA_TPCC_QCHMAPN_TRWORD_MASK)))
110 
111 #define EDMACC_QCHMAP_TRWORD_SET(paRAMId) \
112  (((EDMA_TPCC_QCHMAPN_TRWORD_MASK >> EDMA_TPCC_QCHMAPN_TRWORD_SHIFT) & \
113  (paRAMId)) << EDMA_TPCC_QCHMAPN_TRWORD_SHIFT)
114 
121 #define EDMA_TRIG_MODE_MANUAL ((uint32_t) 0U)
122 
123 #define EDMA_TRIG_MODE_QDMA ((uint32_t) 1U)
124 
125 #define EDMA_TRIG_MODE_EVENT ((uint32_t) 2U)
126 
135 #define EDMA_CHANNEL_TYPE_DMA ((uint32_t) 0U)
136 
137 #define EDMA_CHANNEL_TYPE_QDMA ((uint32_t) 1U)
138 
147 #define EDMA_XFER_COMPLETE ((uint32_t) 0U)
148 
149 #define EDMA_CC_DMA_EVT_MISS ((uint32_t) 1U)
150 
151 #define EDMA_CC_QDMA_EVT_MISS ((uint32_t) 2U)
152 
163 #define EDMA_SYNC_A ((uint32_t) 0U)
164 
165 #define EDMA_SYNC_AB ((uint32_t) 1U)
166 
176 #define EDMA_ADDRESSING_MODE_LINEAR ((uint32_t) 0U)
177 
178 #define EDMA_ADDRESSING_MODE_FIFO_WRAP ((uint32_t) 1U)
179 
189 #define EDMA_FIFO_WIDTH_8BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH8BIT)
190 
191 #define EDMA_FIFO_WIDTH_16BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH16BIT)
192 
193 #define EDMA_FIFO_WIDTH_32BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH32BIT)
194 
195 #define EDMA_FIFO_WIDTH_64BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH64BIT)
196 
197 #define EDMA_FIFO_WIDTH_128BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH128BIT)
198 
199 #define EDMA_FIFO_WIDTH_256BIT ((uint32_t) DMA_TPCC_OPT_FWID_FIFOWIDTH256BIT)
200 
209 #define EDMACC_CLR_TCCERR ((uint32_t) EDMA_TPCC_CCERRCLR_TCERR_MASK)
210 
211 #define EDMACC_CLR_QTHRQ0 ((uint32_t) EDMA_TPCC_CCERRCLR_QTHRXCD0_MASK)
212 
213 #define EDMACC_CLR_QTHRQ1 ((uint32_t) EDMA_TPCC_CCERRCLR_QTHRXCD1_MASK)
214 
222 #define EDMA_OPT_TCCHEN_MASK ((uint32_t) EDMA_TPCC_OPT_TCCHEN_MASK)
223 
224 #define EDMA_OPT_ITCCHEN_MASK ((uint32_t) EDMA_TPCC_OPT_ITCCHEN_MASK)
225 
226 #define EDMA_OPT_TCINTEN_MASK ((uint32_t) EDMA_TPCC_OPT_TCINTEN_MASK)
227 
228 #define EDMA_OPT_ITCINTEN_MASK ((uint32_t) EDMA_TPCC_OPT_ITCINTEN_MASK)
229 
230 #define EDMA_OPT_TCC_MASK ((uint32_t) EDMA_TPCC_OPT_TCC_MASK)
231 
232 #define EDMA_OPT_TCC_SHIFT ((uint32_t) EDMA_TPCC_OPT_TCC_SHIFT)
233 
234 #define EDMA_OPT_SYNCDIM_MASK ((uint32_t) EDMA_TPCC_OPT_SYNCDIM_MASK)
235 
236 #define EDMA_OPT_SYNCDIM_SHIFT ((uint32_t) EDMA_TPCC_OPT_SYNCDIM_SHIFT)
237 
238 #define EDMA_OPT_STATIC_MASK ((uint32_t) EDMA_TPCC_OPT_STATIC_MASK)
239 
240 #define EDMA_OPT_STATIC_SHIFT ((uint32_t) EDMA_TPCC_OPT_STATIC_SHIFT)
241 
242 #define EDMACC_OPT_TCC_CLR ((uint32_t) (~EDMA_TPCC_OPT_TCC_MASK))
243 
244 #define EDMACC_OPT_TCC_SET(tcc) \
245  (((EDMA_TPCC_OPT_TCC_MASK >> EDMA_TPCC_OPT_TCC_SHIFT) & (tcc)) << \
246  EDMA_TPCC_OPT_TCC_SHIFT)
247 
255 #define EDMACC_PARAM_ENTRY_OPT ((uint32_t) 0x0U)
256 
257 #define EDMACC_PARAM_ENTRY_SRC ((uint32_t) 0x1U)
258 
259 #define EDMACC_PARAM_ENTRY_ACNT_BCNT ((uint32_t) 0x2U)
260 
261 #define EDMACC_PARAM_ENTRY_DST ((uint32_t) 0x3U)
262 
263 #define EDMACC_PARAM_ENTRY_SRC_DST_BIDX ((uint32_t) 0x4U)
264 
265 #define EDMACC_PARAM_ENTRY_LINK_BCNTRLD ((uint32_t) 0x5U)
266 
267 #define EDMACC_PARAM_ENTRY_SRC_DST_CIDX ((uint32_t) 0x6U)
268 
269 #define EDMACC_PARAM_ENTRY_CCNT ((uint32_t) 0x7U)
270 
271 #define EDMACC_PARAM_FIELD_OFFSET ((uint32_t) 0x4U)
272 
273 #define EDMACC_PARAM_ENTRY_FIELDS ((uint32_t) 0x8U)
274 
278 #define EDMA_NUM_TCC ((uint32_t) SOC_EDMA_NUM_DMACH)
279 
288 #define EDMA_RESOURCE_TYPE_DMA ((uint32_t) 0U)
289 
290 #define EDMA_RESOURCE_TYPE_QDMA ((uint32_t) 1U)
291 
292 #define EDMA_RESOURCE_TYPE_TCC ((uint32_t) 2U)
293 
294 #define EDMA_RESOURCE_TYPE_PARAM ((uint32_t) 3U)
295 
296 #define EDMA_RESOURCE_ALLOC_ANY ((uint32_t) 0xFFFFU)
297 
300 #define EDMA_SET_ALL_BITS ((uint32_t) 0xFFFFFFFFU)
301 
302 #define EDMA_CLR_ALL_BITS ((uint32_t) 0x00000000U)
303 
304 #define EDMACC_COMPL_HANDLER_RETRY_COUNT ((uint32_t) 10U)
305 
306 #define EDMACC_ERR_HANDLER_RETRY_COUNT ((uint32_t) 10U)
307 
309 /* ========================================================================== */
310 /* Structures */
311 /* ========================================================================== */
317 typedef struct {
318  /* \brief OPT field of PaRAM Set */
319  uint32_t opt;
324  uint32_t srcAddr;
325  /* \brief Number of bytes in each Array (ACNT) */
326  uint16_t aCnt;
327  /* \brief Number of Arrays in each Frame (BCNT) */
328  uint16_t bCnt;
334  uint32_t destAddr;
335  /* \brief Index between consec. arrays of a Source Frame (SRCBIDX) */
336  int16_t srcBIdx;
337  /* \brief Index between consec. arrays of a Destination Frame (DSTBIDX) */
338  int16_t destBIdx;
344  uint16_t linkAddr;
349  uint16_t bCntReload;
350  /* \brief Index between consecutive frames of a Source Block (SRCCIDX) */
351  int16_t srcCIdx;
352  /* \brief Index between consecutive frames of a Dest Block (DSTCIDX) */
353  int16_t destCIdx;
354  /* \brief Number of Frames in a block (CCNT) */
355  uint16_t cCnt;
356  /* \brief Reserved bit field (Should not be written with a non zero value) */
357  uint16_t reserved;
358 
359 } __attribute__((packed))
360 EDMACCPaRAMEntry;
361 
366 typedef struct
367 {
372  uint32_t dmaCh[SOC_EDMA_NUM_DMACH/32U];
373  /* \brief QDMA channels allocated. Each channel will be defined with 1 bit. */
374  uint32_t qdmaCh;
379  uint32_t tcc[EDMA_NUM_TCC/32U];
384  uint32_t paramSet[SOC_EDMA_NUM_PARAMSETS/32U];
386 
391 typedef struct {
392  /* \brief EDMA region to be used */
393  uint32_t regionId;
394  /* \brief EDMA Event queue to be used for all channels */
395  uint32_t queNum;
396  /* \brief Parameter to reset the PaRAM memory of the owned PaRAMs */
397  uint32_t initParamSet;
398  /* \brief owned resource configuration */
399  EDMA_ResourceObject ownResource;
400  /* \brief Dma channels reserved for Event triggered transfers */
401  uint32_t reservedDmaCh[SOC_EDMA_NUM_DMACH/32U];
403 
407 typedef struct
408 {
409  uint32_t intrEnable;
411 } EDMA_Params;
412 
416 typedef struct Edma_IntrObject_t *Edma_IntrHandle;
417 
421 typedef void (*Edma_EventCallback)(Edma_IntrHandle intrHandle,
422  void *appData);
423 
431 typedef struct Edma_IntrObject_t
432 {
433  /* \brief TCC number for which the callback to be reistered. */
434  uint32_t tccNum;
435  /* \brief Application data pointer passed to callback function. */
436  void *appData;
437  /* \brief Callback function pointer. */
443  Edma_IntrHandle nextIntr;
448  Edma_IntrHandle prevIntr;
450 
452 typedef void *EDMA_Handle;
453 
457 typedef struct
458 {
459  /*
460  * User parameters
461  */
462  EDMA_Handle handle;
464  EDMA_Params openPrms;
466  uint32_t isOpen;
468  EDMA_ResourceObject allocResource;
470  void *hwiHandle;
472  HwiP_Object hwiObj;
474  Edma_IntrHandle firstIntr;
475 } EDMA_Object;
476 
478 typedef struct
479 {
480  /*
481  * SOC configuration
482  */
483  uint32_t baseAddr;
485  EDMA_InitParams initPrms;
487  uint32_t compIntrNumber;
489  uint32_t intrAggEnableAddr;
491  uint32_t intrAggEnableMask;
493  uint32_t intrAggStatusAddr;
495  uint32_t intrAggClearMask;
497 } EDMA_Attrs;
498 
502 typedef struct
503 {
504  EDMA_Attrs *attrs;
506  EDMA_Object *object;
509 
511 extern EDMA_Config gEdmaConfig[];
513 extern uint32_t gEdmaConfigNum;
516 
517 /* ========================================================================== */
518 /* Function Declarations */
519 /* ========================================================================== */
520 
530 void EDMA_InitParams_init(EDMA_InitParams *initParam);
531 
538 void EDMACCPaRAMEntry_init(EDMACCPaRAMEntry *paramEntry);
539 
564 void EDMAEnableChInShadowRegRegion(uint32_t baseAddr,
565  uint32_t regionId,
566  uint32_t chType,
567  uint32_t chNum);
568 
593 void EDMADisableChInShadowRegRegion(uint32_t baseAddr,
594  uint32_t regionId,
595  uint32_t chType,
596  uint32_t chNum);
597 
611 void EDMAChannelToParamMap(uint32_t baseAddr,
612  uint32_t channel,
613  uint32_t paramSet);
614 
639 void EDMAMapChToEvtQ(uint32_t baseAddr,
640  uint32_t chType,
641  uint32_t chNum,
642  uint32_t evtQNum);
643 
664 void EDMAUnmapChToEvtQ(uint32_t baseAddr,
665  uint32_t chType,
666  uint32_t chNum);
667 
690 void EDMAMapQdmaChToPaRAM(uint32_t baseAddr,
691  uint32_t chNum,
692  const uint32_t *paRAMId);
693 
711 uint32_t EDMAGetMappedPaRAM(uint32_t baseAddr,
712  uint32_t chNum,
713  uint32_t chType,
714  uint32_t *paramId);
733 void EDMASetQdmaTrigWord(uint32_t baseAddr,
734  uint32_t chNum,
735  uint32_t trigWord);
736 
748 void EDMAClrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
749 
763 void EDMAQdmaClrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
764 
780 void EDMAClrCCErr(uint32_t baseAddr, uint32_t flags);
781 
795 void EDMASetEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
796 
810 void EDMAClrEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
811 
826 void EDMAEnableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
827 
843 void EDMADisableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
844 
859 void EDMAEnableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
860 
875 void EDMADisableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
876 
889 uint32_t EDMAGetIntrStatusRegion(uint32_t baseAddr, uint32_t regionId);
890 
906 void EDMAEnableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
907 
923 void EDMADisableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
924 
937 void EDMAClrIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t value);
938 
951 uint32_t EDMAGetEnabledIntrRegion(uint32_t baseAddr, uint32_t regionId);
952 
965 uint32_t EDMAGetEnabledIntrHighRegion(uint32_t baseAddr, uint32_t regionId);
966 
980 void EDMAGetPaRAM(uint32_t baseAddr,
981  uint32_t paRAMId,
982  EDMACCPaRAMEntry *currPaRAM);
983 
997 void EDMAQdmaGetPaRAM(uint32_t baseAddr,
998  uint32_t paRAMId,
999  EDMACCPaRAMEntry *currPaRAM);
1000 
1020 void EDMASetPaRAM(uint32_t baseAddr,
1021  uint32_t paRAMId,
1022  const EDMACCPaRAMEntry *newPaRAM);
1023 
1044 void EDMAQdmaSetPaRAM(uint32_t baseAddr,
1045  uint32_t paRAMId,
1046  const EDMACCPaRAMEntry *newPaRAM);
1047 
1076 void EDMAQdmaSetPaRAMEntry(uint32_t baseAddr,
1077  uint32_t paRAMId,
1078  uint32_t paRAMEntry,
1079  uint32_t newPaRAMEntryVal);
1080 
1113 uint32_t EDMAQdmaGetPaRAMEntry(uint32_t baseAddr,
1114  uint32_t paRAMId,
1115  uint32_t paRAMEntry);
1116 
1143 void EDMADmaSetPaRAMEntry(uint32_t baseAddr,
1144  uint32_t paRAMId,
1145  uint32_t paRAMEntry,
1146  uint32_t newPaRAMEntryVal);
1147 
1180 uint32_t EDMADmaGetPaRAMEntry(uint32_t baseAddr,
1181  uint32_t paRAMId,
1182  uint32_t paRAMEntry);
1183 
1235 uint32_t EDMAConfigureChannelRegion(uint32_t baseAddr,
1236  uint32_t regionId,
1237  uint32_t chType,
1238  uint32_t chNum,
1239  uint32_t tccNum,
1240  uint32_t paramId,
1241  uint32_t evtQNum);
1242 
1288 uint32_t EDMAFreeChannelRegion(uint32_t baseAddr,
1289  uint32_t regionId,
1290  uint32_t chType,
1291  uint32_t chNum,
1292  uint32_t trigMode,
1293  uint32_t tccNum,
1294  uint32_t evtQNum);
1295 
1336 uint32_t EDMAEnableTransferRegion(uint32_t baseAddr,
1337  uint32_t regionId,
1338  uint32_t chNum,
1339  uint32_t trigMode);
1340 
1373 uint32_t EDMADisableTransferRegion(uint32_t baseAddr,
1374  uint32_t regionId,
1375  uint32_t chNum,
1376  uint32_t trigMode);
1377 
1399 void EDMAClearErrorBitsRegion(uint32_t baseAddr,
1400  uint32_t regionId,
1401  uint32_t chNum,
1402  uint32_t evtQNum);
1403 
1412 uint32_t EDMAGetCCErrStatus(uint32_t baseAddr);
1413 
1423 uint32_t EDMAGetErrIntrStatus(uint32_t baseAddr);
1424 
1433 uint32_t EDMAQdmaGetErrIntrStatus(uint32_t baseAddr);
1434 
1442 uint32_t EDMAPeripheralIdGet(uint32_t baseAddr);
1443 
1455 uint32_t EDMAIntrStatusHighGetRegion(uint32_t baseAddr, uint32_t regionId);
1456 
1470 uint32_t EDMAReadIntrStatusRegion(uint32_t baseAddr, uint32_t regionId, uint32_t tccNum);
1471 
1481 uint32_t EDMAErrIntrHighStatusGet(uint32_t baseAddr);
1482 
1518 void EDMAChainChannel(uint32_t baseAddr,
1519  uint32_t chId1,
1520  uint32_t chId2,
1521  uint32_t chainOptions);
1522 
1556 void EDMALinkChannel(uint32_t baseAddr, uint32_t paRAMId1, uint32_t paRAMId2);
1557 
1562 void EDMA_init(void);
1563 
1568 void EDMA_deinit(void);
1569 
1580 EDMA_Handle EDMA_open(uint32_t index, const EDMA_Params *prms);
1581 
1594 EDMA_Handle EDMA_getHandle(uint32_t index);
1595 
1605 void EDMA_close(EDMA_Handle handle);
1606 
1616 uint32_t EDMA_isInterruptEnabled(EDMA_Handle handle);
1617 
1634 
1651 
1664 uint32_t EDMA_getBaseAddr(EDMA_Handle handle);
1665 
1679 uint32_t EDMA_getRegionId(EDMA_Handle handle);
1680 
1695 int32_t EDMA_allocDmaChannel(EDMA_Handle handle, uint32_t *dmaCh);
1711 int32_t EDMA_allocQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh);
1727 int32_t EDMA_allocTcc(EDMA_Handle handle, uint32_t *tcc);
1743 int32_t EDMA_allocParam(EDMA_Handle handle, uint32_t *param);
1758 int32_t EDMA_freeDmaChannel(EDMA_Handle handle, uint32_t *dmaCh);
1759 
1773 int32_t EDMA_freeQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh);
1774 
1788 int32_t EDMA_freeTcc(EDMA_Handle handle, uint32_t *tcc);
1789 
1803 int32_t EDMA_freeParam(EDMA_Handle handle, uint32_t *param);
1804 
1805 #ifdef __cplusplus
1806 }
1807 #endif
1808 
1809 #endif /* #ifndef EDMA_V0_H_ */
1810 
EDMA_registerIntr
int32_t EDMA_registerIntr(EDMA_Handle handle, Edma_IntrObject *intrObj)
Function to register callback function for a TCC.
EDMA_Config
EDMA Instance Configuration. Pointer to this object is returned as handle by driver open.
Definition: edma/v0/edma.h:520
EDMAQdmaGetErrIntrStatus
uint32_t EDMAQdmaGetErrIntrStatus(uint32_t baseAddr)
This returns QDMA error interrupt status.
EDMA_ResourceObject
EDMA resource allocation structure.
Definition: edma/v0/edma.h:384
EDMAGetEnabledIntrHighRegion
uint32_t EDMAGetEnabledIntrHighRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupt enable status of events which are more than 32.
EDMADisableEvtIntrRegion
void EDMADisableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to clear CC interrupts.
SOC_EDMA_NUM_DMACH
#define SOC_EDMA_NUM_DMACH
Number of Memory Addresses.
Definition: cslr_soc_defines.h:83
EDMAEnableDmaEvtRegion
void EDMAEnableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to enable an DMA event.
EDMAEnableChInShadowRegRegion
void EDMAEnableChInShadowRegRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum)
Enable channel to Shadow region mapping.
EDMAEnableEvtIntrRegion
void EDMAEnableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to enable the transfer completion interrupt generation by the EDMACC for all DMA/QDM...
EDMA_freeTcc
int32_t EDMA_freeTcc(EDMA_Handle handle, uint32_t *tcc)
Function to free the tcc Channel.
EDMAMapQdmaChToPaRAM
void EDMAMapQdmaChToPaRAM(uint32_t baseAddr, uint32_t chNum, const uint32_t *paRAMId)
Enables the user to map a QDMA channel to PaRAM set This API Needs to be called before programming th...
EDMAIntrStatusHighGetRegion
uint32_t EDMAIntrStatusHighGetRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupt status of those events which are greater than 32.
EDMA_init
void EDMA_init(void)
This function initializes the EDMA driver object and controller.
Edma_IntrObject
EDMA interrupt configuration object. The object is passed to the EDMA_registerIntr() function....
Definition: edma/v0/edma.h:449
SystemP.h
EDMA_Object
EDMA driver object.
Definition: edma/v0/edma.h:475
EDMA_unregisterIntr
int32_t EDMA_unregisterIntr(EDMA_Handle handle, Edma_IntrObject *intrObj)
Function to unregister callback function for a TCC.
EDMAClrEvtRegion
void EDMAClrEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Clear an event.
EDMAErrIntrHighStatusGet
uint32_t EDMAErrIntrHighStatusGet(uint32_t baseAddr)
This returns error interrupt status for those events whose event number is greater than 32.
EDMA_getRegionId
uint32_t EDMA_getRegionId(EDMA_Handle handle)
Function to get the edma region.
EDMASetPaRAM
void EDMASetPaRAM(uint32_t baseAddr, uint32_t paRAMId, const EDMACCPaRAMEntry *newPaRAM)
Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (DMA/Link).
EDMASetQdmaTrigWord
void EDMASetQdmaTrigWord(uint32_t baseAddr, uint32_t chNum, uint32_t trigWord)
Assign a Trigger Word to the specified QDMA channel.
EDMAEnableTransferRegion
uint32_t EDMAEnableTransferRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum, uint32_t trigMode)
Start EDMA transfer on the specified channel.
EDMAConfigureChannelRegion
uint32_t EDMAConfigureChannelRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum, uint32_t tccNum, uint32_t paramId, uint32_t evtQNum)
Request a DMA/QDMA/Link channel.
EDMAGetEnabledIntrRegion
uint32_t EDMAGetEnabledIntrRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupt enable status of events which are less than 32.
EDMA_freeDmaChannel
int32_t EDMA_freeDmaChannel(EDMA_Handle handle, uint32_t *dmaCh)
Function to free the Dma Channel.
EDMAGetPaRAM
void EDMAGetPaRAM(uint32_t baseAddr, uint32_t paRAMId, EDMACCPaRAMEntry *currPaRAM)
Retrieve existing PaRAM set associated with specified logical channel (DMA/Link).
Edma_EventCallback
void(* Edma_EventCallback)(Edma_IntrHandle intrHandle, void *appData)
EDMA interrupt callback function prototype.
Definition: edma/v0/edma.h:438
EDMADisableTransferRegion
uint32_t EDMADisableTransferRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum, uint32_t trigMode)
Disable DMA transfer on the specified channel.
EDMAPeripheralIdGet
uint32_t EDMAPeripheralIdGet(uint32_t baseAddr)
This API return the revision Id of the peripheral.
EDMA_getBaseAddr
uint32_t EDMA_getBaseAddr(EDMA_Handle handle)
Function to get the edma base address.
EDMAClrCCErr
void EDMAClrCCErr(uint32_t baseAddr, uint32_t flags)
Enables the user to Clear any Channel controller Errors.
EDMA_InitParams_init
void EDMA_InitParams_init(EDMA_InitParams *initParam)
Structure initialization function for EDMA_InitParams.
SOC_EDMA_NUM_PARAMSETS
#define SOC_EDMA_NUM_PARAMSETS
Number of PaRAM Sets available.
Definition: cslr_soc_defines.h:87
EDMAMapChToEvtQ
void EDMAMapChToEvtQ(uint32_t baseAddr, uint32_t chType, uint32_t chNum, uint32_t evtQNum)
Map channel to Event Queue.
EDMADisableChInShadowRegRegion
void EDMADisableChInShadowRegRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum)
Disable channel to Shadow region mapping.
EDMA_allocDmaChannel
int32_t EDMA_allocDmaChannel(EDMA_Handle handle, uint32_t *dmaCh)
Function to allocate the Dma Channel.
EDMA_close
void EDMA_close(EDMA_Handle handle)
Function to close a EDMA peripheral specified by the EDMA handle.
EDMAQdmaClrMissEvtRegion
void EDMAQdmaClrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Clear any QDMA missed event.
EDMADisableQdmaEvtRegion
void EDMADisableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to disable an QDMA event.
EDMAQdmaSetPaRAM
void EDMAQdmaSetPaRAM(uint32_t baseAddr, uint32_t paRAMId, const EDMACCPaRAMEntry *newPaRAM)
Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (QDMA only).
EDMADmaGetPaRAMEntry
uint32_t EDMADmaGetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry)
Get a particular PaRAM entry of the specified PaRAM set.
EDMAChainChannel
void EDMAChainChannel(uint32_t baseAddr, uint32_t chId1, uint32_t chId2, uint32_t chainOptions)
Chain the two specified channels.
EDMA_Attrs
EDMA instance attributes - used during init time.
Definition: edma/v0/edma.h:496
EDMACCPaRAMEntry_init
void EDMACCPaRAMEntry_init(EDMACCPaRAMEntry *paramEntry)
Clear a PaRAM Set .
HwiP.h
EDMAEnableQdmaEvtRegion
void EDMAEnableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to enable an QDMA event.
EDMAClrMissEvtRegion
void EDMAClrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Clear any missed event.
gEdmaConfigNum
uint32_t gEdmaConfigNum
Externally defined driver configuration array size.
EDMA_allocQdmaChannel
int32_t EDMA_allocQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh)
Function to allocate the Dma Channel.
EDMAReadIntrStatusRegion
uint32_t EDMAReadIntrStatusRegion(uint32_t baseAddr, uint32_t regionId, uint32_t tccNum)
This function reads interrupt status.
EDMAGetCCErrStatus
uint32_t EDMAGetCCErrStatus(uint32_t baseAddr)
This returns EDMA CC error status.
EDMAUnmapChToEvtQ
void EDMAUnmapChToEvtQ(uint32_t baseAddr, uint32_t chType, uint32_t chNum)
Remove Mapping of channel to Event Queue.
EDMADisableDmaEvtRegion
void EDMADisableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Disable an DMA event.
EDMAFreeChannelRegion
uint32_t EDMAFreeChannelRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum, uint32_t trigMode, uint32_t tccNum, uint32_t evtQNum)
Free the specified channel (DMA/QDMA/Link) and its associated resources (PaRAM Set,...
EDMAChannelToParamMap
void EDMAChannelToParamMap(uint32_t baseAddr, uint32_t channel, uint32_t paramSet)
This function maps DMA channel to any of the PaRAM sets in the PaRAM memory map.
EDMA_InitParams
EDMA initialization structure used for EDMAInitialize.
Definition: edma/v0/edma.h:408
EDMADmaSetPaRAMEntry
void EDMADmaSetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry, uint32_t newPaRAMEntryVal)
Set a particular PaRAM set entry of the specified PaRAM set.
Edma_IntrHandle
struct Edma_IntrObject_t * Edma_IntrHandle
EDMA interrupt handle returned from EDMA_registerIntr() function.
Definition: edma/v0/edma.h:433
EDMA_NUM_TCC
#define EDMA_NUM_TCC
Definition: edma/v0/edma.h:295
EDMAQdmaGetPaRAM
void EDMAQdmaGetPaRAM(uint32_t baseAddr, uint32_t paRAMId, EDMACCPaRAMEntry *currPaRAM)
Retrieve existing PaRAM set associated with specified logical channel (QDMA).
HwiP_Object
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:91
EDMAQdmaGetPaRAMEntry
uint32_t EDMAQdmaGetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry)
Get a particular PaRAM entry of the specified PaRAM set.
EDMA_freeParam
int32_t EDMA_freeParam(EDMA_Handle handle, uint32_t *param)
Function to free the Param.
EDMA_open
EDMA_Handle EDMA_open(uint32_t index, const EDMA_Params *prms)
This function opens a given EDMA instance.
EDMAGetMappedPaRAM
uint32_t EDMAGetMappedPaRAM(uint32_t baseAddr, uint32_t chNum, uint32_t chType, uint32_t *paramId)
Returns the PaRAM associated with the DMA/QDMA channel.
__attribute__
EDMA Parameter RAM Set in User Configurable format This is a mapping of the EDMA PaRAM set provided t...
Definition: edma/v0/edma.h:334
EDMA_Handle
void * EDMA_Handle
A handle that is returned from a EDMA_open() call.
Definition: edma/v0/edma.h:469
EDMAGetErrIntrStatus
uint32_t EDMAGetErrIntrStatus(uint32_t baseAddr)
This returns error interrupt status for those events whose event number is less than 32.
EDMALinkChannel
void EDMALinkChannel(uint32_t baseAddr, uint32_t paRAMId1, uint32_t paRAMId2)
Link two channels.
EDMA_allocParam
int32_t EDMA_allocParam(EDMA_Handle handle, uint32_t *param)
Function to allocate the TCC.
EDMA_deinit
void EDMA_deinit(void)
This function Deinitializes the EDMA driver object and controller.
EDMA_getHandle
EDMA_Handle EDMA_getHandle(uint32_t index)
This function returns the handle of an open EDMA Instance from the instance index.
EDMA_freeQdmaChannel
int32_t EDMA_freeQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh)
Function to free the Qdma Channel.
EDMA_Params
EDMA open parameters passed to EDMA_open() function.
Definition: edma/v0/edma.h:425
gEdmaConfig
EDMA_Config gEdmaConfig[]
Externally defined driver configuration array.
gEdmaInitParams
EDMA_InitParams gEdmaInitParams[]
Externally defined driver init parameters array.
EDMA_isInterruptEnabled
uint32_t EDMA_isInterruptEnabled(EDMA_Handle handle)
Function to check if EDMA interrupt is enabled.
EDMASetEvtRegion
void EDMASetEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Set an event. This API helps user to manually set events to initiate DMA transfer...
EDMAGetIntrStatusRegion
uint32_t EDMAGetIntrStatusRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupts status of those events which is less than 32.
EDMAClrIntrRegion
void EDMAClrIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t value)
Enables the user to Clear an Interrupt.
EDMAQdmaSetPaRAMEntry
void EDMAQdmaSetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry, uint32_t newPaRAMEntryVal)
Set a particular PaRAM set entry of the specified PaRAM set.
EDMA_allocTcc
int32_t EDMA_allocTcc(EDMA_Handle handle, uint32_t *tcc)
Function to allocate the Qdma Channel.
EDMAClearErrorBitsRegion
void EDMAClearErrorBitsRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum, uint32_t evtQNum)
Clears Event Register and Error Register for a specific DMA channel and brings back EDMA to its initi...