Introduction

For more details and example usage, see SOC

Sub Modules
	APIs for SOC Reset and Clock Functions

	APIs for SOC Xbars

Functions
static int32_t	MCSPI_lld_isBaseAddrValid (uint32_t baseAddr)
	API to validate MCSPI base address. More...

int32_t	SOC_moduleClockEnable (uint32_t moduleId, uint32_t enable)
	Enable clock to specified module. More...

int32_t	SOC_moduleSetClockFrequency (uint32_t moduleId, uint32_t clkId, uint64_t clkRate)
	Set module clock to specified frequency. More...

const char *	SOC_getCoreName (uint16_t coreId)
	Convert a core ID to a user readable name. More...

uint64_t	SOC_getSelfCpuClk (void)
	Get the clock frequency in Hz of the CPU on which the driver is running. More...

void	SOC_controlModuleLockMMR (uint32_t domainId, uint32_t partition)
	Lock control module partition to prevent writes into control MMRs. More...

void	SOC_controlModuleUnlockMMR (uint32_t domainId, uint32_t partition)
	Unlock control module partition to allow writes into control MMRs. More...

void	SOC_setEpwmTbClk (uint32_t epwmInstance, uint32_t enable)
	Enable or disable ePWM time base clock from Control MMR. More...

void	SOC_setMultipleEpwmTbClk (uint32_t epwmMask, uint32_t enable)
	Enable or disable Multiple ePWM time base clock from Control MMR. More...

void	SOC_enableAdcReference (uint32_t adcInstance)
	Enable ADC references by writing to Control MMR. More...

void	SOC_setEpwmGroup (uint32_t epwmInstance, uint32_t group)
	Configure the ePWM group. More...

void	SOC_selectSdfm1Clk0Source (uint8_t source)
	Select the SDFM1 CLK0 source. More...

void	SOC_gateEpwmClock (uint32_t epwmInstance)
	Gate the ePWM clock. More...

void	SOC_gateFsitxClock (uint32_t fsitxInstance)
	Gate the FSI-TX clock. More...

void	SOC_gateFsirxClock (uint32_t fsirxInstance)
	Gate the FSI-RX clock. More...

void	SOC_gateCmpssaClock (uint32_t cmpssaInstance)
	Gate the CMPSS-A clock. More...

void	SOC_gateCmpssbClock (uint32_t cmpssbInstance)
	Gate the CMPSS-B clock. More...

void	SOC_gateEcapClock (uint32_t ecapInstance)
	Gate the ECAP clock. More...

void	SOC_gateEqepClock (uint32_t eqepInstance)
	Gate the EQEP clock. More...

void	SOC_gateSdfmClock (uint32_t sdfmInstance)
	Gate the SDFM clock. More...

void	SOC_gateDacClock (void)
	Gate the DAC clock. More...

void	SOC_gateAdcClock (uint32_t adcInstance)
	Gate the ADC clock. More...

void	SOC_gateOttoClock (uint32_t ottoInstance)
	Gate the OTTO clock. More...

void	SOC_gateSdfmPllClock (uint32_t sdfmInstance)
	Gate the SDFM PLL clock. More...

void	SOC_gateFsiPllClock (uint32_t fsiInstance)
	Gate the FSI-TX PLL clock. More...

void	SOC_generateEpwmReset (uint32_t ePWMInstance)
	Generate ePWM reset. More...

void	SOC_generateFsiTxReset (uint32_t fsitxInstance)
	Generate FSI-TX reset. More...

void	SOC_generateFsiRxReset (uint32_t fsirxInstance)
	Generate FSI-RX reset. More...

void	SOC_generateCmpssaReset (uint32_t cmpssaInstance)
	Generate CMPSS-A reset. More...

void	SOC_generateCmpssbReset (uint32_t cmpssbInstance)
	Generate CMPSS-B reset. More...

void	SOC_generateEcapReset (uint32_t ecapInstance)
	Generate ECAP reset. More...

void	SOC_generateEqepReset (uint32_t eqepInstance)
	Generate EQEP reset. More...

void	SOC_generateSdfmReset (uint32_t sdfmInstance)
	Generate SDFM reset. More...

void	SOC_generateDacReset (void)
	Generate DAC reset. More...

void	SOC_generateAdcReset (uint32_t adcInstance)
	Generate ADC reset. More...

void	Soc_enableEPWMHalt (uint32_t epwmInstance)
	Halt EPWM with corresponding cPU. More...

void	SOC_generateOttoReset (uint32_t ottoInstance)
	Generate OTTO reset. More...

void	SOC_selectIcssGpiMux (uint8_t pru_instance, uint32_t mask)
	Selection of ICSS GPI MUX. More...

void	SOC_setResetCPSWBit ()
	Setting CPSW hard reset Bit. More...

void	SOC_clearResetCPSWBit ()
	Clearing CPSW hard reset bit. More...

uint64_t	SOC_virtToPhy (void *virtAddr)
	SOC Virtual (CPU) to Physical address translation function. More...

void *	SOC_phyToVirt (uint64_t phyAddr)
	Physical to Virtual (CPU) address translation function. More...

void	SOC_configSlewRate (uint32_t baseAddr, uint32_t bankNum, uint32_t groupNum, uint32_t samplePeriod)
	Configure GPIO pin Slew rate. More...

static int32_t	UART_IsBaseAddrValid (uint32_t baseAddr)
	Macro to validate UART base address. More...

uint32_t	SOC_getFlashDataBaseAddr (void)
	This function gets the SOC mapped data base address of the flash. More...

Macros
#define	MSS_CTRL_PARTITION0 (1)

#define	TOP_CTRL_PARTITION0 (2)

#define	CONTROLSS_CTRL_PARTITION0 (3)

#define	MSS_RCM_PARTITION0 (4)

#define	TOP_RCM_PARTITION0 (5)

#define	KICK_LOCK_VAL (0x00000000U)

#define	KICK0_UNLOCK_VAL (0x01234567U)

#define	KICK1_UNLOCK_VAL (0x0FEDCBA8U)

#define	IS_I2C_BASE_ADDR_VALID(baseAddr)
	Macro to check if the I2C base address is valid. More...

#define	IS_QSPI_BASE_ADDR_VALID(baseAddr) (baseAddr == CSL_QSPI0_U_BASE)
	Macro to check if the QSPI base address is valid. More...

#define	IS_QSPI_MEMORY_MAP_ADDR_VALID(baseAddr)
	Macro to check if the QSPI Memory Mapped address is valid. More...

SOC Domain ID

#define	SOC_DOMAIN_ID_MAIN (0U)

Macro Definition Documentation

◆ SOC_DOMAIN_ID_MAIN

#define SOC_DOMAIN_ID_MAIN (0U)

◆ MSS_CTRL_PARTITION0

#define MSS_CTRL_PARTITION0 (1)

◆ TOP_CTRL_PARTITION0

#define TOP_CTRL_PARTITION0 (2)

◆ CONTROLSS_CTRL_PARTITION0

#define CONTROLSS_CTRL_PARTITION0 (3)

◆ MSS_RCM_PARTITION0

#define MSS_RCM_PARTITION0 (4)

◆ TOP_RCM_PARTITION0

#define TOP_RCM_PARTITION0 (5)

◆ KICK_LOCK_VAL

#define KICK_LOCK_VAL (0x00000000U)

◆ KICK0_UNLOCK_VAL

#define KICK0_UNLOCK_VAL (0x01234567U)

◆ KICK1_UNLOCK_VAL

#define KICK1_UNLOCK_VAL (0x0FEDCBA8U)

◆ IS_I2C_BASE_ADDR_VALID

#define IS_I2C_BASE_ADDR_VALID ( baseAddr )

Value:

                                             ((baseAddr == CSL_I2C0_U_BASE) || \
                                             (baseAddr == CSL_I2C1_U_BASE) || \
                                             (baseAddr == CSL_I2C2_U_BASE) || \
                                             (baseAddr == CSL_I2C3_U_BASE))

Macro to check if the I2C base address is valid.

◆ IS_QSPI_BASE_ADDR_VALID

#define IS_QSPI_BASE_ADDR_VALID ( baseAddr ) (baseAddr == CSL_QSPI0_U_BASE)

Macro to check if the QSPI base address is valid.

◆ IS_QSPI_MEMORY_MAP_ADDR_VALID

#define IS_QSPI_MEMORY_MAP_ADDR_VALID ( baseAddr )

Value:

((baseAddr == CSL_EXT_FLASH0_U_BASE) || \

(baseAddr == CSL_EXT_FLASH1_U_BASE))

Macro to check if the QSPI Memory Mapped address is valid.

Function Documentation

◆ MCSPI_lld_isBaseAddrValid()

static int32_t MCSPI_lld_isBaseAddrValid ( uint32_t baseAddr )

inlinestatic

API to validate MCSPI base address.

◆ SOC_moduleClockEnable()

int32_t SOC_moduleClockEnable	(	uint32_t	moduleId,
		uint32_t	enable
	)

Enable clock to specified module.

Parameters

moduleId	[in] see SOC_RcmPeripheralId for list of module ID's
enable	[in] 1: enable clock to the module, 0: disable clock to the module

Returns: SystemP_SUCCESS Module clock is enabled; SystemP_FAILURE Module clock could not be enabled

◆ SOC_moduleSetClockFrequency()

int32_t SOC_moduleSetClockFrequency	(	uint32_t	moduleId,
		uint32_t	clkId,
		uint64_t	clkRate
	)

Set module clock to specified frequency.

Parameters

moduleId	[in] see SOC_RcmPeripheralId for list of module ID's
clkId	[in] see SOC_RcmPeripheralClockSource for list of clocks
clkRate	[in] Frequency to set in Hz

Returns: SystemP_SUCCESS Module clock is enabled; SystemP_FAILURE Module clock could not be enabled

◆ SOC_getCoreName()

const char* SOC_getCoreName ( uint16_t coreId )

Convert a core ID to a user readable name.

Parameters

coreId [in] see CSL_CoreID

Returns: name as a string

◆ SOC_getSelfCpuClk()

uint64_t SOC_getSelfCpuClk ( void )

Get the clock frequency in Hz of the CPU on which the driver is running.

Returns: Clock frequency in Hz

◆ SOC_controlModuleLockMMR()

void SOC_controlModuleLockMMR	(	uint32_t	domainId,
		uint32_t	partition
	)

Lock control module partition to prevent writes into control MMRs.

Parameters

domainId	[in] See SOC_DomainId_t
partition	[in] Partition number to unlock

◆ SOC_controlModuleUnlockMMR()

void SOC_controlModuleUnlockMMR	(	uint32_t	domainId,
		uint32_t	partition
	)

Unlock control module partition to allow writes into control MMRs.

Parameters

domainId	[in] See SOC_DomainId_t
partition	[in] Partition number to unlock

◆ SOC_setEpwmTbClk()

void SOC_setEpwmTbClk	(	uint32_t	epwmInstance,
		uint32_t	enable
	)

Enable or disable ePWM time base clock from Control MMR.

Parameters

epwmInstance	[in] ePWM instance number [0 - (CSL_EPWM_PER_CNT-1)]
enable	[in] TRUE to enable and FALSE to disable

◆ SOC_setMultipleEpwmTbClk()

void SOC_setMultipleEpwmTbClk	(	uint32_t	epwmMask,
		uint32_t	enable
	)

Enable or disable Multiple ePWM time base clock from Control MMR.

Parameters

epwmMask	[in] ePWM instance Mask [1 - CSL_CONTROLSS_CTRL_EPWM_CLKSYNC_BIT_MAX]
enable	[in] TRUE to enable and FALSE to disable

◆ SOC_enableAdcReference()

void SOC_enableAdcReference ( uint32_t adcInstance )

Enable ADC references by writing to Control MMR.

Parameters

adcInstance [in] ADC instance number [0 - (CSL_ADC_PER_CNT-1)]

◆ SOC_setEpwmGroup()

void SOC_setEpwmGroup	(	uint32_t	epwmInstance,
		uint32_t	group
	)

Configure the ePWM group.

Parameters

epwmInstance	[in] ePWM instance number [0 - (CSL_EPWM_PER_CNT-1)]
group	[in] The group for this ePWM instance [0 - 3]

◆ SOC_selectSdfm1Clk0Source()

void SOC_selectSdfm1Clk0Source ( uint8_t source )

Select the SDFM1 CLK0 source.

Parameters

source [in] Source of SDFM1 CLK0. 0: source is SDFM1 CK0 from Pinmux. 1: source is SDFM0 CK0 from Pinmux

◆ SOC_gateEpwmClock()

void SOC_gateEpwmClock ( uint32_t epwmInstance )

Gate the ePWM clock.

Parameters

epwmInstance [in] ePWM instance number [0 - (CSL_EPWM_PER_CNT-1)]

◆ SOC_gateFsitxClock()

void SOC_gateFsitxClock ( uint32_t fsitxInstance )

Gate the FSI-TX clock.

Parameters

fsitxInstance [in] FSITX instance number [0 - 3]

◆ SOC_gateFsirxClock()

void SOC_gateFsirxClock ( uint32_t fsirxInstance )

Gate the FSI-RX clock.

Parameters

fsirxInstance [in] FSIRX instance number [0 - 3]

◆ SOC_gateCmpssaClock()

void SOC_gateCmpssaClock ( uint32_t cmpssaInstance )

Gate the CMPSS-A clock.

Parameters

cmpssaInstance [in] CMPSS-A instance number [0 - 9]

◆ SOC_gateCmpssbClock()

void SOC_gateCmpssbClock ( uint32_t cmpssbInstance )

Gate the CMPSS-B clock.

Parameters

cmpssbInstance [in] CMPSS-B instance number [0 - 9]

◆ SOC_gateEcapClock()

void SOC_gateEcapClock ( uint32_t ecapInstance )

Gate the ECAP clock.

Parameters

ecapInstance [in] ECAP instance number [0 - 9]

◆ SOC_gateEqepClock()

void SOC_gateEqepClock ( uint32_t eqepInstance )

Gate the EQEP clock.

Parameters

eqepInstance [in] EQEP instance number [0 - 2]

◆ SOC_gateSdfmClock()

void SOC_gateSdfmClock ( uint32_t sdfmInstance )

Gate the SDFM clock.

Parameters

sdfmInstance [in] SDFM instance number [0 - 1]

◆ SOC_gateDacClock()

void SOC_gateDacClock ( void )

Gate the DAC clock.

◆ SOC_gateAdcClock()

void SOC_gateAdcClock ( uint32_t adcInstance )

Gate the ADC clock.

Parameters

adcInstance [in] ADC instance number [0 - 4]

◆ SOC_gateOttoClock()

void SOC_gateOttoClock ( uint32_t ottoInstance )

Gate the OTTO clock.

Parameters

ottoInstance [in] OTTO instance number [0 - 3]

◆ SOC_gateSdfmPllClock()

void SOC_gateSdfmPllClock ( uint32_t sdfmInstance )

Gate the SDFM PLL clock.

Parameters

sdfmInstance [in] SDFM instance number [0 - 1]

◆ SOC_gateFsiPllClock()

void SOC_gateFsiPllClock ( uint32_t fsiInstance )

Gate the FSI-TX PLL clock.

Parameters

fsiInstance [in] FSI instance number [0 - 3]

◆ SOC_generateEpwmReset()

void SOC_generateEpwmReset ( uint32_t ePWMInstance )

Generate ePWM reset.

Parameters

ePWMInstance [in] ePWM instance number [0 - 31]

◆ SOC_generateFsiTxReset()

void SOC_generateFsiTxReset ( uint32_t fsitxInstance )

Generate FSI-TX reset.

Parameters

fsitxInstance [in] FSI instance number [0 - 3]

◆ SOC_generateFsiRxReset()

void SOC_generateFsiRxReset ( uint32_t fsirxInstance )

Generate FSI-RX reset.

Parameters

fsirxInstance [in] FSI instance number [0 - 3]

◆ SOC_generateCmpssaReset()

void SOC_generateCmpssaReset ( uint32_t cmpssaInstance )

Generate CMPSS-A reset.

Parameters

cmpssaInstance [in] CMPSS-A instance number [0 - 9]

◆ SOC_generateCmpssbReset()

void SOC_generateCmpssbReset ( uint32_t cmpssbInstance )

Generate CMPSS-B reset.

Parameters

cmpssbInstance [in] CMPSS-B instance number [0 - 9]

◆ SOC_generateEcapReset()

void SOC_generateEcapReset ( uint32_t ecapInstance )

Generate ECAP reset.

Parameters

ecapInstance [in] ECAP instance number [0 - 9]

◆ SOC_generateEqepReset()

void SOC_generateEqepReset ( uint32_t eqepInstance )

Generate EQEP reset.

Parameters

eqepInstance [in] EQEP instance number [0 - 2]

◆ SOC_generateSdfmReset()

void SOC_generateSdfmReset ( uint32_t sdfmInstance )

Generate SDFM reset.

Parameters

sdfmInstance [in] SDFM instance number [0 - 1]

◆ SOC_generateDacReset()

void SOC_generateDacReset ( void )

Generate DAC reset.

◆ SOC_generateAdcReset()

void SOC_generateAdcReset ( uint32_t adcInstance )

Generate ADC reset.

Parameters

adcInstance [in] ADC instance number [0 - 4]

◆ Soc_enableEPWMHalt()

void Soc_enableEPWMHalt ( uint32_t epwmInstance )

Halt EPWM with corresponding cPU.

Parameters

epwmInstance [in] EPWM instance number [0 - 31]

◆ SOC_generateOttoReset()

void SOC_generateOttoReset ( uint32_t ottoInstance )

Generate OTTO reset.

Parameters

ottoInstance [in] OTTO instance number [0 - 3]

◆ SOC_selectIcssGpiMux()

void SOC_selectIcssGpiMux	(	uint8_t	pru_instance,
		uint32_t	mask
	)

Selection of ICSS GPI MUX.

Parameters

pru_instance	[in] PRU instance number [0 - 1]
mask	[in] Bitwise selection of ICSSM GPI source. GPI or PWMXBar select for ICSSM port 0/1. 0-GPI, 1-PWMXBAR

◆ SOC_setResetCPSWBit()

void SOC_setResetCPSWBit ( )

Setting CPSW hard reset Bit.

◆ SOC_clearResetCPSWBit()

void SOC_clearResetCPSWBit ( )

Clearing CPSW hard reset bit.

◆ SOC_virtToPhy()

uint64_t SOC_virtToPhy ( void * virtAddr )

SOC Virtual (CPU) to Physical address translation function.

Parameters

virtAddr [IN] Virtual/CPU address

Returns: Corresponding SOC physical address

◆ SOC_phyToVirt()

void* SOC_phyToVirt ( uint64_t phyAddr )

Physical to Virtual (CPU) address translation function.

Parameters

phyAddr [IN] Physical address

Returns: Corresponding virtual/CPU address

◆ SOC_configSlewRate()

void SOC_configSlewRate	(	uint32_t	baseAddr,
		uint32_t	bankNum,
		uint32_t	groupNum,
		uint32_t	samplePeriod
	)

Configure GPIO pin Slew rate.

Parameters

baseAddr	Base Address of IOMUX registers (CSL_IOMUX_U_BASE)
bankNum	Bank number of GPIO Pin
groupNum	Group Number where one group register applies to 8 GPIO's. So, one bank will be in two groups. For lower half, pass group number as 0 and for upper half pass 1.
samplePeriod	Sampling period in units of clock cycles.

Note: Qualifier selection should be done for Pad config register using Pinmux_config

◆ UART_IsBaseAddrValid()

static int32_t UART_IsBaseAddrValid ( uint32_t baseAddr )

inlinestatic

Macro to validate UART base address.

API to validate UART base address

◆ SOC_getFlashDataBaseAddr()

uint32_t SOC_getFlashDataBaseAddr ( void )

This function gets the SOC mapped data base address of the flash.

Returns: Data BaseAddress of the flash

Introduction

Sub Modules

Functions

Macros

SOC Domain ID

Macro Definition Documentation

◆ SOC_DOMAIN_ID_MAIN

◆ MSS_CTRL_PARTITION0

◆ TOP_CTRL_PARTITION0

◆ CONTROLSS_CTRL_PARTITION0

◆ MSS_RCM_PARTITION0

◆ TOP_RCM_PARTITION0

◆ KICK_LOCK_VAL

◆ KICK0_UNLOCK_VAL

◆ KICK1_UNLOCK_VAL

◆ IS_I2C_BASE_ADDR_VALID

◆ IS_QSPI_BASE_ADDR_VALID

◆ IS_QSPI_MEMORY_MAP_ADDR_VALID

Function Documentation

◆ MCSPI_lld_isBaseAddrValid()

◆ SOC_moduleClockEnable()

◆ SOC_moduleSetClockFrequency()

◆ SOC_getCoreName()

◆ SOC_getSelfCpuClk()

◆ SOC_controlModuleLockMMR()

◆ SOC_controlModuleUnlockMMR()

◆ SOC_setEpwmTbClk()

◆ SOC_setMultipleEpwmTbClk()

◆ SOC_enableAdcReference()

◆ SOC_setEpwmGroup()

◆ SOC_selectSdfm1Clk0Source()

◆ SOC_gateEpwmClock()

◆ SOC_gateFsitxClock()

◆ SOC_gateFsirxClock()

◆ SOC_gateCmpssaClock()

◆ SOC_gateCmpssbClock()

◆ SOC_gateEcapClock()

◆ SOC_gateEqepClock()

◆ SOC_gateSdfmClock()

◆ SOC_gateDacClock()

◆ SOC_gateAdcClock()

◆ SOC_gateOttoClock()

◆ SOC_gateSdfmPllClock()

◆ SOC_gateFsiPllClock()

◆ SOC_generateEpwmReset()

◆ SOC_generateFsiTxReset()

◆ SOC_generateFsiRxReset()

◆ SOC_generateCmpssaReset()

◆ SOC_generateCmpssbReset()

◆ SOC_generateEcapReset()

◆ SOC_generateEqepReset()

◆ SOC_generateSdfmReset()

◆ SOC_generateDacReset()

◆ SOC_generateAdcReset()

◆ Soc_enableEPWMHalt()

◆ SOC_generateOttoReset()

◆ SOC_selectIcssGpiMux()

◆ SOC_setResetCPSWBit()

◆ SOC_clearResetCPSWBit()

◆ SOC_virtToPhy()

◆ SOC_phyToVirt()

◆ SOC_configSlewRate()

◆ UART_IsBaseAddrValid()

◆ SOC_getFlashDataBaseAddr()