AM243x Motor Control SDK  11.00.00
PRU-ICSS PWM

Table of Contents

Important Notes

  • PRU-ICSS has one PWM module, which has four PWM sets (PWM0, PWM1, PWM2, PWM3)
  • Each Set has six signals (A0, A1, A2, B0, B1, B2) With Reference to Technical Reference Manual, PWM six signals(A0, A1, A2, B0, B1, B2) naming convention is slightly different as mentioned in APIs for PRUICSS PWM
  • Major difference between Arm® Cortex®-R5F based PRUICSS PWM control and PRU based PRUICSS PWM control is below:
    • In PRU based PWM control PRUICSS IEP timer is configured free running and Compare event is used as scheduler in order to update compare events of each axis PWM signals

Features Supported in Arm Cortex-R5F based example

  • Configuration of IEP compare events to produce the PWM outputs
  • Enable Efficiency mode to auto clear compare status on state transition
  • Configuration of duty cycle to each of the PWM outputs
  • Configuration of PWM outputs behavior in Initial state
  • Configuration of PWM outputs behavior in Active state
  • Configuration of PWM outputs behavior in Trip state
  • Configuration of PWM Glitch Filter with Debounce Value
  • Configuration of PWM Deadband
  • Configuration of Tripzone output block to mask trip errors inputs
  • Driver APIs to program Initial, Trip, Active states of PWM outputs

ICSS PRU Resource Usage

PRU Core ICSS Memory Usage IEP Usage Other Peripheral Usage Description
Un-used Un-used IEP CMP events are used. Refer Table 6-441 PWM to IEP Compare mapping of AM243x Technical Reference Manual Un-used This example demonstrates using deadband feature of PRUICSS PWM and synchronizing it with EPWM sync out.
Based on required PRUICSS PWM frequency IEP compare event configuration to generate PRUICSS PWM can be split across multiple R5F cores

SysConfig Features supported

Note
It is strongly recommend to use SysConfig where it is available instead of using direct SW API calls. This will help simplify the SW application and also catch common mistakes early in the development cycle.

SysConfig can be used to configure things mentioned below:

  • Configuration of IEP counter
  • Configuration of PWM frequency
  • Configuration of Duty cycle to each of the PWM outputs
  • Configuration of Fall edge and Rise edge delay which inserts deadband

Features NOT Supported

  • Generate PWM outputs with distinct time period, which means all PRUICSS PWM outputs are generated with same frequency controlled by IEP compare 0 event.
  • Phase shift greater than half of the PWM period.

Example Usage

API Usage

APIs for PRUICSS PWM

Features supported in PRU based example

  • Configuration of IEP compare events to produce the PWM outputs
  • Enable Efficiency mode to auto clear compare status on state transition
  • Configuration of duty cycle to each of the PWM outputs
  • Configuration of PWM outputs behavior in Initial state
  • Configuration of PWM outputs behavior in Active state
  • Configuration of PWM outputs behavior in Trip state
  • Configuration of PWM Glitch Filter with Debounce Value
  • Configuration of PWM Deadband
  • Configuration of Tripzone output block to mask trip errors inputs
  • Configurable phase shift between each axis
  • Each PWM output can have distinct PWM period (NOTE: Current SDK examples uses same period, but it can be modified)

SysConfig Features supported

  • Pinmuxing can be done from Additional Settings of PRU(ICSS) sysconfig module

Example Usage

ICSS PRU Resource Usage

PRU Core ICSS Memory Usage IEP Usage Other Peripheral Usage Description
PRUx
Note : Any PRU can be used 		DMEM0 : 168bytes
Default offset : 0x600 		IEP CMP events are used. Refer Table 6-441 PWM to IEP Compare mapping of AM243x Technical Reference Manual Un-used This example demonstrates PRUICSS PWM generation with phase shifting capabilities.
Based on required PRUICSS PWM frequency, IEP compare event configuration to generate PRUICSS PWM can be split across multiple PRU cores
Note
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