bissc_clk_cfg Struct Reference

Detailed Description

Structure defining EnDat clock configuration for selected frequency.

Rx, Tx divisors for selected frequency, oversampling rate, core_clk/uart clock source status.

Data Fields
uint16_t	rx_div
uint16_t	tx_div
uint16_t	rx_div_attr
uint16_t	is_core_clk

Field Documentation

rx_div

uint16_t bissc_clk_cfg::rx_div

Rx divisor for selected frequency

tx_div

uint16_t bissc_clk_cfg::tx_div

Tx divisor for selected frequency

rx_div_attr

uint16_t bissc_clk_cfg::rx_div_attr

Rx oversampling rate

is_core_clk

uint16_t bissc_clk_cfg::is_core_clk

Status for core_clk clock source