Supported Ethernetip-IOlink-Gateway Features
For EtherNet/IP stack features refer to EtherNet/IP Datasheet .
For IO-Link stack features refer to IO-Link Datasheet .
| Feature | Description |
| Device Profile | Generic Device |
| Device Configuration | EDS File |
| Connection Types | Exclusive Owner |
| Input Only |
| Listen Only |
| Max. IO-Link Ports | 8 |
| Max. cyclic data input length | 12 Bytes |
| Max. cyclic data output length | 12 Bytes |
| Operating modes | Autostart |
| DI/DO |
| Supported ISDU indexes | 0, 1, 16 and 18 |
Task Priorities
| Task | Prio | Changeable | Description |
| IOL Led Task | 2 | yes | Controls LEDs on the board |
| SMI UART Task | 7 | yes | UART Tool communication interface |
| IOLM_EXMPL_loop | 8 | yes | Controls port status of the IO-Link ports |
| IOLM_CyclicIO | 8 | yes | Cyclic I/O communication after Forward_open connection is established |
| cmn_app_task(EI_APP_TASK_main) | 8 | yes | Cyclically calls run functions of EtherNet/IP Adapter and device profile
|
| NVM_APP_WriteAsyncTask | 8 | yes | Asyncronous write to non-volatile memory |
| lldpRcv | 8 | yes | Stack LLDP |
| SMI Lwip | 10 | yes | SMI LWIP interface
|
| phymdix task | 12 | yes | Stack MDIX Configuration |
| statistic | 14 | yes | Stack statistics |
| tcpip_thread | 14 | yes | LWIP thread |
| cyclicio | 20 | yes | Stack cyclic communication |
| packet | 20 | yes | Stack explicit messages |
| RxTask | 20 | yes | FWHAL RX Task |
| LinkTask | 24 | yes | FWHAL Link Task |
| IOLM_MAIN_loop | 25 | yes | run IO-Link stack related functions |
General Stack Parameters
Stack Memory Usage
| EIP-IOL-Gateway Example Project | Read Only Memory | 442351 Bytes |
| Random Access Memory | 874768 Bytes |
| Total Memory | 1317119 Bytes |
Stack CPU Load
| Target | CPU Load (1 Dev/1ms) |
| AM64x | 16.5% |
| AM243x | 15.1% |
| AM261x | 26.9% |