Supported EtherNet/IP™ Functionality

Feature	Description	Standard	Premium
EtherNet/IP Device Class	Adapter	Yes	Yes
EtherNet/IP Device Class	Scanner	No	No
Device Profile Examples	Generic Device (0x2B) General Purpose Discrete I/O Device (0x07)	Yes	Yes
Device Configuration	EDS File	Yes	Yes
Connection Types	Exclusive Owner	Yes	Yes
	Input Only	Yes	Yes
	Listen Only	Yes	Yes
Connection Trigger Types	Cyclic	Yes	Yes
	Application Triggered	No	No
	Change of State	Yes	Yes
Maximum Connections	Class 1	8	8
Maximum Connections	Class 3	32	32
Explicit Messaging	Connected	Yes	Yes
Explicit Messaging	Unconnected	Yes	Yes
Standard Objects	Identity Object (0x01)	Yes	Yes
	Message Router Object (0x02)	Yes	Yes
	Assembly Object (0x04)	Yes	Yes
	Connection Manager Object (0x06)	Yes	Yes
	Time Sync Object (0x43)	Yes	Yes
	Device Level Ring Object (0x47)	Yes	Yes
	QoS Object (0x48)	Yes	Yes
	TCP/IP Interface Object (0xF5)	Yes	Yes
	Ethernet Link Object (0xF6)	Yes	Yes
	LLDP Management Object (0x109)	Yes	Yes
	LLDP Data Table Object (0x10A)	Yes	Yes
Supported Elementary Data Types	BOOL	Yes	Yes
	SINT	Yes	Yes
	INT	Yes	Yes
	DINT	Yes	Yes
	LINT	Yes	Yes
	USINT	Yes	Yes
	UINT	Yes	Yes
	UDINT	Yes	Yes
	ULINT	Yes	Yes
	REAL	Yes	Yes
	LREAL	Yes	Yes
	STRING	Planned	Planned
	BYTE	Yes	Yes
	WORD	Yes	Yes
	DWORD	Yes	Yes
	LWORD	Yes	Yes
	STRING2	Planned	Planned
	SHORT_STRING	Yes	Yes
	EPATH	Yes	Yes
Supported Constructed Data Types	Formal Array	Yes	Yes
IP Addressing Modes	DHCP	Yes	Yes
	BOOTP	Yes	Yes
	Static	Yes	Yes
VLAN tagging	IEEE802.1Q, 3 bit PCP (8 levels)	Yes	Yes
VLAN tagging	Switch queues	4	4
Statistics	Media counters supported per interface (dual port switch)	Yes	Yes
Statistics	Interface counters supported per interface	Yes	Yes
CIP Sync (PTP/IEEE1588)	Supports Drives Profile : E2E clock	Yes	Yes
	PTP over UDP	Yes	Yes
	Transparent Clock supported	Yes	Yes
	Ordinary Clock supported	Yes	Yes
	Single and Two Step Clock supported	Yes	Yes
Supported Network Features	Link Layer Discovery Protocol (LLDP)	Yes	Yes
	Device Level Ring (DLR)	Yes	Yes
	Device Level Ring Supervisor (DLR Supervisor) ℹ️	No	Yes
	Address Conflict Detection (ACD)	Yes	Yes
	Quality of Service (QoS)	Yes	Yes
	CIP Reset Services	Identity Object Reset Services of Typ 0, 1, and 2	Identity Object Reset Services of Typ 0, 1, and 2
Device Level Ring (DLR)	Beacon based	Yes	Yes
	Self configuring	Yes	Yes
	Min. beacon interval	200 µs	200 µs
	Min. beacon timeout	400 µs	400 µs
Baud Rate	100 Mbit/s	Yes	Yes
Baud Rate	10 Mbit/s	Yes	Yes
Duplex Mode	Half	Yes	Yes
	Full	Yes	Yes
	Auto Negotiation	Yes	Yes
Conformance		ODVA CT21	ODVA CT21

‍ℹ️ This feature is part of premium SDK. In case you are using standard and need premium, please contact your regional TI sales representative for additional details.

Key Performance Parameters

Feature	Description	Setting
Process Data Image	max. I/O assembly (size)	1480 Bytes
Connection Trigger Types and Cycle Times	Cyclic (Class 1)	1 ms
Connection Trigger Types and Cycle Times	Change of State	1 ms
Bridge Delay	Min Bridge Delay	2.71 μs
Bridge Delay	Max Bridge Delay	3.19 μs

Task Priorities

Task	Prio	Changeable	Description
uart_task	2	yes	UART printing
cmn_app_task	8	yes	User application
lldpRcv	8	yes	Stack LLDP
WriteEeprom	8	yes	Write thread for non volatile data
WriteFlash	8	yes	Write thread for non volatile data
phymdix task	12	yes	Stack MDIX Configuration
statistic	14	yes	Stack statistics
tcpip_thread	14	yes	LWIP thread
TimeSync_Background	14	yes	TimeSync Driver
TimeSync_NRT	16	yes	TimeSync Driver
cyclicio	20	yes	Stack cyclic communication
packet	20	yes	Stack explicit messages
RxTask	20	yes	FWHAL RX Task
TimeSync_DelayReqTx	20	yes	TimeSync Driver
TimeSync_TxTimestamp_P1	20	yes	TimeSync Driver
TimeSync_TxTimestamp_P2	20	yes	TimeSync Driver
linkTask	24	yes	FWHAL Link Task

All priorities are changeable, but it is highly recommended to not change the order.

General Stack Parameters

The table below lists resource requirement for the Generic Device (0x2B) and Discrete I/O Device (0x07) examples. Please note that this application has only a limited functional scope that does not contain the basic web server that is include with the example code. More complex application code will result in higher ROM and RAM requirements.

Stack Memory Usage (TMDS243EVM)
	Generic Device	Discrete I/O
Code	281.85 kB	289.25 kB
RO Data	76.96 kB	78.53 kB
RW Data	575.84 kB	575.98 kB

Stack Memory Usage (LP-AM243)
	Generic Device	Discrete I/O
Code	281.84 kB	289.24 kB
RO Data	76.95 kB	78.53 kB
RW Data	575.21 kB	575.35 kB

EtherNet/IP QuickConnect™

Scope

QuickConnect is an optional functionality that may be enabled on a node-by-node basis. When enabled, QuickConnect will allow EtherNet/IP devices to quickly power up and join an EtherNet/IP network.

QuickConnect connection time is comprised of several key time phases. One factor of the QuickConnect connection time is the devices power-up time. Another factor is the amount of time it takes a controller to detect the newly attached device and send a Forward Open request to start the connection process.

QuickConnect targets 500 ms as the time between initial power-up and the establisment of IO connections.

EtherNet/IP QuickConnect Target

QuickConnect measurements have been performed on the Texas Instruments LP-AM243 LaunchPad™ development kit and the TMDS64EVM AM64x evaluation module with an attached TMDS64DC01EVM AM64x IO-link and high-speed breakout card.

For the measurements an oscilloscope is connected to a GPIO pin on the particular board which was set to high on application start and reset to low on the first Forward Open request. The measurements were triggered by the MCU_PORz signals available on the evaluation modules. The power-up time is the time interval between the MCU_PORz signal and application start. The connection establishment is the time interval between application start and the detection of the Forward Open request.

Evaluation Module	MCU_PORz Signal	GPIO	Pin
LP-AM243	Header J6 pin 56	GPIO1_21	Header J7 pin 57
TMDS64EVM	Safety connector pin 24	GPIO0_41	TMDS64DC01EVM, header J8 pin 24

To enable GPIO control the example application shipped with the EtherNet/IP Adapter software is extended by two functions:

uint32_t    gpioBaseAddr;
 
void GPIO_init(void)
{
    gpioBaseAddr = (uint32_t) AddrTranslateP_getLocalAddr(CONFIG_GPIO0_BASE_ADDR);
    GPIO_setDirMode(gpioBaseAddr, CONFIG_GPIO0_PIN, CONFIG_GPIO0_DIR);
}
 
void GPIO_set(bool set)
{
    if(set)
        GPIO_pinWriteHigh(gpioBaseAddr, CONFIG_GPIO0_PIN);
    else
        GPIO_pinWriteLow(gpioBaseAddr, CONFIG_GPIO0_PIN);
}

GPIO_init and GPIO_set are called in App.c at application start and later in the Forward Open callback function.

void EI_APP_mainTask(
    void* pvTaskArg_p)
{
    uint32_t err;
 
    Board_init();
 
    Drivers_open();
    Board_driversOpen();
    GPIO_init();
    GPIO_set(true);
 
    ......

EtherNet/IP QuickConnect Controller

The QuickConnect controller device is emulated by a Python script that triggers the connection establishment upon detection of ARP announce frames.

ARP announce frame received	Request of TCP connection	Request of Register Session	Forward Open request
0.0 ms	2.494 ms	15.215 ms	26.398 ms

EtherNet/IP QuickConnect Measurement Results

Evaluation Module	Application start	Forward Open Request
LP-AM243	252 ms	318 ms
TMDS64EVM	180 ms	269 ms