AM263x Digital Power SDK  09.01.00

Detailed Description

Defines the SPLL_3PH_SRF structure.

This software module implements a software phase lock loop based on synchronous reference frame for grid connection to three phase grid

Data Fields

float32_t v_q [2]
 Rotating reference frame Q-axis value. More...
 
float32_t ylf [2]
 Data buffer for loop filter output. More...
 
float32_t fo
 Output frequency of PLL. More...
 
float32_t fn
 Nominal frequency. More...
 
float32_t theta [2]
 Grid phase angle. More...
 
float32_t delta_t
 Inverse of the ISR rate at which module is called. More...
 
SPLL_3PH_SRF_LPF_COEFF lpf_coeff
 Loop filter coefficients. More...
 

Field Documentation

◆ v_q

float32_t SPLL_3PH_SRF::v_q[2]

Rotating reference frame Q-axis value.

◆ ylf

float32_t SPLL_3PH_SRF::ylf[2]

Data buffer for loop filter output.

◆ fo

float32_t SPLL_3PH_SRF::fo

Output frequency of PLL.

◆ fn

float32_t SPLL_3PH_SRF::fn

Nominal frequency.

◆ theta

float32_t SPLL_3PH_SRF::theta[2]

Grid phase angle.

◆ delta_t

float32_t SPLL_3PH_SRF::delta_t

Inverse of the ISR rate at which module is called.

◆ lpf_coeff

SPLL_3PH_SRF_LPF_COEFF SPLL_3PH_SRF::lpf_coeff

Loop filter coefficients.