7 #ifndef __MSP430WARE_ADC12_B_H__
8 #define __MSP430WARE_ADC12_B_H__
10 #include "inc/hw_memmap.h"
12 #ifdef __MSP430_HAS_ADC12_B__
25 #include "inc/hw_memmap.h"
209 #define ADC12_B_CLOCKDIVIDER_1 (ADC12DIV_0)
210 #define ADC12_B_CLOCKDIVIDER_2 (ADC12DIV_1)
211 #define ADC12_B_CLOCKDIVIDER_3 (ADC12DIV_2)
212 #define ADC12_B_CLOCKDIVIDER_4 (ADC12DIV_3)
213 #define ADC12_B_CLOCKDIVIDER_5 (ADC12DIV_4)
214 #define ADC12_B_CLOCKDIVIDER_6 (ADC12DIV_5)
215 #define ADC12_B_CLOCKDIVIDER_7 (ADC12DIV_6)
216 #define ADC12_B_CLOCKDIVIDER_8 (ADC12DIV_7)
225 #define ADC12_B_CLOCKSOURCE_ADC12OSC (ADC12SSEL_0)
226 #define ADC12_B_CLOCKSOURCE_ACLK (ADC12SSEL_1)
227 #define ADC12_B_CLOCKSOURCE_MCLK (ADC12SSEL_2)
228 #define ADC12_B_CLOCKSOURCE_SMCLK (ADC12SSEL_3)
237 #define ADC12_B_CLOCKPREDIVIDER__1 (ADC12PDIV__1)
238 #define ADC12_B_CLOCKPREDIVIDER__4 (ADC12PDIV__4)
239 #define ADC12_B_CLOCKPREDIVIDER__32 (ADC12PDIV__32)
240 #define ADC12_B_CLOCKPREDIVIDER__64 (ADC12PDIV__64)
249 #define ADC12_B_SAMPLEHOLDSOURCE_SC (ADC12SHS_0)
250 #define ADC12_B_SAMPLEHOLDSOURCE_1 (ADC12SHS_1)
251 #define ADC12_B_SAMPLEHOLDSOURCE_2 (ADC12SHS_2)
252 #define ADC12_B_SAMPLEHOLDSOURCE_3 (ADC12SHS_3)
253 #define ADC12_B_SAMPLEHOLDSOURCE_4 (ADC12SHS_4)
254 #define ADC12_B_SAMPLEHOLDSOURCE_5 (ADC12SHS_5)
255 #define ADC12_B_SAMPLEHOLDSOURCE_6 (ADC12SHS_6)
256 #define ADC12_B_SAMPLEHOLDSOURCE_7 (ADC12SHS_7)
265 #define ADC12_B_MAPINTCH3 (ADC12ICH3MAP)
266 #define ADC12_B_MAPINTCH2 (ADC12ICH2MAP)
267 #define ADC12_B_MAPINTCH1 (ADC12ICH1MAP)
268 #define ADC12_B_MAPINTCH0 (ADC12ICH0MAP)
269 #define ADC12_B_TEMPSENSEMAP (ADC12TCMAP)
270 #define ADC12_B_BATTMAP (ADC12BATMAP)
271 #define ADC12_B_NOINTCH (0x00)
281 #define ADC12_B_CYCLEHOLD_4_CYCLES (ADC12SHT0_0)
282 #define ADC12_B_CYCLEHOLD_8_CYCLES (ADC12SHT0_1)
283 #define ADC12_B_CYCLEHOLD_16_CYCLES (ADC12SHT0_2)
284 #define ADC12_B_CYCLEHOLD_32_CYCLES (ADC12SHT0_3)
285 #define ADC12_B_CYCLEHOLD_64_CYCLES (ADC12SHT0_4)
286 #define ADC12_B_CYCLEHOLD_96_CYCLES (ADC12SHT0_5)
287 #define ADC12_B_CYCLEHOLD_128_CYCLES (ADC12SHT0_6)
288 #define ADC12_B_CYCLEHOLD_192_CYCLES (ADC12SHT0_7)
289 #define ADC12_B_CYCLEHOLD_256_CYCLES (ADC12SHT0_8)
290 #define ADC12_B_CYCLEHOLD_384_CYCLES (ADC12SHT0_9)
291 #define ADC12_B_CYCLEHOLD_512_CYCLES (ADC12SHT0_10)
292 #define ADC12_B_CYCLEHOLD_768_CYCLES (ADC12SHT0_11)
293 #define ADC12_B_CYCLEHOLD_1024_CYCLES (ADC12SHT0_12)
301 #define ADC12_B_MULTIPLESAMPLESDISABLE (!(ADC12MSC))
302 #define ADC12_B_MULTIPLESAMPLESENABLE (ADC12MSC)
310 #define ADC12_B_DIFFERENTIAL_MODE_DISABLE (0x00)
311 #define ADC12_B_DIFFERENTIAL_MODE_ENABLE (ADC12DIF)
319 #define ADC12_B_NOTENDOFSEQUENCE (!(ADC12EOS))
320 #define ADC12_B_ENDOFSEQUENCE (ADC12EOS)
328 #define ADC12_B_VREFPOS_AVCC_VREFNEG_VSS (ADC12VRSEL_0)
329 #define ADC12_B_VREFPOS_INTBUF_VREFNEG_VSS (ADC12VRSEL_1)
330 #define ADC12_B_VREFPOS_EXTNEG_VREFNEG_VSS (ADC12VRSEL_2)
331 #define ADC12_B_VREFPOS_EXTBUF_VREFNEG_VSS (ADC12VRSEL_3)
332 #define ADC12_B_VREFPOS_EXTPOS_VREFNEG_VSS (ADC12VRSEL_4)
333 #define ADC12_B_VREFPOS_AVCC_VREFNEG_EXTBUF (ADC12VRSEL_5)
334 #define ADC12_B_VREFPOS_AVCC_VREFNEG_EXTPOS (ADC12VRSEL_6)
335 #define ADC12_B_VREFPOS_INTBUF_VREFNEG_EXTPOS (ADC12VRSEL_7)
336 #define ADC12_B_VREFPOS_AVCC_VREFNEG_INTBUF (ADC12VRSEL_9)
337 #define ADC12_B_VREFPOS_EXTPOS_VREFNEG_INTBUF (ADC12VRSEL_11)
338 #define ADC12_B_VREFPOS_AVCC_VREFNEG_EXTNEG (ADC12VRSEL_12)
339 #define ADC12_B_VREFPOS_INTBUF_VREFNEG_EXTNEG (ADC12VRSEL_13)
340 #define ADC12_B_VREFPOS_EXTPOS_VREFNEG_EXTNEG (ADC12VRSEL_14)
341 #define ADC12_B_VREFPOS_EXTBUF_VREFNEG_EXTNEG (ADC12VRSEL_15)
349 #define ADC12_B_INPUT_A0 (ADC12INCH_0)
350 #define ADC12_B_INPUT_A1 (ADC12INCH_1)
351 #define ADC12_B_INPUT_A2 (ADC12INCH_2)
352 #define ADC12_B_INPUT_A3 (ADC12INCH_3)
353 #define ADC12_B_INPUT_A4 (ADC12INCH_4)
354 #define ADC12_B_INPUT_A5 (ADC12INCH_5)
355 #define ADC12_B_INPUT_A6 (ADC12INCH_6)
356 #define ADC12_B_INPUT_A7 (ADC12INCH_7)
357 #define ADC12_B_INPUT_A8 (ADC12INCH_8)
358 #define ADC12_B_INPUT_A9 (ADC12INCH_9)
359 #define ADC12_B_INPUT_A10 (ADC12INCH_10)
360 #define ADC12_B_INPUT_A11 (ADC12INCH_11)
361 #define ADC12_B_INPUT_A12 (ADC12INCH_12)
362 #define ADC12_B_INPUT_A13 (ADC12INCH_13)
363 #define ADC12_B_INPUT_A14 (ADC12INCH_14)
364 #define ADC12_B_INPUT_A15 (ADC12INCH_15)
365 #define ADC12_B_INPUT_A16 (ADC12INCH_16)
366 #define ADC12_B_INPUT_A17 (ADC12INCH_17)
367 #define ADC12_B_INPUT_A18 (ADC12INCH_18)
368 #define ADC12_B_INPUT_A19 (ADC12INCH_19)
369 #define ADC12_B_INPUT_A20 (ADC12INCH_20)
370 #define ADC12_B_INPUT_A21 (ADC12INCH_21)
371 #define ADC12_B_INPUT_A22 (ADC12INCH_22)
372 #define ADC12_B_INPUT_A23 (ADC12INCH_23)
373 #define ADC12_B_INPUT_A24 (ADC12INCH_24)
374 #define ADC12_B_INPUT_A25 (ADC12INCH_25)
375 #define ADC12_B_INPUT_A26 (ADC12INCH_26)
376 #define ADC12_B_INPUT_A27 (ADC12INCH_27)
377 #define ADC12_B_INPUT_A28 (ADC12INCH_28)
378 #define ADC12_B_INPUT_A29 (ADC12INCH_29)
379 #define ADC12_B_INPUT_TCMAP (ADC12INCH_30)
380 #define ADC12_B_INPUT_BATMAP (ADC12INCH_31)
388 #define ADC12_B_WINDOW_COMPARATOR_DISABLE (0x00)
389 #define ADC12_B_WINDOW_COMPARATOR_ENABLE (ADC12WINC)
399 #define ADC12_B_MEMORY_0 (0x00)
400 #define ADC12_B_MEMORY_1 (0x02)
401 #define ADC12_B_MEMORY_2 (0x04)
402 #define ADC12_B_MEMORY_3 (0x06)
403 #define ADC12_B_MEMORY_4 (0x08)
404 #define ADC12_B_MEMORY_5 (0x0A)
405 #define ADC12_B_MEMORY_6 (0x0C)
406 #define ADC12_B_MEMORY_7 (0x0E)
407 #define ADC12_B_MEMORY_8 (0x10)
408 #define ADC12_B_MEMORY_9 (0x12)
409 #define ADC12_B_MEMORY_10 (0x14)
410 #define ADC12_B_MEMORY_11 (0x16)
411 #define ADC12_B_MEMORY_12 (0x18)
412 #define ADC12_B_MEMORY_13 (0x1A)
413 #define ADC12_B_MEMORY_14 (0x1C)
414 #define ADC12_B_MEMORY_15 (0x1E)
415 #define ADC12_B_MEMORY_16 (0x20)
416 #define ADC12_B_MEMORY_17 (0x22)
417 #define ADC12_B_MEMORY_18 (0x24)
418 #define ADC12_B_MEMORY_19 (0x26)
419 #define ADC12_B_MEMORY_20 (0x28)
420 #define ADC12_B_MEMORY_21 (0x2A)
421 #define ADC12_B_MEMORY_22 (0x2C)
422 #define ADC12_B_MEMORY_23 (0x2E)
423 #define ADC12_B_MEMORY_24 (0x30)
424 #define ADC12_B_MEMORY_25 (0x32)
425 #define ADC12_B_MEMORY_26 (0x34)
426 #define ADC12_B_MEMORY_27 (0x36)
427 #define ADC12_B_MEMORY_28 (0x38)
428 #define ADC12_B_MEMORY_29 (0x3A)
429 #define ADC12_B_MEMORY_30 (0x3C)
430 #define ADC12_B_MEMORY_31 (0x3E)
438 #define ADC12_B_IE0 (ADC12IE0)
439 #define ADC12_B_IE1 (ADC12IE1)
440 #define ADC12_B_IE2 (ADC12IE2)
441 #define ADC12_B_IE3 (ADC12IE3)
442 #define ADC12_B_IE4 (ADC12IE4)
443 #define ADC12_B_IE5 (ADC12IE5)
444 #define ADC12_B_IE6 (ADC12IE6)
445 #define ADC12_B_IE7 (ADC12IE7)
446 #define ADC12_B_IE8 (ADC12IE8)
447 #define ADC12_B_IE9 (ADC12IE9)
448 #define ADC12_B_IE10 (ADC12IE10)
449 #define ADC12_B_IE11 (ADC12IE11)
450 #define ADC12_B_IE12 (ADC12IE12)
451 #define ADC12_B_IE13 (ADC12IE13)
452 #define ADC12_B_IE14 (ADC12IE14)
453 #define ADC12_B_IE15 (ADC12IE15)
461 #define ADC12_B_IE16 (ADC12IE16)
462 #define ADC12_B_IE17 (ADC12IE17)
463 #define ADC12_B_IE18 (ADC12IE18)
464 #define ADC12_B_IE19 (ADC12IE19)
465 #define ADC12_B_IE20 (ADC12IE20)
466 #define ADC12_B_IE21 (ADC12IE21)
467 #define ADC12_B_IE22 (ADC12IE22)
468 #define ADC12_B_IE23 (ADC12IE23)
469 #define ADC12_B_IE24 (ADC12IE24)
470 #define ADC12_B_IE25 (ADC12IE25)
471 #define ADC12_B_IE26 (ADC12IE26)
472 #define ADC12_B_IE27 (ADC12IE27)
473 #define ADC12_B_IE28 (ADC12IE28)
474 #define ADC12_B_IE29 (ADC12IE29)
475 #define ADC12_B_IE30 (ADC12IE30)
476 #define ADC12_B_IE31 (ADC12IE31)
484 #define ADC12_B_INIE (ADC12INIE)
485 #define ADC12_B_LOIE (ADC12LOIE)
486 #define ADC12_B_HIIE (ADC12HIIE)
487 #define ADC12_B_OVIE (ADC12OVIE)
488 #define ADC12_B_TOVIE (ADC12TOVIE)
489 #define ADC12_B_RDYIE (ADC12RDYIE)
498 #define ADC12_B_IFG0 (ADC12IFG0)
499 #define ADC12_B_IFG1 (ADC12IFG1)
500 #define ADC12_B_IFG2 (ADC12IFG2)
501 #define ADC12_B_IFG3 (ADC12IFG3)
502 #define ADC12_B_IFG4 (ADC12IFG4)
503 #define ADC12_B_IFG5 (ADC12IFG5)
504 #define ADC12_B_IFG6 (ADC12IFG6)
505 #define ADC12_B_IFG7 (ADC12IFG7)
506 #define ADC12_B_IFG8 (ADC12IFG8)
507 #define ADC12_B_IFG9 (ADC12IFG9)
508 #define ADC12_B_IFG10 (ADC12IFG10)
509 #define ADC12_B_IFG11 (ADC12IFG11)
510 #define ADC12_B_IFG12 (ADC12IFG12)
511 #define ADC12_B_IFG13 (ADC12IFG13)
512 #define ADC12_B_IFG14 (ADC12IFG14)
513 #define ADC12_B_IFG15 (ADC12IFG15)
514 #define ADC12_B_IFG16 (ADC12IFG16)
515 #define ADC12_B_IFG17 (ADC12IFG17)
516 #define ADC12_B_IFG18 (ADC12IFG18)
517 #define ADC12_B_IFG19 (ADC12IFG19)
518 #define ADC12_B_IFG20 (ADC12IFG20)
519 #define ADC12_B_IFG21 (ADC12IFG21)
520 #define ADC12_B_IFG22 (ADC12IFG22)
521 #define ADC12_B_IFG23 (ADC12IFG23)
522 #define ADC12_B_IFG24 (ADC12IFG24)
523 #define ADC12_B_IFG25 (ADC12IFG25)
524 #define ADC12_B_IFG26 (ADC12IFG26)
525 #define ADC12_B_IFG27 (ADC12IFG27)
526 #define ADC12_B_IFG28 (ADC12IFG28)
527 #define ADC12_B_IFG29 (ADC12IFG29)
528 #define ADC12_B_IFG30 (ADC12IFG30)
529 #define ADC12_B_IFG31 (ADC12IFG31)
530 #define ADC12_B_INIFG (ADC12INIFG)
531 #define ADC12_B_LOIFG (ADC12LOIFG)
532 #define ADC12_B_HIIFG (ADC12HIIFG)
533 #define ADC12_B_OVIFG (ADC12OVIFG)
534 #define ADC12_B_TOVIFG (ADC12TOVIFG)
535 #define ADC12_B_RDYIFG (ADC12RDYIFG)
543 #define ADC12_B_START_AT_ADC12MEM0 (ADC12CSTARTADD_0)
544 #define ADC12_B_START_AT_ADC12MEM1 (ADC12CSTARTADD_1)
545 #define ADC12_B_START_AT_ADC12MEM2 (ADC12CSTARTADD_2)
546 #define ADC12_B_START_AT_ADC12MEM3 (ADC12CSTARTADD_3)
547 #define ADC12_B_START_AT_ADC12MEM4 (ADC12CSTARTADD_4)
548 #define ADC12_B_START_AT_ADC12MEM5 (ADC12CSTARTADD_5)
549 #define ADC12_B_START_AT_ADC12MEM6 (ADC12CSTARTADD_6)
550 #define ADC12_B_START_AT_ADC12MEM7 (ADC12CSTARTADD_7)
551 #define ADC12_B_START_AT_ADC12MEM8 (ADC12CSTARTADD_8)
552 #define ADC12_B_START_AT_ADC12MEM9 (ADC12CSTARTADD_9)
553 #define ADC12_B_START_AT_ADC12MEM10 (ADC12CSTARTADD_10)
554 #define ADC12_B_START_AT_ADC12MEM11 (ADC12CSTARTADD_11)
555 #define ADC12_B_START_AT_ADC12MEM12 (ADC12CSTARTADD_12)
556 #define ADC12_B_START_AT_ADC12MEM13 (ADC12CSTARTADD_13)
557 #define ADC12_B_START_AT_ADC12MEM14 (ADC12CSTARTADD_14)
558 #define ADC12_B_START_AT_ADC12MEM15 (ADC12CSTARTADD_15)
559 #define ADC12_B_START_AT_ADC12MEM16 (ADC12CSTARTADD_16)
560 #define ADC12_B_START_AT_ADC12MEM17 (ADC12CSTARTADD_17)
561 #define ADC12_B_START_AT_ADC12MEM18 (ADC12CSTARTADD_18)
562 #define ADC12_B_START_AT_ADC12MEM19 (ADC12CSTARTADD_19)
563 #define ADC12_B_START_AT_ADC12MEM20 (ADC12CSTARTADD_20)
564 #define ADC12_B_START_AT_ADC12MEM21 (ADC12CSTARTADD_21)
565 #define ADC12_B_START_AT_ADC12MEM22 (ADC12CSTARTADD_22)
566 #define ADC12_B_START_AT_ADC12MEM23 (ADC12CSTARTADD_23)
567 #define ADC12_B_START_AT_ADC12MEM24 (ADC12CSTARTADD_24)
568 #define ADC12_B_START_AT_ADC12MEM25 (ADC12CSTARTADD_25)
569 #define ADC12_B_START_AT_ADC12MEM26 (ADC12CSTARTADD_26)
570 #define ADC12_B_START_AT_ADC12MEM27 (ADC12CSTARTADD_27)
571 #define ADC12_B_START_AT_ADC12MEM28 (ADC12CSTARTADD_28)
572 #define ADC12_B_START_AT_ADC12MEM29 (ADC12CSTARTADD_29)
573 #define ADC12_B_START_AT_ADC12MEM30 (ADC12CSTARTADD_30)
574 #define ADC12_B_START_AT_ADC12MEM31 (ADC12CSTARTADD_31)
583 #define ADC12_B_SINGLECHANNEL (ADC12CONSEQ_0)
584 #define ADC12_B_SEQOFCHANNELS (ADC12CONSEQ_1)
585 #define ADC12_B_REPEATED_SINGLECHANNEL (ADC12CONSEQ_2)
586 #define ADC12_B_REPEATED_SEQOFCHANNELS (ADC12CONSEQ_3)
594 #define ADC12_B_COMPLETECONVERSION false
595 #define ADC12_B_PREEMPTCONVERSION true
603 #define ADC12_B_RESOLUTION_8BIT (ADC12RES__8BIT)
604 #define ADC12_B_RESOLUTION_10BIT (ADC12RES__10BIT)
605 #define ADC12_B_RESOLUTION_12BIT (ADC12RES__12BIT)
613 #define ADC12_B_NONINVERTEDSIGNAL (!(ADC12ISSH))
614 #define ADC12_B_INVERTEDSIGNAL (ADC12ISSH)
622 #define ADC12_B_UNSIGNED_BINARY (!(ADC12DF))
623 #define ADC12_B_SIGNED_2SCOMPLEMENT (ADC12DF)
631 #define ADC12_B_REGULARPOWERMODE (!(ADC12PWRMD))
632 #define ADC12_B_LOWPOWERMODE (ADC12PWRMD)
640 #define ADC12_B_NOTBUSY 0x00
641 #define ADC12_B_BUSY ADC12BUSY
766 uint16_t clockCycleHoldCountLowMem,
767 uint16_t clockCycleHoldCountHighMem,
768 uint16_t multipleSamplesEnabled);
823 uint16_t highThreshold,
824 uint16_t lowThreshold);
906 uint16_t interruptMask0,
907 uint16_t interruptMask1,
908 uint16_t interruptMask2);
990 uint16_t interruptMask0,
991 uint16_t interruptMask1,
992 uint16_t interruptMask2);
1054 uint8_t interruptRegisterChoice,
1055 uint16_t memoryInterruptFlagMask);
1119 uint8_t interruptRegisterChoice,
1120 uint16_t memoryInterruptFlagMask);
1199 uint16_t startingMemoryBufferIndex,
1200 uint8_t conversionSequenceModeSelect);
1286 uint8_t memoryBufferIndex);
1307 uint8_t resolutionSelect);
1333 uint16_t invertedSignal);
1358 uint8_t readBackFormat);
1433 uint8_t memoryIndex);
1464 #endif // __MSP430WARE_ADC12_B_H__
uint16_t sampleHoldSignalSourceSelect
Definition: adc12_b.h:44
void ADC12_B_clearInterrupt(uint16_t baseAddress, uint8_t interruptRegisterChoice, uint16_t memoryInterruptFlagMask)
Clears ADC12B selected interrupt flags.
Definition: adc12_b.c:150
uint32_t ADC12_B_getMemoryAddressForDMA(uint16_t baseAddress, uint8_t memoryIndex)
Returns the address of the specified memory buffer for the DMA module.
Definition: adc12_b.c:231
void ADC12_B_disableInterrupt(uint16_t baseAddress, uint16_t interruptMask0, uint16_t interruptMask1, uint16_t interruptMask2)
Disables selected ADC12B interrupt sources.
Definition: adc12_b.c:140
void ADC12_B_setWindowCompAdvanced(uint16_t baseAddress, uint16_t highThreshold, uint16_t lowThreshold)
Sets the high and low threshold for the window comparator feature.
Definition: adc12_b.c:122
void ADC12_B_setupSamplingTimer(uint16_t baseAddress, uint16_t clockCycleHoldCountLowMem, uint16_t clockCycleHoldCountHighMem, uint16_t multipleSamplesEnabled)
Sets up and enables the Sampling Timer Pulse Mode.
Definition: adc12_b.c:73
void ADC12_B_disable(uint16_t baseAddress)
Disables the ADC12B block.
Definition: adc12_b.c:64
void ADC12_B_configureMemory(uint16_t baseAddress, ADC12_B_configureMemoryParam *param)
Configures the controls of the selected memory buffer.
Definition: adc12_b.c:95
void ADC12_B_setResolution(uint16_t baseAddress, uint8_t resolutionSelect)
Use to change the resolution of the converted data.
Definition: adc12_b.c:203
Used in the ADC12_B_init() function as the param parameter.
Definition: adc12_b.h:31
void ADC12_B_setSampleHoldSignalInversion(uint16_t baseAddress, uint16_t invertedSignal)
Use to invert or un-invert the sample/hold signal.
Definition: adc12_b.c:210
uint16_t ADC12_B_getInterruptStatus(uint16_t baseAddress, uint8_t interruptRegisterChoice, uint16_t memoryInterruptFlagMask)
Returns the status of the selected memory interrupt flags.
Definition: adc12_b.c:159
void ADC12_B_enableInterrupt(uint16_t baseAddress, uint16_t interruptMask0, uint16_t interruptMask1, uint16_t interruptMask2)
Enables selected ADC12B interrupt sources.
Definition: adc12_b.c:130
void ADC12_B_setDataReadBackFormat(uint16_t baseAddress, uint8_t readBackFormat)
Use to set the read-back format of the converted data.
Definition: adc12_b.c:217
uint8_t ADC12_B_isBusy(uint16_t baseAddress)
Returns the busy status of the ADC12B core.
Definition: adc12_b.c:238
bool ADC12_B_init(uint16_t baseAddress, ADC12_B_initParam *param)
Initializes the ADC12B Module.
Definition: adc12_b.c:21
void ADC12_B_disableSamplingTimer(uint16_t baseAddress)
Disables Sampling Timer Pulse Mode.
Definition: adc12_b.c:90
uint16_t ADC12_B_getResults(uint16_t baseAddress, uint8_t memoryBufferIndex)
Returns the raw contents of the specified memory buffer.
Definition: adc12_b.c:197
void ADC12_B_startConversion(uint16_t baseAddress, uint16_t startingMemoryBufferIndex, uint8_t conversionSequenceModeSelect)
Enables/Starts an Analog-to-Digital Conversion.
Definition: adc12_b.c:167
uint16_t clockSourcePredivider
Definition: adc12_b.h:71
uint16_t clockSourceDivider
Definition: adc12_b.h:64
uint16_t internalChannelMap
Definition: adc12_b.h:81
void ADC12_B_disableConversions(uint16_t baseAddress, bool preempt)
Disables the ADC from converting any more signals.
Definition: adc12_b.c:183
void ADC12_B_setAdcPowerMode(uint16_t baseAddress, uint8_t powerMode)
Use to set the ADC's power conservation mode if the sampling rate is at 50-ksps or less...
Definition: adc12_b.c:224
void ADC12_B_enable(uint16_t baseAddress)
Enables the ADC12B block.
Definition: adc12_b.c:55
uint8_t clockSourceSelect
Definition: adc12_b.h:53