Go to the documentation of this file.00001 #ifndef __MSP430WARE_DMA_H__
00002 #define __MSP430WARE_DMA_H__
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00010 #define __MSP430_HAS_DMAX_3__
00011 #define __MSP430_HAS_DMAX_6__
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00019 #define DMA_CHANNEL_0 (0x00)
00020 #define DMA_CHANNEL_1 (0x10)
00021 #define DMA_CHANNEL_2 (0x20)
00022 #define DMA_CHANNEL_3 (0x30)
00023 #define DMA_CHANNEL_4 (0x40)
00024 #define DMA_CHANNEL_5 (0x50)
00025 #define DMA_CHANNEL_6 (0x60)
00026 #define DMA_CHANNEL_7 (0x70)
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00034 #define DMA_TRANSFER_SINGLE (DMADT_0)
00035 #define DMA_TRANSFER_BLOCK (DMADT_1)
00036 #define DMA_TRANSFER_BURSTBLOCK (DMADT_2)
00037 #define DMA_TRANSFER_REPEATED_SINGLE (DMADT_4)
00038 #define DMA_TRANSFER_REPEATED_BLOCK (DMADT_5)
00039 #define DMA_TRANSFER_REPEATED_BURSTBLOCK (DMADT_6)
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00047 #define DMA_TRIGGERSOURCE_0 (0x00)
00048 #define DMA_TRIGGERSOURCE_1 (0x01)
00049 #define DMA_TRIGGERSOURCE_2 (0x02)
00050 #define DMA_TRIGGERSOURCE_3 (0x03)
00051 #define DMA_TRIGGERSOURCE_4 (0x04)
00052 #define DMA_TRIGGERSOURCE_5 (0x05)
00053 #define DMA_TRIGGERSOURCE_6 (0x06)
00054 #define DMA_TRIGGERSOURCE_7 (0x07)
00055 #define DMA_TRIGGERSOURCE_8 (0x08)
00056 #define DMA_TRIGGERSOURCE_9 (0x09)
00057 #define DMA_TRIGGERSOURCE_10 (0x0A)
00058 #define DMA_TRIGGERSOURCE_11 (0x0B)
00059 #define DMA_TRIGGERSOURCE_12 (0x0C)
00060 #define DMA_TRIGGERSOURCE_13 (0x0D)
00061 #define DMA_TRIGGERSOURCE_14 (0x0E)
00062 #define DMA_TRIGGERSOURCE_15 (0x0F)
00063 #define DMA_TRIGGERSOURCE_16 (0x10)
00064 #define DMA_TRIGGERSOURCE_17 (0x11)
00065 #define DMA_TRIGGERSOURCE_18 (0x12)
00066 #define DMA_TRIGGERSOURCE_19 (0x13)
00067 #define DMA_TRIGGERSOURCE_20 (0x14)
00068 #define DMA_TRIGGERSOURCE_21 (0x15)
00069 #define DMA_TRIGGERSOURCE_22 (0x16)
00070 #define DMA_TRIGGERSOURCE_23 (0x17)
00071 #define DMA_TRIGGERSOURCE_24 (0x18)
00072 #define DMA_TRIGGERSOURCE_25 (0x19)
00073 #define DMA_TRIGGERSOURCE_26 (0x1A)
00074 #define DMA_TRIGGERSOURCE_27 (0x1B)
00075 #define DMA_TRIGGERSOURCE_28 (0x1C)
00076 #define DMA_TRIGGERSOURCE_29 (0x1D)
00077 #define DMA_TRIGGERSOURCE_30 (0x1E)
00078 #define DMA_TRIGGERSOURCE_31 (0x1F)
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00086 #define DMA_DIRECTION_UNCHANGED (DMASRCINCR_0)
00087 #define DMA_DIRECTION_DECREMENT (DMASRCINCR_2)
00088 #define DMA_DIRECTION_INCREMENT (DMASRCINCR_3)
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00096 #define DMA_SIZE_SRCWORD_DSTWORD ( !(DMASRCBYTE + DMADSTBYTE) )
00097 #define DMA_SIZE_SRCBYTE_DSTWORD (DMASRCBYTE)
00098 #define DMA_SIZE_SRCWORD_DSTBYTE (DMADSTBYTE)
00099 #define DMA_SIZE_SRCBYTE_DSTBYTE (DMASRCBYTE + DMADSTBYTE)
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00107 #define DMA_TRIGGER_RISINGEDGE ( !(DMALEVEL) )
00108 #define DMA_TRIGGER_HIGH (DMALEVEL)
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00115 #define DMA_INT_INACTIVE (0x0)
00116 #define DMA_INT_ACTIVE (0x1)
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00123 #define DMA_NOTABORTED (0x0)
00124 #define DMA_ABORTED (0x1)
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00131 extern unsigned short DMA_init (unsigned int baseAddress,
00132 unsigned char channelSelect,
00133 unsigned int transferModeSelect,
00134 unsigned int transferSize,
00135 unsigned char triggerSourceSelect,
00136 unsigned char transferUnitSelect,
00137 unsigned char triggerTypeSelect);
00138
00139 void DMA_setTransferSize (unsigned int baseAddress,
00140 unsigned char channelSelect,
00141 unsigned int transferSize);
00142
00143 extern void DMA_setSrcAddress (unsigned int baseAddress,
00144 unsigned char channelSelect,
00145 unsigned long srcAddress,
00146 unsigned int directionSelect);
00147
00148 extern void DMA_setDstAddress (unsigned int baseAddress,
00149 unsigned char channelSelect,
00150 unsigned long dstAddress,
00151 unsigned int directionSelect);
00152
00153 extern void DMA_enableTransfers (unsigned int baseAddress,
00154 unsigned char channelSelect);
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00156 extern void DMA_disableTransfers (unsigned int baseAddress,
00157 unsigned char channelSelect);
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00159 extern void DMA_startTransfer (unsigned int baseAddress,
00160 unsigned char channelSelect);
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00162 extern void DMA_enableInterrupt (unsigned int baseAddress,
00163 unsigned char channelSelect);
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00165 extern void DMA_disableInterrupt (unsigned int baseAddress,
00166 unsigned char channelSelect);
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00168 extern unsigned short DMA_getInterruptStatus (unsigned int baseAddress,
00169 unsigned char channelSelect);
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00171 extern void DMA_clearInterrupt (unsigned int baseAddress,
00172 unsigned char channelSelect);
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00174 extern unsigned short DMA_NMIAbortStatus (unsigned int baseAddress,
00175 unsigned char channelSelect);
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00177 extern void DMA_clearNMIAbort (unsigned int baseAddress,
00178 unsigned char channelSelect);
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00180 extern void DMA_disableTransferDuringReadModifyWrite (unsigned int baseAddress);
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00182 extern void DMA_enableTransferDuringReadModifyWrite (unsigned int baseAddress);
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00184 extern void DMA_enableRoundRobinPriority (unsigned int baseAddress);
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00186 extern void DMA_disableRoundRobinPriority (unsigned int baseAddress);
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00188 extern void DMA_enableNMIAbort (unsigned int baseAddress);
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00190 extern void DMA_disableNMIAbort (unsigned int baseAddress);
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00192 #endif