Defines |
#define | __MSP430_HAS_DMAX_3__ |
#define | __MSP430_HAS_DMAX_6__ |
#define | DMA_CHANNEL_0 (0x00) |
#define | DMA_CHANNEL_1 (0x10) |
#define | DMA_CHANNEL_2 (0x20) |
#define | DMA_CHANNEL_3 (0x30) |
#define | DMA_CHANNEL_4 (0x40) |
#define | DMA_CHANNEL_5 (0x50) |
#define | DMA_CHANNEL_6 (0x60) |
#define | DMA_CHANNEL_7 (0x70) |
#define | DMA_TRANSFER_SINGLE (DMADT_0) |
#define | DMA_TRANSFER_BLOCK (DMADT_1) |
#define | DMA_TRANSFER_BURSTBLOCK (DMADT_2) |
#define | DMA_TRANSFER_REPEATED_SINGLE (DMADT_4) |
#define | DMA_TRANSFER_REPEATED_BLOCK (DMADT_5) |
#define | DMA_TRANSFER_REPEATED_BURSTBLOCK (DMADT_6) |
#define | DMA_TRIGGERSOURCE_0 (0x00) |
#define | DMA_TRIGGERSOURCE_1 (0x01) |
#define | DMA_TRIGGERSOURCE_2 (0x02) |
#define | DMA_TRIGGERSOURCE_3 (0x03) |
#define | DMA_TRIGGERSOURCE_4 (0x04) |
#define | DMA_TRIGGERSOURCE_5 (0x05) |
#define | DMA_TRIGGERSOURCE_6 (0x06) |
#define | DMA_TRIGGERSOURCE_7 (0x07) |
#define | DMA_TRIGGERSOURCE_8 (0x08) |
#define | DMA_TRIGGERSOURCE_9 (0x09) |
#define | DMA_TRIGGERSOURCE_10 (0x0A) |
#define | DMA_TRIGGERSOURCE_11 (0x0B) |
#define | DMA_TRIGGERSOURCE_12 (0x0C) |
#define | DMA_TRIGGERSOURCE_13 (0x0D) |
#define | DMA_TRIGGERSOURCE_14 (0x0E) |
#define | DMA_TRIGGERSOURCE_15 (0x0F) |
#define | DMA_TRIGGERSOURCE_16 (0x10) |
#define | DMA_TRIGGERSOURCE_17 (0x11) |
#define | DMA_TRIGGERSOURCE_18 (0x12) |
#define | DMA_TRIGGERSOURCE_19 (0x13) |
#define | DMA_TRIGGERSOURCE_20 (0x14) |
#define | DMA_TRIGGERSOURCE_21 (0x15) |
#define | DMA_TRIGGERSOURCE_22 (0x16) |
#define | DMA_TRIGGERSOURCE_23 (0x17) |
#define | DMA_TRIGGERSOURCE_24 (0x18) |
#define | DMA_TRIGGERSOURCE_25 (0x19) |
#define | DMA_TRIGGERSOURCE_26 (0x1A) |
#define | DMA_TRIGGERSOURCE_27 (0x1B) |
#define | DMA_TRIGGERSOURCE_28 (0x1C) |
#define | DMA_TRIGGERSOURCE_29 (0x1D) |
#define | DMA_TRIGGERSOURCE_30 (0x1E) |
#define | DMA_TRIGGERSOURCE_31 (0x1F) |
#define | DMA_DIRECTION_UNCHANGED (DMASRCINCR_0) |
#define | DMA_DIRECTION_DECREMENT (DMASRCINCR_2) |
#define | DMA_DIRECTION_INCREMENT (DMASRCINCR_3) |
#define | DMA_SIZE_SRCWORD_DSTWORD ( !(DMASRCBYTE + DMADSTBYTE) ) |
#define | DMA_SIZE_SRCBYTE_DSTWORD (DMASRCBYTE) |
#define | DMA_SIZE_SRCWORD_DSTBYTE (DMADSTBYTE) |
#define | DMA_SIZE_SRCBYTE_DSTBYTE (DMASRCBYTE + DMADSTBYTE) |
#define | DMA_TRIGGER_RISINGEDGE ( !(DMALEVEL) ) |
#define | DMA_TRIGGER_HIGH (DMALEVEL) |
#define | DMA_INT_INACTIVE (0x0) |
#define | DMA_INT_ACTIVE (0x1) |
#define | DMA_NOTABORTED (0x0) |
#define | DMA_ABORTED (0x1) |
Functions |
unsigned short | DMA_init (unsigned int baseAddress, unsigned char channelSelect, unsigned int transferModeSelect, unsigned int transferSize, unsigned char triggerSourceSelect, unsigned char transferUnitSelect, unsigned char triggerTypeSelect) |
void | DMA_setTransferSize (unsigned int baseAddress, unsigned char channelSelect, unsigned int transferSize) |
void | DMA_setSrcAddress (unsigned int baseAddress, unsigned char channelSelect, unsigned long srcAddress, unsigned int directionSelect) |
void | DMA_setDstAddress (unsigned int baseAddress, unsigned char channelSelect, unsigned long dstAddress, unsigned int directionSelect) |
void | DMA_enableTransfers (unsigned int baseAddress, unsigned char channelSelect) |
void | DMA_disableTransfers (unsigned int baseAddress, unsigned char channelSelect) |
void | DMA_startTransfer (unsigned int baseAddress, unsigned char channelSelect) |
void | DMA_enableInterrupt (unsigned int baseAddress, unsigned char channelSelect) |
void | DMA_disableInterrupt (unsigned int baseAddress, unsigned char channelSelect) |
unsigned short | DMA_getInterruptStatus (unsigned int baseAddress, unsigned char channelSelect) |
void | DMA_clearInterrupt (unsigned int baseAddress, unsigned char channelSelect) |
unsigned short | DMA_NMIAbortStatus (unsigned int baseAddress, unsigned char channelSelect) |
void | DMA_clearNMIAbort (unsigned int baseAddress, unsigned char channelSelect) |
void | DMA_disableTransferDuringReadModifyWrite (unsigned int baseAddress) |
void | DMA_enableTransferDuringReadModifyWrite (unsigned int baseAddress) |
void | DMA_enableRoundRobinPriority (unsigned int baseAddress) |
void | DMA_disableRoundRobinPriority (unsigned int baseAddress) |
void | DMA_enableNMIAbort (unsigned int baseAddress) |
void | DMA_disableNMIAbort (unsigned int baseAddress) |
unsigned short DMA_init |
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unsigned int |
baseAddress, |
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unsigned char |
channelSelect, |
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unsigned int |
transferModeSelect, |
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unsigned int |
transferSize, |
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unsigned char |
triggerSourceSelect, |
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unsigned char |
transferUnitSelect, |
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unsigned char |
triggerTypeSelect |
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Initializes the specified DMA channel.
- Parameters:
-
baseAddress | is the base address of the DMA module. |
channelSelect | is the specified channel to initialize. Valid values are DMA_CHANNEL_0 DMA_CHANNEL_1 DMA_CHANNEL_2 DMA_CHANNEL_3 DMA_CHANNEL_4 DMA_CHANNEL_5 DMA_CHANNEL_6 DMA_CHANNEL_7 |
transferModeSelect | is the transfer mode of the selected channel. Valid values are DMA_TRANSFER_SINGLE - Single transfer, transfers disabled after transferAmount of transfers. [Default] DMA_TRANSFER_BLOCK - Multiple transfers of transferAmount, transfers disabled once finished. DMA_TRANSFER_BURSTBLOCK - Multiple transfers of transferAmount interleaved with CPU activity, transfers disabled once finished. DMA_TRANSFER_REPEATED_SINGLE - Repeated single transfer by trigger. DMA_TRANSFER_REPEATED_BLOCK - Multiple transfers of transferAmount by trigger. DMA_TRANSFER_REPEATED_BURSTBLOCK - Multiple transfers of transferAmount by trigger interleaved with CPU activity. Modified bits are DMADT of DMAxCTL register. |
transferSize | is the amount of transfers to complete in a block transfer mode, as well as how many transfers to complete before the interrupt flag is set. Valid value is between 1-65535, if 0, no transfers will occur. Modified bits are DMAxSZ of DMAzSZ register. |
triggerSourceSelect | is the source that will trigger the start of each transfer, note that the sources are device specific. Valid values are DMA_TRIGGERSOURCE_0 [Default] DMA_TRIGGERSOURCE_1 DMA_TRIGGERSOURCE_2 DMA_TRIGGERSOURCE_3 DMA_TRIGGERSOURCE_4 DMA_TRIGGERSOURCE_5 DMA_TRIGGERSOURCE_6 DMA_TRIGGERSOURCE_7 DMA_TRIGGERSOURCE_8 DMA_TRIGGERSOURCE_9 DMA_TRIGGERSOURCE_10 DMA_TRIGGERSOURCE_11 DMA_TRIGGERSOURCE_12 DMA_TRIGGERSOURCE_13 DMA_TRIGGERSOURCE_14 DMA_TRIGGERSOURCE_15 DMA_TRIGGERSOURCE_16 DMA_TRIGGERSOURCE_17 DMA_TRIGGERSOURCE_18 DMA_TRIGGERSOURCE_19 DMA_TRIGGERSOURCE_20 DMA_TRIGGERSOURCE_21 DMA_TRIGGERSOURCE_22 DMA_TRIGGERSOURCE_23 DMA_TRIGGERSOURCE_24 DMA_TRIGGERSOURCE_25 DMA_TRIGGERSOURCE_26 DMA_TRIGGERSOURCE_27 DMA_TRIGGERSOURCE_28 DMA_TRIGGERSOURCE_29 DMA_TRIGGERSOURCE_30 DMA_TRIGGERSOURCE_31 This parameter is device specific and trigger sources should be found in device's datasheet. Modified bits are DMAxTSEL of DMACTLx register. |
transferUnitSelect | is the specified size of transfers. Valid values are DMA_UNIT_SRCWORD_DSTWORD [Default] DMA_UNIT_SRCBYTE_DSTWORD DMA_UNIT_SRCWORD_DSTBYTE DMA_UNIT_SRCBYTE_DSTBYTE Modified bits are DMADSTBYTE and DMASRCBYTE of DMAxCTL register. |
triggerTypeSelect | is the type of trigger that the trigger signal needs to be to start a transfer. Valid values are DMA_TRIGGER_RISINGEDGE [Default] DMA_TRIGGER_HIGH - A trigger would be a high signal from the trigger source, to be held high through the length of the transfer(s). Modified bits are DMALEVEL of DMAxCTL register. |
This function initializes the specified DMA channel. Upon successful completion of initializtion of the selected channel the control registers will be cleared and the given variables will be set. Please note, if tranfers have been enabled with the enableTransfers() function, then a call to disableTransfers() is necessary before re-initialization. Also note, that the trigger sources are device dependent and can be found in the device family data sheet. The amount of DMA channels available are also device specific.
- Returns:
- STATUS_SUCCESS or STATUS_FAILURE of the initialization process.
References ASSERT, DMA_CHANNEL_7, DMA_SIZE_SRCBYTE_DSTBYTE, DMA_TRANSFER_REPEATED_BURSTBLOCK, DMA_TRIGGER_HIGH, DMA_TRIGGERSOURCE_31, HWREG, and STATUS_SUCCESS.
void DMA_setSrcAddress |
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unsigned int |
baseAddress, |
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unsigned char |
channelSelect, |
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unsigned long |
srcAddress, |
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unsigned int |
directionSelect |
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Sets source address and the direction that the source address will move after a transfer.
- Parameters:
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baseAddress | is the base address of the DMA module. |
channelSelect | is the specified channel to set source address direction for. Valid values are DMA_CHANNEL_0 DMA_CHANNEL_1 DMA_CHANNEL_2 DMA_CHANNEL_3 DMA_CHANNEL_4 DMA_CHANNEL_5 DMA_CHANNEL_6 DMA_CHANNEL_7 |
srcAddress | is the address of where the data will be transfered from. Modified bits are DMAxSA of DMAxSA register. |
directionSelect | is the specified direction of the source address after a transfer. Valid values are DMA_DIRECTION_UNCHANGED DMA_DIRECTION_DECREMENT DMA_DIRECTION_INCREMENT Modified bits are DMASRCINCR of DMAxCTL register. |
This function sets the source address and the direction that the source address will move after a transfer is complete. It may be incremented, decremented, or unchanged.
- Returns:
- NONE
References ASSERT, DMA_CHANNEL_7, DMA_DIRECTION_INCREMENT, and HWREG.
void DMA_setDstAddress |
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unsigned int |
baseAddress, |
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unsigned char |
channelSelect, |
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unsigned long |
dstAddress, |
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unsigned int |
directionSelect |
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Sets the destination address and the direction that the destination address will move after a transfer.
- Parameters:
-
baseAddress | is the base address of the DMA module. |
channelSelect | is the specified channel to set the destination address direction for. Valid values are DMA_CHANNEL_0 DMA_CHANNEL_1 DMA_CHANNEL_2 DMA_CHANNEL_3 DMA_CHANNEL_4 DMA_CHANNEL_5 DMA_CHANNEL_6 DMA_CHANNEL_7 |
dstAddress | is the address of where the data will be transfered to. Modified bits are DMAxDA of DMAxDA register. |
directionSelect | is the specified direction of the destination address after a transfer. Valid values are DMA_DIRECTION_UNCHANGED DMA_DIRECTION_DECREMENT DMA_DIRECTION_INCREMENT Modified bits are DMADSTINCR of DMAxCTL register. |
This function sets the destination address and the direction that the destination address will move after a transfer is complete. It may be incremented, decremented, or unchanged.
- Returns:
- NONE
References ASSERT, DMA_CHANNEL_7, DMA_DIRECTION_INCREMENT, and HWREG.
void DMA_startTransfer |
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unsigned int |
baseAddress, |
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unsigned char |
channelSelect |
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Starts a transfer if using the default trigger source selected in initialization.
- Parameters:
-
baseAddress | is the base address of the DMA module. |
channelSelect | is the specified channel to start transfers for. Valid values are DMA_CHANNEL_0 DMA_CHANNEL_1 DMA_CHANNEL_2 DMA_CHANNEL_3 DMA_CHANNEL_4 DMA_CHANNEL_5 DMA_CHANNEL_6 DMA_CHANNEL_7 |
Thgis functions triggers a transfer of data from source to destination if the trigger source chosen from initialization is the DMA_TRIGGERSOURCE_0. Please note, this function needs to be called for each (repeated-)single tranfser, and when transferAmount of transfers have been complete in (repeated-)block transfers.
- Returns:
- NONE
References ASSERT, DMA_CHANNEL_7, and HWREG.
unsigned short DMA_NMIAbortStatus |
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unsigned int |
baseAddress, |
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unsigned char |
channelSelect |
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Returns the status of the NMIAbort for the selected channel.
- Parameters:
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baseAddress | is the base address of the DMA module. |
channelSelect | is the specified channel to return the status of the NMI Abort flag for. Valid values are DMA_CHANNEL_0 DMA_CHANNEL_1 DMA_CHANNEL_2 DMA_CHANNEL_3 DMA_CHANNEL_4 DMA_CHANNEL_5 DMA_CHANNEL_6 DMA_CHANNEL_7 |
This function returns the status of the NMI Abort flag for the selected channel. If this flag has been set, it is because a transfer on this channel was aborted due to a interrupt from an NMI.
- Returns:
- The status of the NMI Abort flag, DMA_ABORTED if channel was aborted by an NMI, DMA_NOTABORTED if not.
References ASSERT, DMA_ABORTED, DMA_CHANNEL_7, DMA_NOTABORTED, and HWREG.