Defines | Functions
adc12b.h File Reference

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Defines

#define __MSP430_HAS_ADC12_B__
#define ADC12B_SAMPLEHOLDSOURCE_SC   (ADC12SHS_0)
#define ADC12B_SAMPLEHOLDSOURCE_1   (ADC12SHS_1)
#define ADC12B_SAMPLEHOLDSOURCE_2   (ADC12SHS_2)
#define ADC12B_SAMPLEHOLDSOURCE_3   (ADC12SHS_3)
#define ADC12B_SAMPLEHOLDSOURCE_4   (ADC12SHS_4)
#define ADC12B_SAMPLEHOLDSOURCE_5   (ADC12SHS_5)
#define ADC12B_SAMPLEHOLDSOURCE_6   (ADC12SHS_6)
#define ADC12B_SAMPLEHOLDSOURCE_7   (ADC12SHS_7)
#define ADC12B_CLOCKSOURCE_ADC12OSC   (ADC12SSEL_0)
#define ADC12B_CLOCKSOURCE_ACLK   (ADC12SSEL_1)
#define ADC12B_CLOCKSOURCE_MCLK   (ADC12SSEL_2)
#define ADC12B_CLOCKSOURCE_SMCLK   (ADC12SSEL_3)
#define ADC12B_CLOCKDIVIDER_1   (ADC12DIV_0)
#define ADC12B_CLOCKDIVIDER_2   (ADC12DIV_1)
#define ADC12B_CLOCKDIVIDER_3   (ADC12DIV_2)
#define ADC12B_CLOCKDIVIDER_4   (ADC12DIV_3)
#define ADC12B_CLOCKDIVIDER_5   (ADC12DIV_4)
#define ADC12B_CLOCKDIVIDER_6   (ADC12DIV_5)
#define ADC12B_CLOCKDIVIDER_7   (ADC12DIV_6)
#define ADC12B_CLOCKDIVIDER_8   (ADC12DIV_7)
#define ADC12B_CLOCKPREDIVIDER__1   (ADC12PDIV__1)
#define ADC12B_CLOCKPREDIVIDER__4   (ADC12PDIV__4)
#define ADC12B_CLOCKPREDIVIDER__32   (ADC12PDIV__32)
#define ADC12B_CLOCKPREDIVIDER__64   (ADC12PDIV__64)
#define ADC12B_RESOLUTION_8BIT   (ADC12RES__8BIT)
#define ADC12B_RESOLUTION_10BIT   (ADC12RES__10BIT)
#define ADC12B_RESOLUTION_12BIT   (ADC12RES__12BIT)
#define ADC12B_CYCLEHOLD_4_CYCLES   (ADC12SHT0_0)
#define ADC12B_CYCLEHOLD_8_CYCLES   (ADC12SHT0_1)
#define ADC12B_CYCLEHOLD_16_CYCLES   (ADC12SHT0_2)
#define ADC12B_CYCLEHOLD_32_CYCLES   (ADC12SHT0_3)
#define ADC12B_CYCLEHOLD_64_CYCLES   (ADC12SHT0_4)
#define ADC12B_CYCLEHOLD_96_CYCLES   (ADC12SHT0_5)
#define ADC12B_CYCLEHOLD_128_CYCLES   (ADC12SHT0_6)
#define ADC12B_CYCLEHOLD_192_CYCLES   (ADC12SHT0_7)
#define ADC12B_CYCLEHOLD_256_CYCLES   (ADC12SHT0_8)
#define ADC12B_CYCLEHOLD_384_CYCLES   (ADC12SHT0_9)
#define ADC12B_CYCLEHOLD_512_CYCLES   (ADC12SHT0_10)
#define ADC12B_CYCLEHOLD_768_CYCLES   (ADC12SHT0_11)
#define ADC12B_CYCLEHOLD_1024_CYCLES   (ADC12SHT0_12)
#define ADC12B_MULTIPLESAMPLESDISABLE   ( !(ADC12MSC) )
#define ADC12B_MULTIPLESAMPLESENABLE   (ADC12MSC)
#define ADC12B_MEMORY_0   (0x00)
#define ADC12B_MEMORY_1   (0x02)
#define ADC12B_MEMORY_2   (0x04)
#define ADC12B_MEMORY_3   (0x06)
#define ADC12B_MEMORY_4   (0x08)
#define ADC12B_MEMORY_5   (0x0A)
#define ADC12B_MEMORY_6   (0x0C)
#define ADC12B_MEMORY_7   (0x0E)
#define ADC12B_MEMORY_8   (0x10)
#define ADC12B_MEMORY_9   (0x12)
#define ADC12B_MEMORY_10   (0x14)
#define ADC12B_MEMORY_11   (0x16)
#define ADC12B_MEMORY_12   (0x18)
#define ADC12B_MEMORY_13   (0x1A)
#define ADC12B_MEMORY_14   (0x1C)
#define ADC12B_MEMORY_15   (0x1E)
#define ADC12B_MEMORY_16   (0x20)
#define ADC12B_MEMORY_17   (0x22)
#define ADC12B_MEMORY_18   (0x24)
#define ADC12B_MEMORY_19   (0x26)
#define ADC12B_MEMORY_20   (0x28)
#define ADC12B_MEMORY_21   (0x2A)
#define ADC12B_MEMORY_22   (0x2C)
#define ADC12B_MEMORY_23   (0x2E)
#define ADC12B_MEMORY_24   (0x30)
#define ADC12B_MEMORY_25   (0x32)
#define ADC12B_MEMORY_26   (0x34)
#define ADC12B_MEMORY_27   (0x36)
#define ADC12B_MEMORY_28   (0x38)
#define ADC12B_MEMORY_29   (0x3A)
#define ADC12B_MEMORY_30   (0x3C)
#define ADC12B_MEMORY_31   (0x3E)
#define ADC12B_MAPINTCH3   (ADC12ICH3MAP)
#define ADC12B_MAPINTCH2   (ADC12ICH2MAP)
#define ADC12B_MAPINTCH1   (ADC12ICH1MAP)
#define ADC12B_MAPINTCH0   (ADC12ICH0MAP)
#define ADC12B_TEMPSENSEMAP   (ADC12TCMAP)
#define ADC12B_BATTMAP   (ADC12BATMAP)
#define START_AT_ADC12MEM0   (ADC12CSTARTADD_0)
#define START_AT_ADC12MEM1   (ADC12CSTARTADD_1)
#define START_AT_ADC12MEM2   (ADC12CSTARTADD_2)
#define START_AT_ADC12MEM3   (ADC12CSTARTADD_3)
#define START_AT_ADC12MEM4   (ADC12CSTARTADD_4)
#define START_AT_ADC12MEM5   (ADC12CSTARTADD_5)
#define START_AT_ADC12MEM6   (ADC12CSTARTADD_6)
#define START_AT_ADC12MEM7   (ADC12CSTARTADD_7)
#define START_AT_ADC12MEM8   (ADC12CSTARTADD_8)
#define START_AT_ADC12MEM9   (ADC12CSTARTADD_9)
#define START_AT_ADC12MEM10   (ADC12CSTARTADD_10)
#define START_AT_ADC12MEM11   (ADC12CSTARTADD_11)
#define START_AT_ADC12MEM12   (ADC12CSTARTADD_12)
#define START_AT_ADC12MEM13   (ADC12CSTARTADD_13)
#define START_AT_ADC12MEM14   (ADC12CSTARTADD_14)
#define START_AT_ADC12MEM15   (ADC12CSTARTADD_15)
#define START_AT_ADC12MEM16   (ADC12CSTARTADD_16)
#define START_AT_ADC12MEM17   (ADC12CSTARTADD_17)
#define START_AT_ADC12MEM18   (ADC12CSTARTADD_18)
#define START_AT_ADC12MEM19   (ADC12CSTARTADD_19)
#define START_AT_ADC12MEM20   (ADC12CSTARTADD_20)
#define START_AT_ADC12MEM21   (ADC12CSTARTADD_21)
#define START_AT_ADC12MEM22   (ADC12CSTARTADD_22)
#define START_AT_ADC12MEM23   (ADC12CSTARTADD_23)
#define START_AT_ADC12MEM24   (ADC12CSTARTADD_24)
#define START_AT_ADC12MEM25   (ADC12CSTARTADD_25)
#define START_AT_ADC12MEM26   (ADC12CSTARTADD_26)
#define START_AT_ADC12MEM27   (ADC12CSTARTADD_27)
#define START_AT_ADC12MEM28   (ADC12CSTARTADD_28)
#define START_AT_ADC12MEM29   (ADC12CSTARTADD_29)
#define START_AT_ADC12MEM30   (ADC12CSTARTADD_30)
#define START_AT_ADC12MEM31   (ADC12CSTARTADD_31)
#define ADC12B_INPUT_A0   (ADC12INCH_0)
#define ADC12B_INPUT_A1   (ADC12INCH_1)
#define ADC12B_INPUT_A2   (ADC12INCH_2)
#define ADC12B_INPUT_A3   (ADC12INCH_3)
#define ADC12B_INPUT_A4   (ADC12INCH_4)
#define ADC12B_INPUT_A5   (ADC12INCH_5)
#define ADC12B_INPUT_A6   (ADC12INCH_6)
#define ADC12B_INPUT_A7   (ADC12INCH_7)
#define ADC12B_INPUT_A8   (ADC12INCH_8)
#define ADC12B_INPUT_A9   (ADC12INCH_9)
#define ADC12B_INPUT_A10   (ADC12INCH_10)
#define ADC12B_INPUT_A11   (ADC12INCH_11)
#define ADC12B_INPUT_A12   (ADC12INCH_12)
#define ADC12B_INPUT_A13   (ADC12INCH_13)
#define ADC12B_INPUT_A14   (ADC12INCH_14)
#define ADC12B_INPUT_A15   (ADC12INCH_15)
#define ADC12B_INPUT_A16   (ADC12INCH_16)
#define ADC12B_INPUT_A17   (ADC12INCH_17)
#define ADC12B_INPUT_A18   (ADC12INCH_18)
#define ADC12B_INPUT_A19   (ADC12INCH_19)
#define ADC12B_INPUT_A20   (ADC12INCH_20)
#define ADC12B_INPUT_A21   (ADC12INCH_21)
#define ADC12B_INPUT_A22   (ADC12INCH_22)
#define ADC12B_INPUT_A23   (ADC12INCH_23)
#define ADC12B_INPUT_A24   (ADC12INCH_24)
#define ADC12B_INPUT_A25   (ADC12INCH_25)
#define ADC12B_INPUT_A26   (ADC12INCH_26)
#define ADC12B_INPUT_A27   (ADC12INCH_27)
#define ADC12B_INPUT_A28   (ADC12INCH_28)
#define ADC12B_INPUT_A29   (ADC12INCH_29)
#define ADC12B_INPUT_TCMAP   (ADC12INCH_30)
#define ADC12B_INPUT_BATMAP   (ADC12INCH_31)
#define ADC12B_VREFPOS_AVCC_VREFNEG_VSS   (ADC12VRSEL_0)
#define ADC12B_VREFPOS_INTBUF_VREFNEG_VSS   (ADC12VRSEL_1)
#define ADC12B_VREFPOS_EXTNEG_VREFNEG_VSS   (ADC12VRSEL_2)
#define ADC12B_VREFPOS_EXTBUF_VREFNEG_VSS   (ADC12VRSEL_3)
#define ADC12B_VREFPOS_EXTPOS_VREFNEG_VSS   (ADC12VRSEL_4)
#define ADC12B_VREFPOS_AVCC_VREFNEG_EXTBUF   (ADC12VRSEL_5)
#define ADC12B_VREFPOS_AVCC_VREFNEG_EXTPOS   (ADC12VRSEL_6)
#define ADC12B_VREFPOS_INTBUF_VREFNEG_EXTPOS   (ADC12VRSEL_7)
#define ADC12B_VREFPOS_AVCC_VREFNEG_INTBUF   (ADC12VRSEL_9)
#define ADC12B_VREFPOS_EXTPOS_VREFNEG_INTBUF   (ADC12VRSEL_11)
#define ADC12B_VREFPOS_AVCC_VREFNEG_EXTNEG   (ADC12VRSEL_12)
#define ADC12B_VREFPOS_INTBUF_VREFNEG_EXTNEG   (ADC12VRSEL_13)
#define ADC12B_VREFPOS_EXTPOS_VREFNEG_EXTNEG   (ADC12VRSEL_14)
#define ADC12B_VREFPOS_EXTBUF_VREFNEG_EXTNEG   (ADC12VRSEL_15)
#define ADC12B_NOTENDOFSEQUENCE   ( !(ADC12EOS) )
#define ADC12B_ENDOFSEQUENCE   (ADC12EOS)
#define ADC12B_IE0   (ADC12IE0)
#define ADC12B_IE1   (ADC12IE1)
#define ADC12B_IE2   (ADC12IE2)
#define ADC12B_IE3   (ADC12IE3)
#define ADC12B_IE4   (ADC12IE4)
#define ADC12B_IE5   (ADC12IE5)
#define ADC12B_IE6   (ADC12IE6)
#define ADC12B_IE7   (ADC12IE7)
#define ADC12B_IE8   (ADC12IE8)
#define ADC12B_IE9   (ADC12IE9)
#define ADC12B_IE10   (ADC12IE10)
#define ADC12B_IE11   (ADC12IE11)
#define ADC12B_IE12   (ADC12IE12)
#define ADC12B_IE13   (ADC12IE13)
#define ADC12B_IE14   (ADC12IE14)
#define ADC12B_IE15   (ADC12IE15)
#define ADC12B_IE16   (ADC12IE16)
#define ADC12B_IE17   (ADC12IE17)
#define ADC12B_IE18   (ADC12IE18)
#define ADC12B_IE19   (ADC12IE19)
#define ADC12B_IE20   (ADC12IE20)
#define ADC12B_IE21   (ADC12IE21)
#define ADC12B_IE22   (ADC12IE22)
#define ADC12B_IE23   (ADC12IE23)
#define ADC12B_IE24   (ADC12IE24)
#define ADC12B_IE25   (ADC12IE25)
#define ADC12B_IE26   (ADC12IE26)
#define ADC12B_IE27   (ADC12IE27)
#define ADC12B_IE28   (ADC12IE28)
#define ADC12B_IE29   (ADC12IE29)
#define ADC12B_IE30   (ADC12IE30)
#define ADC12B_IE31   (ADC12IE31)
#define ADC12B_INIE   (ADC12INIE)
#define ADC12B_LOIE   (ADC12LOIE)
#define ADC12B_HIIE   (ADC12HIIE)
#define ADC12B_OVIE   (ADC12OVIE)
#define ADC12B_TOVIE   (ADC12TOVIE)
#define ADC12B_RDYIE   (ADC12RDYIE)
#define ADC12B_IFG0   (ADC12IFG0)
#define ADC12B_IFG1   (ADC12IFG1)
#define ADC12B_IFG2   (ADC12IFG2)
#define ADC12B_IFG3   (ADC12IFG3)
#define ADC12B_IFG4   (ADC12IFG4)
#define ADC12B_IFG5   (ADC12IFG5)
#define ADC12B_IFG6   (ADC12IFG6)
#define ADC12B_IFG7   (ADC12IFG7)
#define ADC12B_IFG8   (ADC12IFG8)
#define ADC12B_IFG9   (ADC12IFG9)
#define ADC12B_IFG10   (ADC12IFG10)
#define ADC12B_IFG11   (ADC12IFG11)
#define ADC12B_IFG12   (ADC12IFG12)
#define ADC12B_IFG13   (ADC12IFG13)
#define ADC12B_IFG14   (ADC12IFG14)
#define ADC12B_IFG15   (ADC12IFG15)
#define ADC12B_IFG16   (ADC12IFG16)
#define ADC12B_IFG17   (ADC12IFG17)
#define ADC12B_IFG18   (ADC12IFG18)
#define ADC12B_IFG19   (ADC12IFG19)
#define ADC12B_IFG20   (ADC12IFG20)
#define ADC12B_IFG21   (ADC12IFG21)
#define ADC12B_IFG22   (ADC12IFG22)
#define ADC12B_IFG23   (ADC12IFG23)
#define ADC12B_IFG24   (ADC12IFG24)
#define ADC12B_IFG25   (ADC12IFG25)
#define ADC12B_IFG26   (ADC12IFG26)
#define ADC12B_IFG27   (ADC12IFG27)
#define ADC12B_IFG28   (ADC12IFG28)
#define ADC12B_IFG29   (ADC12IFG29)
#define ADC12B_IFG30   (ADC12IFG30)
#define ADC12B_IFG31   (ADC12IFG31)
#define ADC12B_INIFG   (ADC12INIFG)
#define ADC12B_LOIFG   (ADC12LOIFG)
#define ADC12B_HIIFG   (ADC12HIIFG)
#define ADC12B_OVIFG   (ADC12OVIFG)
#define ADC12B_TOVIFG   (ADC12TOVIFG)
#define ADC12B_RDYIFG   (ADC12RDYIFG)
#define ADC12B_SINGLECHANNEL   (ADC12CONSEQ_0)
#define ADC12B_SEQOFCHANNELS   (ADC12CONSEQ_1)
#define ADC12B_REPEATED_SINGLECHANNEL   (ADC12CONSEQ_2)
#define ADC12B_REPEATED_SEQOFCHANNELS   (ADC12CONSEQ_3)
#define ADC12B_COMPLETECONVERSION   (0x0)
#define ADC12B_PREEMPTCONVERSION   (0x1)
#define ADC12B_NONINVERTEDSIGNAL   ( !(ADC12ISSH) )
#define ADC12B_INVERTEDSIGNAL   (ADC12ISSH)
#define ADC12B_UNSIGNED_BINARY   ( !(ADC12DF) )
#define ADC12B_SIGNED_2SCOMPLEMENT   (ADC12DF)
#define ADC12B_REGULARPOWERMODE   ( !(ADC12PWRMD) )
#define ADC12B_LOWPOWERMODE   (ADC12PWRMD)
#define ADC12B_NOTBUSY   (0x0)
#define ADC12B_BUSY   (0x1)

Functions

unsigned short ADC12B_init (unsigned int baseAddress, unsigned int sampleHoldSignalSourceSelect, unsigned char clockSourceSelect, unsigned int clockSourceDivider, unsigned int clockSourcePredivider, unsigned int internalChannelMap)
void ADC12B_enable (unsigned int baseAddress)
void ADC12B_disable (unsigned int baseAddress)
void ADC12B_setupSamplingTimer (unsigned int baseAddress, unsigned int clockCycleHoldCountLowMem, unsigned int clockCycleHoldCountHighMem, unsigned short multipleSamplesEnabled)
void ADC12B_disableSamplingTimer (unsigned int baseAddress)
void ADC12B_memoryConfigure (unsigned int baseAddress, unsigned char memoryBufferControlIndex, unsigned char inputSourceSelect, unsigned int refVoltageSourceSelect, unsigned short endOfSequence)
void ADC12B_enableInterrupt (unsigned int baseAddress, unsigned int interruptMask0, unsigned int interruptMask1, unsigned int interruptMask2)
void ADC12B_disableInterrupt (unsigned int baseAddress, unsigned int interruptMask0, unsigned int interruptMask1, unsigned int interruptMask2)
void ADC12B_clearInterrupt (unsigned int baseAddress, unsigned char interruptRegisterChoice, unsigned int memoryInterruptFlagMask)
unsigned char ADC12B_getInterruptStatus (unsigned int baseAddress, unsigned char interruptRegisterChoice, unsigned int memoryInterruptFlagMask)
void ADC12B_startConversion (unsigned int baseAddress, unsigned int startingMemoryBufferIndex, unsigned char conversionSequenceModeSelect)
void ADC12B_disableConversions (unsigned int baseAddress, unsigned short preempt)
int ADC12B_getResults (unsigned int baseAddress, unsigned char memoryBufferIndex)
void ADC12B_setResolution (unsigned int baseAddress, unsigned char resolutionSelect)
void ADC12B_setSampleHoldSignalInversion (unsigned int baseAddress, unsigned int invertedSignal)
void ADC12B_setDataReadBackFormat (unsigned int baseAddress, unsigned short readBackFormat)
void ADC12B_enableReferenceBurst (unsigned int baseAddress)
void ADC12B_disableReferenceBurst (unsigned int baseAddress)
void ADC12B_setAdcPowerMode (unsigned int baseAddress, unsigned short powerMode)
unsigned long ADC12B_getMemoryAddressForDMA (unsigned int baseAddress, unsigned char memoryIndex)
unsigned short ADC12B_isBusy (unsigned int baseAddress)

Define Documentation

#define __MSP430_HAS_ADC12_B__
#define ADC12B_SAMPLEHOLDSOURCE_SC   (ADC12SHS_0)
#define ADC12B_SAMPLEHOLDSOURCE_1   (ADC12SHS_1)
#define ADC12B_SAMPLEHOLDSOURCE_2   (ADC12SHS_2)
#define ADC12B_SAMPLEHOLDSOURCE_3   (ADC12SHS_3)

Referenced by ADC12B_init().

#define ADC12B_SAMPLEHOLDSOURCE_4   (ADC12SHS_4)
#define ADC12B_SAMPLEHOLDSOURCE_5   (ADC12SHS_5)
#define ADC12B_SAMPLEHOLDSOURCE_6   (ADC12SHS_6)
#define ADC12B_SAMPLEHOLDSOURCE_7   (ADC12SHS_7)
#define ADC12B_CLOCKSOURCE_ADC12OSC   (ADC12SSEL_0)
#define ADC12B_CLOCKSOURCE_ACLK   (ADC12SSEL_1)
#define ADC12B_CLOCKSOURCE_MCLK   (ADC12SSEL_2)
#define ADC12B_CLOCKSOURCE_SMCLK   (ADC12SSEL_3)

Referenced by ADC12B_init().

#define ADC12B_CLOCKDIVIDER_1   (ADC12DIV_0)
#define ADC12B_CLOCKDIVIDER_2   (ADC12DIV_1)
#define ADC12B_CLOCKDIVIDER_3   (ADC12DIV_2)
#define ADC12B_CLOCKDIVIDER_4   (ADC12DIV_3)
#define ADC12B_CLOCKDIVIDER_5   (ADC12DIV_4)
#define ADC12B_CLOCKDIVIDER_6   (ADC12DIV_5)
#define ADC12B_CLOCKDIVIDER_7   (ADC12DIV_6)
#define ADC12B_CLOCKDIVIDER_8   (ADC12DIV_7)
#define ADC12B_CLOCKPREDIVIDER__1   (ADC12PDIV__1)
#define ADC12B_CLOCKPREDIVIDER__4   (ADC12PDIV__4)
#define ADC12B_CLOCKPREDIVIDER__32   (ADC12PDIV__32)
#define ADC12B_CLOCKPREDIVIDER__64   (ADC12PDIV__64)
#define ADC12B_RESOLUTION_8BIT   (ADC12RES__8BIT)
#define ADC12B_RESOLUTION_10BIT   (ADC12RES__10BIT)
#define ADC12B_RESOLUTION_12BIT   (ADC12RES__12BIT)

Referenced by ADC12B_setResolution().

#define ADC12B_CYCLEHOLD_4_CYCLES   (ADC12SHT0_0)
#define ADC12B_CYCLEHOLD_8_CYCLES   (ADC12SHT0_1)
#define ADC12B_CYCLEHOLD_16_CYCLES   (ADC12SHT0_2)
#define ADC12B_CYCLEHOLD_32_CYCLES   (ADC12SHT0_3)
#define ADC12B_CYCLEHOLD_64_CYCLES   (ADC12SHT0_4)
#define ADC12B_CYCLEHOLD_96_CYCLES   (ADC12SHT0_5)
#define ADC12B_CYCLEHOLD_128_CYCLES   (ADC12SHT0_6)
#define ADC12B_CYCLEHOLD_192_CYCLES   (ADC12SHT0_7)
#define ADC12B_CYCLEHOLD_256_CYCLES   (ADC12SHT0_8)
#define ADC12B_CYCLEHOLD_384_CYCLES   (ADC12SHT0_9)
#define ADC12B_CYCLEHOLD_512_CYCLES   (ADC12SHT0_10)
#define ADC12B_CYCLEHOLD_768_CYCLES   (ADC12SHT0_11)
#define ADC12B_CYCLEHOLD_1024_CYCLES   (ADC12SHT0_12)

Referenced by ADC12B_setupSamplingTimer().

#define ADC12B_MULTIPLESAMPLESDISABLE   ( !(ADC12MSC) )
#define ADC12B_MULTIPLESAMPLESENABLE   (ADC12MSC)
#define ADC12B_MEMORY_0   (0x00)
#define ADC12B_MEMORY_1   (0x02)
#define ADC12B_MEMORY_2   (0x04)
#define ADC12B_MEMORY_3   (0x06)
#define ADC12B_MEMORY_4   (0x08)
#define ADC12B_MEMORY_5   (0x0A)
#define ADC12B_MEMORY_6   (0x0C)
#define ADC12B_MEMORY_7   (0x0E)
#define ADC12B_MEMORY_8   (0x10)
#define ADC12B_MEMORY_9   (0x12)
#define ADC12B_MEMORY_10   (0x14)
#define ADC12B_MEMORY_11   (0x16)
#define ADC12B_MEMORY_12   (0x18)
#define ADC12B_MEMORY_13   (0x1A)
#define ADC12B_MEMORY_14   (0x1C)
#define ADC12B_MEMORY_15   (0x1E)

Referenced by ADC12B_startConversion().

#define ADC12B_MEMORY_16   (0x20)
#define ADC12B_MEMORY_17   (0x22)
#define ADC12B_MEMORY_18   (0x24)
#define ADC12B_MEMORY_19   (0x26)
#define ADC12B_MEMORY_20   (0x28)
#define ADC12B_MEMORY_21   (0x2A)
#define ADC12B_MEMORY_22   (0x2C)
#define ADC12B_MEMORY_23   (0x2E)
#define ADC12B_MEMORY_24   (0x30)
#define ADC12B_MEMORY_25   (0x32)
#define ADC12B_MEMORY_26   (0x34)
#define ADC12B_MEMORY_27   (0x36)
#define ADC12B_MEMORY_28   (0x38)
#define ADC12B_MEMORY_29   (0x3A)
#define ADC12B_MEMORY_30   (0x3C)
#define ADC12B_MEMORY_31   (0x3E)

Referenced by ADC12B_getResults(), and ADC12B_memoryConfigure().

#define ADC12B_MAPINTCH3   (ADC12ICH3MAP)
#define ADC12B_MAPINTCH2   (ADC12ICH2MAP)
#define ADC12B_MAPINTCH1   (ADC12ICH1MAP)
#define ADC12B_MAPINTCH0   (ADC12ICH0MAP)
#define ADC12B_TEMPSENSEMAP   (ADC12TCMAP)
#define ADC12B_BATTMAP   (ADC12BATMAP)
#define START_AT_ADC12MEM0   (ADC12CSTARTADD_0)
#define START_AT_ADC12MEM1   (ADC12CSTARTADD_1)
#define START_AT_ADC12MEM2   (ADC12CSTARTADD_2)
#define START_AT_ADC12MEM3   (ADC12CSTARTADD_3)
#define START_AT_ADC12MEM4   (ADC12CSTARTADD_4)
#define START_AT_ADC12MEM5   (ADC12CSTARTADD_5)
#define START_AT_ADC12MEM6   (ADC12CSTARTADD_6)
#define START_AT_ADC12MEM7   (ADC12CSTARTADD_7)
#define START_AT_ADC12MEM8   (ADC12CSTARTADD_8)
#define START_AT_ADC12MEM9   (ADC12CSTARTADD_9)
#define START_AT_ADC12MEM10   (ADC12CSTARTADD_10)
#define START_AT_ADC12MEM11   (ADC12CSTARTADD_11)
#define START_AT_ADC12MEM12   (ADC12CSTARTADD_12)
#define START_AT_ADC12MEM13   (ADC12CSTARTADD_13)
#define START_AT_ADC12MEM14   (ADC12CSTARTADD_14)
#define START_AT_ADC12MEM15   (ADC12CSTARTADD_15)
#define START_AT_ADC12MEM16   (ADC12CSTARTADD_16)
#define START_AT_ADC12MEM17   (ADC12CSTARTADD_17)
#define START_AT_ADC12MEM18   (ADC12CSTARTADD_18)
#define START_AT_ADC12MEM19   (ADC12CSTARTADD_19)
#define START_AT_ADC12MEM20   (ADC12CSTARTADD_20)
#define START_AT_ADC12MEM21   (ADC12CSTARTADD_21)
#define START_AT_ADC12MEM22   (ADC12CSTARTADD_22)
#define START_AT_ADC12MEM23   (ADC12CSTARTADD_23)
#define START_AT_ADC12MEM24   (ADC12CSTARTADD_24)
#define START_AT_ADC12MEM25   (ADC12CSTARTADD_25)
#define START_AT_ADC12MEM26   (ADC12CSTARTADD_26)
#define START_AT_ADC12MEM27   (ADC12CSTARTADD_27)
#define START_AT_ADC12MEM28   (ADC12CSTARTADD_28)
#define START_AT_ADC12MEM29   (ADC12CSTARTADD_29)
#define START_AT_ADC12MEM30   (ADC12CSTARTADD_30)
#define START_AT_ADC12MEM31   (ADC12CSTARTADD_31)

Referenced by ADC12B_init().

#define ADC12B_INPUT_A0   (ADC12INCH_0)
#define ADC12B_INPUT_A1   (ADC12INCH_1)
#define ADC12B_INPUT_A2   (ADC12INCH_2)
#define ADC12B_INPUT_A3   (ADC12INCH_3)
#define ADC12B_INPUT_A4   (ADC12INCH_4)
#define ADC12B_INPUT_A5   (ADC12INCH_5)
#define ADC12B_INPUT_A6   (ADC12INCH_6)
#define ADC12B_INPUT_A7   (ADC12INCH_7)
#define ADC12B_INPUT_A8   (ADC12INCH_8)
#define ADC12B_INPUT_A9   (ADC12INCH_9)
#define ADC12B_INPUT_A10   (ADC12INCH_10)
#define ADC12B_INPUT_A11   (ADC12INCH_11)
#define ADC12B_INPUT_A12   (ADC12INCH_12)
#define ADC12B_INPUT_A13   (ADC12INCH_13)
#define ADC12B_INPUT_A14   (ADC12INCH_14)
#define ADC12B_INPUT_A15   (ADC12INCH_15)
#define ADC12B_INPUT_A16   (ADC12INCH_16)
#define ADC12B_INPUT_A17   (ADC12INCH_17)
#define ADC12B_INPUT_A18   (ADC12INCH_18)
#define ADC12B_INPUT_A19   (ADC12INCH_19)
#define ADC12B_INPUT_A20   (ADC12INCH_20)
#define ADC12B_INPUT_A21   (ADC12INCH_21)
#define ADC12B_INPUT_A22   (ADC12INCH_22)
#define ADC12B_INPUT_A23   (ADC12INCH_23)
#define ADC12B_INPUT_A24   (ADC12INCH_24)
#define ADC12B_INPUT_A25   (ADC12INCH_25)
#define ADC12B_INPUT_A26   (ADC12INCH_26)
#define ADC12B_INPUT_A27   (ADC12INCH_27)
#define ADC12B_INPUT_A28   (ADC12INCH_28)
#define ADC12B_INPUT_A29   (ADC12INCH_29)
#define ADC12B_INPUT_TCMAP   (ADC12INCH_30)
#define ADC12B_INPUT_BATMAP   (ADC12INCH_31)

Referenced by ADC12B_memoryConfigure().

#define ADC12B_VREFPOS_AVCC_VREFNEG_VSS   (ADC12VRSEL_0)
#define ADC12B_VREFPOS_INTBUF_VREFNEG_VSS   (ADC12VRSEL_1)
#define ADC12B_VREFPOS_EXTNEG_VREFNEG_VSS   (ADC12VRSEL_2)
#define ADC12B_VREFPOS_EXTBUF_VREFNEG_VSS   (ADC12VRSEL_3)
#define ADC12B_VREFPOS_EXTPOS_VREFNEG_VSS   (ADC12VRSEL_4)
#define ADC12B_VREFPOS_AVCC_VREFNEG_EXTBUF   (ADC12VRSEL_5)
#define ADC12B_VREFPOS_AVCC_VREFNEG_EXTPOS   (ADC12VRSEL_6)
#define ADC12B_VREFPOS_INTBUF_VREFNEG_EXTPOS   (ADC12VRSEL_7)
#define ADC12B_VREFPOS_AVCC_VREFNEG_INTBUF   (ADC12VRSEL_9)
#define ADC12B_VREFPOS_EXTPOS_VREFNEG_INTBUF   (ADC12VRSEL_11)
#define ADC12B_VREFPOS_AVCC_VREFNEG_EXTNEG   (ADC12VRSEL_12)
#define ADC12B_VREFPOS_INTBUF_VREFNEG_EXTNEG   (ADC12VRSEL_13)
#define ADC12B_VREFPOS_EXTPOS_VREFNEG_EXTNEG   (ADC12VRSEL_14)
#define ADC12B_VREFPOS_EXTBUF_VREFNEG_EXTNEG   (ADC12VRSEL_15)

Referenced by ADC12B_memoryConfigure().

#define ADC12B_NOTENDOFSEQUENCE   ( !(ADC12EOS) )
#define ADC12B_ENDOFSEQUENCE   (ADC12EOS)
#define ADC12B_IE0   (ADC12IE0)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE1   (ADC12IE1)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE2   (ADC12IE2)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE3   (ADC12IE3)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE4   (ADC12IE4)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE5   (ADC12IE5)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE6   (ADC12IE6)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE7   (ADC12IE7)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE8   (ADC12IE8)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE9   (ADC12IE9)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE10   (ADC12IE10)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE11   (ADC12IE11)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE12   (ADC12IE12)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE13   (ADC12IE13)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE14   (ADC12IE14)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE15   (ADC12IE15)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE16   (ADC12IE16)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE17   (ADC12IE17)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE18   (ADC12IE18)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE19   (ADC12IE19)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE20   (ADC12IE20)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE21   (ADC12IE21)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE22   (ADC12IE22)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE23   (ADC12IE23)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE24   (ADC12IE24)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE25   (ADC12IE25)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE26   (ADC12IE26)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE27   (ADC12IE27)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE28   (ADC12IE28)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE29   (ADC12IE29)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE30   (ADC12IE30)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IE31   (ADC12IE31)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_INIE   (ADC12INIE)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_LOIE   (ADC12LOIE)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_HIIE   (ADC12HIIE)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_OVIE   (ADC12OVIE)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_TOVIE   (ADC12TOVIE)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_RDYIE   (ADC12RDYIE)

Referenced by ADC12B_disableInterrupt(), and ADC12B_enableInterrupt().

#define ADC12B_IFG0   (ADC12IFG0)
#define ADC12B_IFG1   (ADC12IFG1)
#define ADC12B_IFG2   (ADC12IFG2)
#define ADC12B_IFG3   (ADC12IFG3)
#define ADC12B_IFG4   (ADC12IFG4)
#define ADC12B_IFG5   (ADC12IFG5)
#define ADC12B_IFG6   (ADC12IFG6)
#define ADC12B_IFG7   (ADC12IFG7)
#define ADC12B_IFG8   (ADC12IFG8)
#define ADC12B_IFG9   (ADC12IFG9)
#define ADC12B_IFG10   (ADC12IFG10)
#define ADC12B_IFG11   (ADC12IFG11)
#define ADC12B_IFG12   (ADC12IFG12)
#define ADC12B_IFG13   (ADC12IFG13)
#define ADC12B_IFG14   (ADC12IFG14)
#define ADC12B_IFG15   (ADC12IFG15)
#define ADC12B_IFG16   (ADC12IFG16)
#define ADC12B_IFG17   (ADC12IFG17)
#define ADC12B_IFG18   (ADC12IFG18)
#define ADC12B_IFG19   (ADC12IFG19)
#define ADC12B_IFG20   (ADC12IFG20)
#define ADC12B_IFG21   (ADC12IFG21)
#define ADC12B_IFG22   (ADC12IFG22)
#define ADC12B_IFG23   (ADC12IFG23)
#define ADC12B_IFG24   (ADC12IFG24)
#define ADC12B_IFG25   (ADC12IFG25)
#define ADC12B_IFG26   (ADC12IFG26)
#define ADC12B_IFG27   (ADC12IFG27)
#define ADC12B_IFG28   (ADC12IFG28)
#define ADC12B_IFG29   (ADC12IFG29)
#define ADC12B_IFG30   (ADC12IFG30)
#define ADC12B_IFG31   (ADC12IFG31)
#define ADC12B_INIFG   (ADC12INIFG)
#define ADC12B_LOIFG   (ADC12LOIFG)
#define ADC12B_HIIFG   (ADC12HIIFG)
#define ADC12B_OVIFG   (ADC12OVIFG)
#define ADC12B_TOVIFG   (ADC12TOVIFG)
#define ADC12B_RDYIFG   (ADC12RDYIFG)
#define ADC12B_SINGLECHANNEL   (ADC12CONSEQ_0)
#define ADC12B_SEQOFCHANNELS   (ADC12CONSEQ_1)
#define ADC12B_REPEATED_SINGLECHANNEL   (ADC12CONSEQ_2)
#define ADC12B_REPEATED_SEQOFCHANNELS   (ADC12CONSEQ_3)

Referenced by ADC12B_startConversion().

#define ADC12B_COMPLETECONVERSION   (0x0)
#define ADC12B_PREEMPTCONVERSION   (0x1)

Referenced by ADC12B_disableConversions().

#define ADC12B_NONINVERTEDSIGNAL   ( !(ADC12ISSH) )
#define ADC12B_INVERTEDSIGNAL   (ADC12ISSH)
#define ADC12B_UNSIGNED_BINARY   ( !(ADC12DF) )
#define ADC12B_SIGNED_2SCOMPLEMENT   (ADC12DF)

Referenced by ADC12B_setDataReadBackFormat().

#define ADC12B_REGULARPOWERMODE   ( !(ADC12PWRMD) )
#define ADC12B_LOWPOWERMODE   (ADC12PWRMD)
#define ADC12B_NOTBUSY   (0x0)

Referenced by ADC12B_isBusy().

#define ADC12B_BUSY   (0x1)

Referenced by ADC12B_isBusy().

Function Documentation

unsigned short ADC12B_init ( unsigned int  baseAddress,
unsigned int  sampleHoldSignalSourceSelect,
unsigned char  clockSourceSelect,
unsigned int  clockSourceDivider,
unsigned int  clockSourcePredivider,
unsigned int  internalChannelMap 
)

Initializes the ADC12B Module.

Parameters:
baseAddressis the base address of the ADC12B module.
sampleHoldSignalSourceSelectis the signal that will trigger a sample-and-hold for an input signal to be converted. Valid values are ADC12B_SAMPLEHOLDSOURCE_SC [Default] ADC12B_SAMPLEHOLDSOURCE_1 ADC12B_SAMPLEHOLDSOURCE_2 ADC12B_SAMPLEHOLDSOURCE_3 ADC12B_SAMPLEHOLDSOURCE_4 ADC12B_SAMPLEHOLDSOURCE_5 ADC12B_SAMPLEHOLDSOURCE_6 ADC12B_SAMPLEHOLDSOURCE_7 This parameter is device specific and sources should be found in the device's datasheet. Modified bits are ADC12SHSx of ADC12CTL1 register.
clockSourceSelectselects the clock that will be used by the ADC12B core, and the sampling timer if a sampling pulse mode is enabled. Valid values are ADC12B_CLOCKSOURCE_ADC12OSC - MODOSC 5 MHz oscillator from the UCS [Default] ADC12B_CLOCKSOURCE_ACLK - The Auxilary Clock ADC12B_CLOCKSOURCE_MCLK - The Master Clock ADC12B_CLOCKSOURCE_SMCLK - The Sub-Master Clock Modified bits are ADC12SSELx of ADC12CTL1 register.
clockSourceDividerselects the amount that the clock will be divided. Valid values are ADC12B_CLOCKDIVIDER_1 [Default] ADC12B_CLOCKDIVIDER_2 ADC12B_CLOCKDIVIDER_3 ADC12B_CLOCKDIVIDER_4 ADC12B_CLOCKDIVIDER_5 ADC12B_CLOCKDIVIDER_6 ADC12B_CLOCKDIVIDER_7 ADC12B_CLOCKDIVIDER_8 Modified bits are ADC12DIVx of ADC12CTL1 register
clockSourcePredividerselects the amount that the clock will be predivided. Valid values are ADC12B_CLOCKPREDIVIDER__1 [Default] ADC12B_CLOCKPREDIVIDER__4 ADC12B_CLOCKPREDIVIDER__32 ADC12B_CLOCKPREDIVIDER__64 Modified bits are ADC12PDIV of ADC12CTL1 register.
internalChannelMapselects what internal channel to map for ADC input channels Valid values are ADC12B_MAPINTCH3 ADC12B_MAPINTCH2 ADC12B_MAPINTCH1 ADC12B_MAPINTCH0 ADC12B_TEMPSENSEMAP ADC12B_BATTMAP Modified bits are ADC12ICH3MA, ADC12ICH2MA, ADC12ICH1MA, ADC12ICH0MA, ADC12TCMAP and ADC12BATMAP of ADC12CTL3 register

This function initializes the ADC module to allow for analog-to-digital conversions. Specifically this function sets up the sample-and-hold signal and clock sources for the ADC core to use for conversions. Upon successful completion of the initialization all of the ADC control registers will be reset, excluding the memory controls and reference module bits, the given parameters will be set, and the ADC core will be turned on (Note, that the ADC core only draws power during conversions and remains off when not converting).Note that sample/hold signal sources are device dependent. Note that if re-initializing the ADC after starting a conversion with the startConversion() function, the disableConversion() must be called BEFORE this function can be called.

Returns:
STATUS_SUCCESS or STATUS_FAILURE of the initialization process.

References ADC12B_CLOCKSOURCE_SMCLK, ADC12B_SAMPLEHOLDSOURCE_3, ASSERT, HWREG, HWREGB, START_AT_ADC12MEM31, and STATUS_SUCCESS.

void ADC12B_enable ( unsigned int  baseAddress)

Enables the ADC12B block.

Parameters:
baseAddressis the base address of the ADC12B module.

This will enable operation of the ADC12B block. Modified bits are ADC12ON of ADC12CTL0 register.

Returns:
None.

References HWREGB.

void ADC12B_disable ( unsigned int  baseAddress)

Disables the ADC12B block.

Parameters:
baseAddressis the base address of the ADC12B module.

This will disable operation of the ADC12B block. Modified bits are ADC12ON of ADC12CTL0 register.

Returns:
None.

References HWREGB.

void ADC12B_setupSamplingTimer ( unsigned int  baseAddress,
unsigned int  clockCycleHoldCountLowMem,
unsigned int  clockCycleHoldCountHighMem,
unsigned short  multipleSamplesEnabled 
)

Sets up and enables the Sampling Timer Pulse Mode.

Parameters:
baseAddressis the base address of the ADC12B module.
clockCycleHoldCountLowMemsets the amount of clock cycles to sample-and-hold for the higher memory buffers 0-7. Valid values are ADC12B_CYCLEHOLD_4_CYCLES [Default] ADC12B_CYCLEHOLD_8_CYCLES ADC12B_CYCLEHOLD_16_CYCLES ADC12B_CYCLEHOLD_32_CYCLES ADC12B_CYCLEHOLD_64_CYCLES ADC12B_CYCLEHOLD_96_CYCLES ADC12B_CYCLEHOLD_128_CYCLES ADC12B_CYCLEHOLD_192_CYCLES ADC12B_CYCLEHOLD_256_CYCLES ADC12B_CYCLEHOLD_384_CYCLES ADC12B_CYCLEHOLD_512_CYCLES ADC12B_CYCLEHOLD_768_CYCLES ADC12B_CYCLEHOLD_1024_CYCLES Modified bits are ADC12SHT0x of ADC12CTL0 register.
clockCycleHoldCountHighMemsets the amount of clock cycles to sample-and-hold for the higher memory buffers 8-15. Valid values are ADC12B_CYCLEHOLD_4_CYCLES [Default] ADC12B_CYCLEHOLD_8_CYCLES ADC12B_CYCLEHOLD_16_CYCLES ADC12B_CYCLEHOLD_32_CYCLES ADC12B_CYCLEHOLD_64_CYCLES ADC12B_CYCLEHOLD_96_CYCLES ADC12B_CYCLEHOLD_128_CYCLES ADC12B_CYCLEHOLD_192_CYCLES ADC12B_CYCLEHOLD_256_CYCLES ADC12B_CYCLEHOLD_384_CYCLES ADC12B_CYCLEHOLD_512_CYCLES ADC12B_CYCLEHOLD_768_CYCLES ADC12B_CYCLEHOLD_1024_CYCLES Modified bits are ADC12SHT1x of ADC12CTL0 register.
multipleSamplesEnabledallows multiple conversions to start without a trigger signal from the sample/hold signal Valid values are ADC12B_MULTIPLESAMPLESDISABLE - a timer trigger will be needed to start every ADC conversion. [Default] ADC12B_MULTIPLESAMPLESENABLE - during a sequenced and/or repeated conversion mode, after the first conversion, no sample/hold signal is necessary to start subsequent sample/hold and convert processes. Modified bits are ADC12MSC of ADC12CTL0 register.

This function sets up the sampling timer pulse mode which allows the sample/hold signal to trigger a sampling timer to sample-and-hold an input signal for a specified number of clock cycles without having to hold the sample/hold signal for the entire period of sampling. Note that if a conversion has been started with the startConversion() function, then a call to disableConversions() is required before this function may be called.

Returns:
NONE

References ADC12B_CYCLEHOLD_1024_CYCLES, ASSERT, HWREG, and HWREGB.

void ADC12B_disableSamplingTimer ( unsigned int  baseAddress)

Disables Sampling Timer Pulse Mode.

Parameters:
baseAddressis the base address of the ADC12B module.

Disables the Sampling Timer Pulse Mode. Note that if a conversion has been started with the startConversion() function, then a call to disableConversions() is required before this function may be called.

Modified bits are ADC12SHP of ADC12CTL1 register.

Returns:
NONE

References ASSERT, HWREG, and HWREGB.

void ADC12B_memoryConfigure ( unsigned int  baseAddress,
unsigned char  memoryBufferControlIndex,
unsigned char  inputSourceSelect,
unsigned int  refVoltageSourceSelect,
unsigned short  endOfSequence 
)

Configures the controls of the selected memory buffer.

Parameters:
baseAddressis the base address of the ADC12B module.
memoryBufferControlIndexis the selected memory buffer to set the configuration for. Valid values are ADC12B_MEMORY_0 (0x00) ADC12B_MEMORY_1 (0x02) ADC12B_MEMORY_2 (0x04) ADC12B_MEMORY_3 (0x06) ADC12B_MEMORY_4 (0x08) ADC12B_MEMORY_5 (0x0A) ADC12B_MEMORY_6 (0x0C) ADC12B_MEMORY_7 (0x0E) ADC12B_MEMORY_8 (0x10) ADC12B_MEMORY_9 (0x12) ADC12B_MEMORY_10 (0x14) ADC12B_MEMORY_11 (0x16) ADC12B_MEMORY_12 (0x18) ADC12B_MEMORY_13 (0x1A) ADC12B_MEMORY_14 (0x1C) ADC12B_MEMORY_15 (0x1E) ADC12B_MEMORY_16 (0x20) ADC12B_MEMORY_17 (0x22) ADC12B_MEMORY_18 (0x24) ADC12B_MEMORY_19 (0x26) ADC12B_MEMORY_20 (0x28) ADC12B_MEMORY_21 (0x2A) ADC12B_MEMORY_22 (0x2C) ADC12B_MEMORY_23 (0x2E) ADC12B_MEMORY_24 (0x30) ADC12B_MEMORY_25 (0x32) ADC12B_MEMORY_26 (0x34) ADC12B_MEMORY_27 (0x36) ADC12B_MEMORY_28 (0x38) ADC12B_MEMORY_29 (0x3A) ADC12B_MEMORY_30 (0x3C) ADC12B_MEMORY_31 (0x3E)
inputSourceSelectis the input that will store the converted data into the specified memory buffer. Valid values are ADC12B_INPUT_A0 [Default] ADC12B_INPUT_A1 ADC12B_INPUT_A2 ADC12B_INPUT_A3 ADC12B_INPUT_A4 ADC12B_INPUT_A5 ADC12B_INPUT_A6 ADC12B_INPUT_A7 ADC12B_INPUT_A8 ADC12B_INPUT_A9 ADC12B_INPUT_A10 ADC12B_INPUT_A11 ADC12B_INPUT_A12 ADC12B_INPUT_A13 ADC12B_INPUT_A14 ADC12B_INPUT_A15 ADC12B_INPUT_A16 ADC12B_INPUT_A17 ADC12B_INPUT_A18 ADC12B_INPUT_A19 ADC12B_INPUT_A20 ADC12B_INPUT_A21 ADC12B_INPUT_A22 ADC12B_INPUT_A23 ADC12B_INPUT_A24 ADC12B_INPUT_A25 ADC12B_INPUT_A26 ADC12B_INPUT_A27 ADC12B_INPUT_A28 ADC12B_INPUT_A29 ADC12B_INPUT_TCMAP ADC12B_INPUT_BATMAP Modified bits are ADC12INCHx of ADC12MCTLx register.
refVoltageSourceSelectis the reference voltage source to set as the upper/lower limits for the conversion stored in the specified memory. Valid values are ADC12B_VREFPOS_AVCC_VREFNEG_VSS [Default] ADC12B_VREFPOS_INTBUF_VREFNEG_VSS ADC12B_VREFPOS_EXTNEG_VREFNEG_VSS ADC12B_VREFPOS_EXTBUF_VREFNEG_VSS ADC12B_VREFPOS_EXTPOS_VREFNEG_VSS ADC12B_VREFPOS_AVCC_VREFNEG_EXTBUF ADC12B_VREFPOS_AVCC_VREFNEG_EXTPOS ADC12B_VREFPOS_INTBUF_VREFNEG_EXTPOS ADC12B_VREFPOS_AVCC_VREFNEG_INTBUF ADC12B_VREFPOS_EXTPOS_VREFNEG_INTBUF ADC12B_VREFPOS_AVCC_VREFNEG_EXTNEG ADC12B_VREFPOS_INTBUF_VREFNEG_EXTNEG ADC12B_VREFPOS_EXTPOS_VREFNEG_EXTNEG ADC12B_VREFPOS_EXTBUF_VREFNEG_EXTNEG Modified bits are ADC12VRSEL of ADC12MCTLx register.
endOfSequenceindicates that the specified memory buffer will be the end of the sequence if a sequenced conversion mode is selected Valid values are ADC12B_NOTENDOFSEQUENCE - The specified memory buffer will NOT be the end of the sequence OR a sequenced conversion mode is not selected. [Default] ADC12B_ENDOFSEQUENCE - The specified memory buffer will be the end of the sequence. Modified bits are ADC12EOS of ADC12MCTLx register.

Maps an input signal conversion into the selected memory buffer, as well as the positive and negative reference voltages for each conversion being stored into this memory buffer. If the internal reference is used for the positive reference voltage, the internal REF module must be used to control the voltage level. Note that if a conversion has been started with the startConversion() function, then a call to disableConversions() is required before this function may be called.

Returns:
NONE

References ADC12B_INPUT_BATMAP, ADC12B_MEMORY_31, ADC12B_VREFPOS_EXTBUF_VREFNEG_EXTNEG, ASSERT, HWREG, and HWREGB.

void ADC12B_enableInterrupt ( unsigned int  baseAddress,
unsigned int  interruptMask0,
unsigned int  interruptMask1,
unsigned int  interruptMask2 
)

Enables selected ADC12B interrupt sources.

Parameters:
baseAddressis the base address of the ADC12B module.
interruptMask0is the bit mask of the memory buffer and overflow interrupt sources to be enabled. If the desired interrupt is not available in the selection for interruptMask0, then simply pass in a '0' for this value. Valid values are ADC12B_IE0 ADC12B_IE1 ADC12B_IE2 ADC12B_IE3 ADC12B_IE4 ADC12B_IE5 ADC12B_IE6 ADC12B_IE7 ADC12B_IE8 ADC12B_IE9 ADC12B_IE10 ADC12B_IE11 ADC12B_IE12 ADC12B_IE13 ADC12B_IE14 ADC12B_IE15
interruptMask1is the bit mask of the memory buffer and overflow interrupt sources to be enabled. If the desired interrupt is not available in the selection for interruptMask1, then simply pass in a '0' for this value. Valid values are ADC12B_IE16 ADC12B_IE17 ADC12B_IE18 ADC12B_IE19 ADC12B_IE20 ADC12B_IE21 ADC12B_IE22 ADC12B_IE23 ADC12B_IE24 ADC12B_IE25 ADC12B_IE26 ADC12B_IE27 ADC12B_IE28 ADC12B_IE29 ADC12B_IE30 ADC12B_IE31
interruptMask2is the bit mask of the memory buffer and overflow interrupt sources to be enabled. If the desired interrupt is not available in the selection for interruptMask2, then simply pass in a '0' for this value. Valid values are ADC12B_INIE - Interrupt enable for a conversion in the result register is either greater than the ADC12LO or lower than the ADC12HI threshold. GIE bit must be set to enable the interrupt. ADC12B_LOIE - Interrupt enable for the falling short of the lower limit interrupt of the window comparator for the result register. GIE bit must be set to enable the interrupt. ADC12B_HIIE - Interrupt enable for the exceeding the upper limit of the window comparator for the result register. GIE bit must be set to enable the interrupt. ADC12B_OVIE - Interrupt enable for a conversion that is about to save to a memory buffer that has not been read out yet. GIE bit must be set to enable the interrupt. ADC12B_TOVIE -Interrupt enable for a conversion that is about to start before the previous conversion has been completed. GIE bit must be set to enable the interrupt. ADC12B_RDYIE -Interrupt enable for the local buffered reference ready signal. GIE bit must be set to enable the interrupt.

Enables the indicated ADC12B interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Returns:
NONE

References ADC12B_HIIE, ADC12B_IE0, ADC12B_IE1, ADC12B_IE10, ADC12B_IE11, ADC12B_IE12, ADC12B_IE13, ADC12B_IE14, ADC12B_IE15, ADC12B_IE16, ADC12B_IE17, ADC12B_IE18, ADC12B_IE19, ADC12B_IE2, ADC12B_IE20, ADC12B_IE21, ADC12B_IE22, ADC12B_IE23, ADC12B_IE24, ADC12B_IE25, ADC12B_IE26, ADC12B_IE27, ADC12B_IE28, ADC12B_IE29, ADC12B_IE3, ADC12B_IE30, ADC12B_IE31, ADC12B_IE4, ADC12B_IE5, ADC12B_IE6, ADC12B_IE7, ADC12B_IE8, ADC12B_IE9, ADC12B_INIE, ADC12B_LOIE, ADC12B_OVIE, ADC12B_RDYIE, ADC12B_TOVIE, ASSERT, and HWREG.

void ADC12B_disableInterrupt ( unsigned int  baseAddress,
unsigned int  interruptMask0,
unsigned int  interruptMask1,
unsigned int  interruptMask2 
)

Disables selected ADC12B interrupt sources.

Parameters:
baseAddressis the base address of the ADC12B module.
interruptMask0is the bit mask of the memory buffer and overflow interrupt sources to be disabled. If the desired interrupt is not available in the selection for interruptMask0, then simply pass in a '0' for this value. Valid values are ADC12B_IE0 ADC12B_IE1 ADC12B_IE2 ADC12B_IE3 ADC12B_IE4 ADC12B_IE5 ADC12B_IE6 ADC12B_IE7 ADC12B_IE8 ADC12B_IE9 ADC12B_IE10 ADC12B_IE11 ADC12B_IE12 ADC12B_IE13 ADC12B_IE14 ADC12B_IE15
interruptMask1is the bit mask of the memory buffer and overflow interrupt sources to be disabled. If the desired interrupt is not available in the selection for interruptMask1, then simply pass in a '0' for this value. Valid values are ADC12B_IE16 ADC12B_IE17 ADC12B_IE18 ADC12B_IE19 ADC12B_IE20 ADC12B_IE21 ADC12B_IE22 ADC12B_IE23 ADC12B_IE24 ADC12B_IE25 ADC12B_IE26 ADC12B_IE27 ADC12B_IE28 ADC12B_IE29 ADC12B_IE30 ADC12B_IE31
interruptMask2is the bit mask of the memory buffer and overflow interrupt sources to be disabled. If the desired interrupt is not available in the selection for interruptMask2, then simply pass in a '0' for this value. Valid values are ADC12B_INIE - Interrupt enable for a conversion in the result register is either greater than the ADC12LO or lower than the ADC12HI threshold. GIE bit must be set to enable the interrupt. ADC12B_LOIE - Interrupt enable for the falling short of the lower limit interrupt of the window comparator for the result register. GIE bit must be set to enable the interrupt. ADC12B_HIIE - Interrupt enable for the exceeding the upper limit of the window comparator for the result register. GIE bit must be set to enable the interrupt. ADC12B_OVIE - Interrupt enable for a conversion that is about to save to a memory buffer that has not been read out yet. GIE bit must be set to enable the interrupt. ADC12B_TOVIE -Interrupt enable for a conversion that is about to start before the previous conversion has been completed. GIE bit must be set to enable the interrupt. ADC12B_RDYIE -Interrupt enable for the local buffered reference ready signal. GIE bit must be set to enable the interrupt. Disables the indicated ADC12B interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Modified registers are ADC12CTL0 and ADC12IE.

Returns:
NONE

References ADC12B_HIIE, ADC12B_IE0, ADC12B_IE1, ADC12B_IE10, ADC12B_IE11, ADC12B_IE12, ADC12B_IE13, ADC12B_IE14, ADC12B_IE15, ADC12B_IE16, ADC12B_IE17, ADC12B_IE18, ADC12B_IE19, ADC12B_IE2, ADC12B_IE20, ADC12B_IE21, ADC12B_IE22, ADC12B_IE23, ADC12B_IE24, ADC12B_IE25, ADC12B_IE26, ADC12B_IE27, ADC12B_IE28, ADC12B_IE29, ADC12B_IE3, ADC12B_IE30, ADC12B_IE31, ADC12B_IE4, ADC12B_IE5, ADC12B_IE6, ADC12B_IE7, ADC12B_IE8, ADC12B_IE9, ADC12B_INIE, ADC12B_LOIE, ADC12B_OVIE, ADC12B_RDYIE, ADC12B_TOVIE, ASSERT, and HWREG.

void ADC12B_clearInterrupt ( unsigned int  baseAddress,
unsigned char  interruptRegisterChoice,
unsigned int  memoryInterruptFlagMask 
)

Clears ADC12B selected interrupt flags.

Parameters:
baseAddressis the base address of the ADC12B module.
interruptRegisterChoiceis either 0, 1, or 2, to choose the correct interrupt register to update
memoryInterruptFlagMaskis the bit mask of the memory buffer and overflow interrupt flags to be cleared. Valid values are ADC12B_IFG0 interruptRegisterChoice = 0 ADC12B_IFG1 ADC12B_IFG2 ADC12B_IFG3 ADC12B_IFG4 ADC12B_IFG5 ADC12B_IFG6 ADC12B_IFG7 ADC12B_IFG8 ADC12B_IFG9 ADC12B_IFG10 ADC12B_IFG11 ADC12B_IFG12 ADC12B_IFG13 ADC12B_IFG14 ADC12B_IFG15 ADC12B_IFG16 interruptRegisterChoice = 1 ADC12B_IFG17 ADC12B_IFG18 ADC12B_IFG19 ADC12B_IFG20 ADC12B_IFG21 ADC12B_IFG22 ADC12B_IFG23 ADC12B_IFG24 ADC12B_IFG25 ADC12B_IFG26 ADC12B_IFG27 ADC12B_IFG28 ADC12B_IFG29 ADC12B_IFG30 ADC12B_IFG31 ADC12B_INIFG interruptRegisterChoice = 2 ADC12B_LOIFG ADC12B_HIIFG ADC12B_OVIFG ADC12B_TOVIFG ADC12B_RDYIFG The selected ADC12B interrupt flags are cleared, so that it no longer asserts. The memory buffer interrupt flags are only cleared when the memory buffer is accessed. Note that the overflow interrupts do not have an interrupt flag to clear; they must be accessed directly from the interrupt vector.

Modified registers are ADC12IFG.

Returns:
NONE

References HWREG.

unsigned char ADC12B_getInterruptStatus ( unsigned int  baseAddress,
unsigned char  interruptRegisterChoice,
unsigned int  memoryInterruptFlagMask 
)

Returns the status of the selected memory interrupt flags.

Parameters:
baseAddressis the base address of the ADC12B module.
interruptRegisterChoiceis either 0, 1, or 2, to choose the correct interrupt register to update
memoryInterruptFlagMaskis the bit mask of the memory buffer and overflow interrupt flags to be cleared. Valid values are ADC12B_IFG0 interruptRegisterChoice = 0 ADC12B_IFG1 ADC12B_IFG2 ADC12B_IFG3 ADC12B_IFG4 ADC12B_IFG5 ADC12B_IFG6 ADC12B_IFG7 ADC12B_IFG8 ADC12B_IFG9 ADC12B_IFG10 ADC12B_IFG11 ADC12B_IFG12 ADC12B_IFG13 ADC12B_IFG14 ADC12B_IFG15 ADC12B_IFG16 interruptRegisterChoice = 1 ADC12B_IFG17 ADC12B_IFG18 ADC12B_IFG19 ADC12B_IFG20 ADC12B_IFG21 ADC12B_IFG22 ADC12B_IFG23 ADC12B_IFG24 ADC12B_IFG25 ADC12B_IFG26 ADC12B_IFG27 ADC12B_IFG28 ADC12B_IFG29 ADC12B_IFG30 ADC12B_IFG31 ADC12B_INIFG interruptRegisterChoice = 2 ADC12B_LOIFG ADC12B_HIIFG ADC12B_OVIFG ADC12B_TOVIFG ADC12B_RDYIFG Returns the status of the selected memory interrupt flags. Note that the overflow interrupts do not have an interrupt flag to clear; they must be accessed directly from the interrupt vector.
Returns:
The current interrupt flag status for the corresponding mask.

References HWREG.

void ADC12B_startConversion ( unsigned int  baseAddress,
unsigned int  startingMemoryBufferIndex,
unsigned char  conversionSequenceModeSelect 
)

Enables/Starts an Analog-to-Digital Conversion.

Parameters:
baseAddressis the base address of the ADC12B module.
startingMemoryBufferIndexis the memory buffer that will hold the first or only conversion. Valid values are START_AT_ADC12MEM0 [Default] START_AT_ADC12MEM1 START_AT_ADC12MEM2 START_AT_ADC12MEM3 START_AT_ADC12MEM4 START_AT_ADC12MEM5 START_AT_ADC12MEM6 START_AT_ADC12MEM7 START_AT_ADC12MEM8 START_AT_ADC12MEM9 START_AT_ADC12MEM10 START_AT_ADC12MEM11 START_AT_ADC12MEM12 START_AT_ADC12MEM13 START_AT_ADC12MEM14 START_AT_ADC12MEM15 START_AT_ADC12MEM16 START_AT_ADC12MEM17 START_AT_ADC12MEM18 START_AT_ADC12MEM19 START_AT_ADC12MEM20 START_AT_ADC12MEM21 START_AT_ADC12MEM22 START_AT_ADC12MEM23 START_AT_ADC12MEM24 START_AT_ADC12MEM25 START_AT_ADC12MEM26 START_AT_ADC12MEM27 START_AT_ADC12MEM28 START_AT_ADC12MEM29 START_AT_ADC12MEM30 START_AT_ADC12MEM31 Modified bits are ADC12STARTADDx of ADC12CTL1 register.
conversionSequenceModeSelectdetermines the ADC operating mode. Valid values are ADC12B_SINGLECHANNEL - one-time conversion of a single channel into a single memory buffer. [Default] ADC12B_SEQOFCHANNELS - one time conversion of multiple channels into the specified starting memory buffer and each subsequent memory buffer up until the conversion is stored in a memory buffer dedicated as the end-of-sequence by the memory's control register. ADC12B_REPEATED_SINGLECHANNEL - repeated conversions of one channel into a single memory buffer. ADC12B_REPEATED_SEQOFCHANNELS - repeated conversions of multiple channels into the specified starting memory buffer and each subsequent memory buffer up until the conversion is stored in a memory buffer dedicated as the end-of-sequence by the memory's control register. Modified bits are ADC12CONSEQx of ADC12CTL1 register.

This function enables/starts the conversion process of the ADC. If the sample/hold signal source chosen during initialization was ADC12OSC, then the conversion is started immediately, otherwise the chosen sample/hold signal source starts the conversion by a rising edge of the signal. Keep in mind when selecting conversion modes, that for sequenced and/or repeated modes, to keep the sample/hold-and-convert process continuing without a trigger from the sample/hold signal source, the multiple samples must be enabled using the ADC12B_setupSamplingTimer() function. Note that after this function is called, the ADC12B_stopConversions() has to be called to re-initialize the ADC, reconfigure a memory buffer control, enable/disable the sampling timer, or to change the internal reference voltage.

Modified registers are ADC12CTL0 and ADC12CTL1.

Returns:
NONE

References ADC12B_MEMORY_15, ADC12B_REPEATED_SEQOFCHANNELS, ASSERT, HWREG, and HWREGB.

void ADC12B_disableConversions ( unsigned int  baseAddress,
unsigned short  preempt 
)

Disables the ADC from converting any more signals.

Parameters:
baseAddressis the base address of the ADC12B module.
preemptspecifies if the current conversion should be preemptively stopped before the end of the conversion. Valid values are ADC12B_COMPLETECONVERSION - Allows the ADC12B to end the current conversion before disabling conversions. ADC12B_PREEMPTCONVERSION - Stops the ADC12B immediately, with unpredictable results of the current conversion.

Disables the ADC from converting any more signals. If there is a conversion in progress, this function can stop it immediately if the preempt parameter is set as TRUE, by changing the conversion mode to single-channel, single-conversion and disabling conversions. If the conversion mode is set as single-channel, single-conversion and this function is called without preemption, then the ADC core conversion status is polled until the conversion is complete before disabling conversions to prevent unpredictable data. If the ADC12B_startConversion() has been called, then this function has to be called to re-initialize the ADC, reconfigure a memory buffer control, enable/disable the sampling pulse mode, or change the internal reference voltage.

Modified registers are ADC12CTL0 and ADC12CTL1.

Returns:
NONE

References ADC12B_isBusy(), ADC12B_PREEMPTCONVERSION, and HWREGB.

int ADC12B_getResults ( unsigned int  baseAddress,
unsigned char  memoryBufferIndex 
)

Returns the raw contents of the specified memory buffer.

Parameters:
baseAddressis the base address of the ADC12B module.
memryBufferIndexis the specified Memory Buffer to read. Valid values are ADC12B_MEMORY_0 ADC12B_MEMORY_1 ADC12B_MEMORY_2 ADC12B_MEMORY_3 ADC12B_MEMORY_4 ADC12B_MEMORY_5 ADC12B_MEMORY_6 ADC12B_MEMORY_7 ADC12B_MEMORY_8 ADC12B_MEMORY_9 ADC12B_MEMORY_10 ADC12B_MEMORY_11 ADC12B_MEMORY_12 ADC12B_MEMORY_13 ADC12B_MEMORY_14 ADC12B_MEMORY_15 ADC12B_MEMORY_16 ADC12B_MEMORY_17 ADC12B_MEMORY_18 ADC12B_MEMORY_19 ADC12B_MEMORY_20 ADC12B_MEMORY_21 ADC12B_MEMORY_22 ADC12B_MEMORY_23 ADC12B_MEMORY_24 ADC12B_MEMORY_25 ADC12B_MEMORY_26 ADC12B_MEMORY_27 ADC12B_MEMORY_28 ADC12B_MEMORY_29 ADC12B_MEMORY_30 ADC12B_MEMORY_31

Returns the raw contents of the specified memory buffer. The format of the content depends on the read-back format of the data: if the data is in signed 2's complement format then the contents in the memory buffer will be left-justified with the least-significant bits as 0's, whereas if the data is in unsigned format then the contents in the memory buffer will be right-justified with the most-significant bits as 0's.

Returns:
A Signed Integer of the contents of the specified memory buffer.

References ADC12B_MEMORY_31, ASSERT, and HWREG.

void ADC12B_setResolution ( unsigned int  baseAddress,
unsigned char  resolutionSelect 
)

Use to change the resolution of the converted data.

Parameters:
baseAddressis the base address of the ADC12B module.
resolutionSelectdetermines the resolution of the converted data. Valid values are ADC12B_RESOLUTION_8BIT ADC12B_RESOLUTION_10BIT ADC12B_RESOLUTION_12BIT [Default] Modified bits are ADC12RESx of ADC12CTL2 register.

This function can be used to change the resolution of the converted data from the default of 12-bits.

Returns:
NONE

References ADC12B_RESOLUTION_12BIT, ASSERT, and HWREGB.

void ADC12B_setSampleHoldSignalInversion ( unsigned int  baseAddress,
unsigned int  invertedSignal 
)

Use to invert or un-invert the sample/hold signal.

Parameters:
baseAddressis the base address of the ADC12B module.
invertedSignalset if the sample/hold signal should be inverted Valid values are ADC12B_NONINVERTEDSIGNAL - a sample-and-hold of an input signal for conversion will be started on a rising edge of the sample/hold signal. [Default] ADC12B_INVERTEDSIGNAL - a sample-and-hold of an input signal for conversion will be started on a falling edge of the sample/hold signal. Modified bits are ADC12ISSH of ADC12CTL1 register.

This function can be used to invert or un-invert the sample/hold signal. Note that if a conversion has been started with the startConversion() function, then a call to disableConversions() is required before this function may be called.

Returns:
NONE

References ASSERT, HWREG, and HWREGB.

void ADC12B_setDataReadBackFormat ( unsigned int  baseAddress,
unsigned short  readBackFormat 
)

Use to set the read-back format of the converted data.

Parameters:
baseAddressis the base address of the ADC12B module.
readBackFormatis the specified format to store the conversions in the memory buffer. Valid values are ADC12B_UNSIGNED_BINARY [Default] ADC12B_SIGNED_2SCOMPLEMENT Modified bits are ADC12DF of ADC12CTL2 register.

Sets the format of the converted data: how it will be stored into the memory buffer, and how it should be read back. The format can be set as right-justified (default), which indicates that the number will be unsigned, or left-justified, which indicates that the number will be signed in 2's complement format. This change affects all memory buffers for subsequent conversions.

Returns:
NONE

References ADC12B_SIGNED_2SCOMPLEMENT, ASSERT, and HWREGB.

void ADC12B_enableReferenceBurst ( unsigned int  baseAddress)
void ADC12B_disableReferenceBurst ( unsigned int  baseAddress)
void ADC12B_setAdcPowerMode ( unsigned int  baseAddress,
unsigned short  powerMode 
)

Use to set the ADC's power conservation mode if the sampling rate is at 50-ksps or less.

Parameters:
baseAddressis the base address of the ADC12B module.
powerModeis the specified maximum sampling rate. Valid values are ADC12B_REGULARPOWERMODE - If sampling rate is greater than 50-ksps, there is no power saving feature available. [Default] ADC12B_LOWPOWERMODE - If sampling rate is less than or equal to 50-ksps, select this value to save power Modified bits are ADC12SR of ADC12CTL2 register.

Sets ADC's power mode. If the user has a sampling rate greater than 50-ksps, then he/she can only enable ADC12B_REGULARPOWERMODE. If the sampling rate is 50-ksps or less, the user can enable ADC12B_LOWPOWERMODE granting additional power savings.

Returns:
NONE

References ASSERT, and HWREGB.

unsigned long ADC12B_getMemoryAddressForDMA ( unsigned int  baseAddress,
unsigned char  memoryIndex 
)

Returns the address of the specified memory buffer for the DMA module.

Parameters:
baseAddressis the base address of the ADC12B module.
memoryIndexis the memory buffer to return the address of. Valid values are ADC12B_MEMORY_0 (0x00) ADC12B_MEMORY_1 (0x02) ADC12B_MEMORY_2 (0x04) ADC12B_MEMORY_3 (0x06) ADC12B_MEMORY_4 (0x08) ADC12B_MEMORY_5 (0x0A) ADC12B_MEMORY_6 (0x0C) ADC12B_MEMORY_7 (0x0E) ADC12B_MEMORY_8 (0x10) ADC12B_MEMORY_9 (0x12) ADC12B_MEMORY_10 (0x14) ADC12B_MEMORY_11 (0x16) ADC12B_MEMORY_12 (0x18) ADC12B_MEMORY_13 (0x1A) ADC12B_MEMORY_14 (0x1C) ADC12B_MEMORY_15 (0x1E) ADC12B_MEMORY_16 (0x20) ADC12B_MEMORY_17 (0x22) ADC12B_MEMORY_18 (0x24) ADC12B_MEMORY_19 (0x26) ADC12B_MEMORY_20 (0x28) ADC12B_MEMORY_21 (0x2A) ADC12B_MEMORY_22 (0x2C) ADC12B_MEMORY_23 (0x2E) ADC12B_MEMORY_24 (0x30) ADC12B_MEMORY_25 (0x32) ADC12B_MEMORY_26 (0x34) ADC12B_MEMORY_27 (0x36) ADC12B_MEMORY_28 (0x38) ADC12B_MEMORY_29 (0x3A) ADC12B_MEMORY_30 (0x3C) ADC12B_MEMORY_31 (0x3E)

Returns the address of the specified memory buffer. This can be used in conjunction with the DMA to store the converted data directly to memory.

Returns:
address of the specified memory buffer
unsigned short ADC12B_isBusy ( unsigned int  baseAddress)

Returns the busy status of the ADC12B core.

Parameters:
baseAddressis the base address of the ADC12B module.

Returns the status of the ADC core if there is a conversion currently taking place.

Returns:
ADC12B_BUSY or ADC12B_NOTBUSY dependent if there is a conversion currently taking place.

References ADC12B_BUSY, ADC12B_NOTBUSY, and HWREGB.

Referenced by ADC12B_disableConversions().

Copyright 2012, Texas Instruments Incorporated