Inter-Integrated Circuit (I2C)

Collaboration diagram for Inter-Integrated Circuit (I2C):

Modules
	DL_I2C_CONTROLLER_STATUS
	DL_I2C_TARGET_STATUS
	DL_I2C_INTERRUPT
	DL_I2C_DMA_INTERRUPT

Data Structures
struct	DL_I2C_ClockConfig
	Configuration struct for DL_I2C_setClockConfig. More...

Macros
#define	DL_I2C_TX_FIFO_COUNT_MAXIMUM   ((uint32_t)I2C_SYS_FENTRIES << 8)
	I2C number of bytes which could be put into the TX FIFO. More...
#define	DL_I2C_RX_FIFO_COUNT_MAXIMUM   ((uint32_t)I2C_SYS_FENTRIES)
	I2C number of bytes which could be put into the RX FIFO. More...

Enumerations
enum	DL_I2C_DMA_IIDX {   DL_I2C_DMA_IIDX_TARGET_TXFIFO_TRIGGER = I2C_DMA_TRIG1_IIDX_STAT_MTXFIFOTRG,   DL_I2C_DMA_IIDX_TARGET_RXFIFO_TRIGGER = I2C_DMA_TRIG1_IIDX_STAT_MRXFIFOTRG,   DL_I2C_DMA_IIDX_CONTROLLER_TXFIFO_TRIGGER,   DL_I2C_DMA_IIDX_CONTROLLER_RXFIFO_TRIGGER }
enum	DL_I2C_EVENT_ROUTE {   DL_I2C_EVENT_ROUTE_1 = 0,   DL_I2C_EVENT_ROUTE_2 = 12 }
enum	DL_I2C_CLOCK {   DL_I2C_CLOCK_BUSCLK = I2C_CLKSEL_BUSCLK_SEL_ENABLE,   DL_I2C_CLOCK_MFCLK = I2C_CLKSEL_MFCLK_SEL_ENABLE }
enum	DL_I2C_CLOCK_DIVIDE {   DL_I2C_CLOCK_DIVIDE_1 = I2C_CLKDIV_RATIO_DIV_BY_1,   DL_I2C_CLOCK_DIVIDE_2 = I2C_CLKDIV_RATIO_DIV_BY_2,   DL_I2C_CLOCK_DIVIDE_3 = I2C_CLKDIV_RATIO_DIV_BY_3,   DL_I2C_CLOCK_DIVIDE_4 = I2C_CLKDIV_RATIO_DIV_BY_4,   DL_I2C_CLOCK_DIVIDE_5 = I2C_CLKDIV_RATIO_DIV_BY_5,   DL_I2C_CLOCK_DIVIDE_6 = I2C_CLKDIV_RATIO_DIV_BY_6,   DL_I2C_CLOCK_DIVIDE_7 = I2C_CLKDIV_RATIO_DIV_BY_7,   DL_I2C_CLOCK_DIVIDE_8 = I2C_CLKDIV_RATIO_DIV_BY_8 }
enum	DL_I2C_TARGET_ADDRESSING_MODE {   DL_I2C_TARGET_ADDRESSING_MODE_7_BIT = I2C_SOAR_SMODE_MODE7,   DL_I2C_TARGET_ADDRESSING_MODE_10_BIT = I2C_SOAR_SMODE_MODE10 }
enum	DL_I2C_TARGET_PEC_STATUS {   DL_I2C_TARGET_PEC_STATUS_CHECKED = I2C_TARGET_PECSR_PECSTS_CHECK_SET,   DL_I2C_TARGET_PEC_STATUS_NOT_CHECKED }
enum	DL_I2C_TARGET_PEC_CHECK_ERROR {   DL_I2C_TARGET_PEC_CHECK_ERROR_CLEARED,   DL_I2C_TARGET_PEC_CHECK_ERROR_SET = I2C_TARGET_PECSR_PECSTS_ERROR_SET }
enum	DL_I2C_ANALOG_GLITCH_FILTER_WIDTH {   DL_I2C_ANALOG_GLITCH_FILTER_WIDTH_5NS = I2C_GFCTL_AGFSEL_AGLIT_5,   DL_I2C_ANALOG_GLITCH_FILTER_WIDTH_10NS = I2C_GFCTL_AGFSEL_AGLIT_10,   DL_I2C_ANALOG_GLITCH_FILTER_WIDTH_25NS = I2C_GFCTL_AGFSEL_AGLIT_25,   DL_I2C_ANALOG_GLITCH_FILTER_WIDTH_50NS = I2C_GFCTL_AGFSEL_AGLIT_50 }
enum	DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH {   DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_DISABLED = I2C_GFCTL_DGFSEL_DISABLED,   DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_1 = I2C_GFCTL_DGFSEL_CLK_1,   DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_2 = I2C_GFCTL_DGFSEL_CLK_2,   DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_3 = I2C_GFCTL_DGFSEL_CLK_3,   DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_4 = I2C_GFCTL_DGFSEL_CLK_4,   DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_8 = I2C_GFCTL_DGFSEL_CLK_8,   DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_16 = I2C_GFCTL_DGFSEL_CLK_16,   DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_31 = I2C_GFCTL_DGFSEL_CLK_31 }
enum	DL_I2C_CONTROLLER_DIRECTION {   DL_I2C_CONTROLLER_DIRECTION_TX = I2C_MSA_DIR_TRANSMIT,   DL_I2C_CONTROLLER_DIRECTION_RX = I2C_MSA_DIR_RECEIVE }
enum	DL_I2C_CONTROLLER_ADDRESSING_MODE {   DL_I2C_CONTROLLER_ADDRESSING_MODE_7_BIT = I2C_MSA_MMODE_MODE7,   DL_I2C_CONTROLLER_ADDRESSING_MODE_10_BIT = I2C_MSA_MMODE_MODE10 }
enum	DL_I2C_CONTROLLER_PEC_STATUS {   DL_I2C_CONTROLLER_PEC_STATUS_CHECKED,   DL_I2C_CONTROLLER_PEC_STATUS_NOT_CHECKED }
enum	DL_I2C_CONTROLLER_PEC_CHECK_ERROR {   DL_I2C_CONTROLLER_PEC_CHECK_ERROR_SET,   DL_I2C_CONTROLLER_PEC_CHECK_ERROR_CLEARED }
enum	DL_I2C_CONTROLLER_SCL {   DL_I2C_CONTROLLER_SCL_HIGH = I2C_MBMON_SCL_SET,   DL_I2C_CONTROLLER_SCL_LOW = I2C_MBMON_SCL_CLEARED }
enum	DL_I2C_CONTROLLER_SDA {   DL_I2C_CONTROLLER_SDA_HIGH = I2C_MBMON_SDA_SET,   DL_I2C_CONTROLLER_SDA_LOW = I2C_MBMON_SDA_CLEARED }
enum	DL_I2C_CONTROLLER_START {   DL_I2C_CONTROLLER_START_ENABLE = I2C_MCTR_START_ENABLE,   DL_I2C_CONTROLLER_START_DISABLE = I2C_MCTR_START_DISABLE }
enum	DL_I2C_CONTROLLER_STOP {   DL_I2C_CONTROLLER_STOP_ENABLE = I2C_MCTR_STOP_ENABLE,   DL_I2C_CONTROLLER_STOP_DISABLE = I2C_MCTR_STOP_DISABLE }
enum	DL_I2C_CONTROLLER_ACK {   DL_I2C_CONTROLLER_ACK_ENABLE = I2C_MCTR_ACK_ENABLE,   DL_I2C_CONTROLLER_ACK_DISABLE = I2C_MCTR_ACK_DISABLE }
enum	DL_I2C_TX_FIFO_LEVEL {   DL_I2C_TX_FIFO_LEVEL_EMPTY = I2C_MFIFOCTL_TXTRIG_EMPTY,   DL_I2C_TX_FIFO_LEVEL_BYTES_1 = I2C_MFIFOCTL_TXTRIG_LEVEL_1,   DL_I2C_TX_FIFO_LEVEL_BYTES_2 = I2C_MFIFOCTL_TXTRIG_LEVEL_2,   DL_I2C_TX_FIFO_LEVEL_BYTES_3 = I2C_MFIFOCTL_TXTRIG_LEVEL_3,   DL_I2C_TX_FIFO_LEVEL_BYTES_4 = I2C_MFIFOCTL_TXTRIG_LEVEL_4,   DL_I2C_TX_FIFO_LEVEL_BYTES_5 = I2C_MFIFOCTL_TXTRIG_LEVEL_5,   DL_I2C_TX_FIFO_LEVEL_BYTES_6 = I2C_MFIFOCTL_TXTRIG_LEVEL_6,   DL_I2C_TX_FIFO_LEVEL_BYTES_7 = I2C_MFIFOCTL_TXTRIG_LEVEL_7 }
enum	DL_I2C_RX_FIFO_LEVEL {   DL_I2C_RX_FIFO_LEVEL_BYTES_1 = I2C_MFIFOCTL_RXTRIG_LEVEL_1,   DL_I2C_RX_FIFO_LEVEL_BYTES_2 = I2C_MFIFOCTL_RXTRIG_LEVEL_2,   DL_I2C_RX_FIFO_LEVEL_BYTES_3 = I2C_MFIFOCTL_RXTRIG_LEVEL_3,   DL_I2C_RX_FIFO_LEVEL_BYTES_4 = I2C_MFIFOCTL_RXTRIG_LEVEL_4,   DL_I2C_RX_FIFO_LEVEL_BYTES_5 = I2C_MFIFOCTL_RXTRIG_LEVEL_5,   DL_I2C_RX_FIFO_LEVEL_BYTES_6 = I2C_MFIFOCTL_RXTRIG_LEVEL_6,   DL_I2C_RX_FIFO_LEVEL_BYTES_7 = I2C_MFIFOCTL_RXTRIG_LEVEL_7,   DL_I2C_RX_FIFO_LEVEL_BYTES_8 = I2C_MFIFOCTL_RXTRIG_LEVEL_8 }
enum	DL_I2C_TARGET_RESPONSE_OVERRIDE_VALUE {   DL_I2C_TARGET_RESPONSE_OVERRIDE_VALUE_ACK = I2C_SACKCTL_ACKOVAL_DISABLE,   DL_I2C_TARGET_RESPONSE_OVERRIDE_VALUE_NACK = I2C_SACKCTL_ACKOVAL_ENABLE }
enum	DL_I2C_IIDX {   DL_I2C_IIDX_NO_INT = I2C_CPU_INT_IIDX_STAT_NO_INTR,   DL_I2C_IIDX_CONTROLLER_RX_DONE = I2C_CPU_INT_IIDX_STAT_MRXDONEFG,   DL_I2C_IIDX_CONTROLLER_TX_DONE = I2C_CPU_INT_IIDX_STAT_MTXDONEFG,   DL_I2C_IIDX_CONTROLLER_RXFIFO_TRIGGER = I2C_CPU_INT_IIDX_STAT_MRXFIFOTRG,   DL_I2C_IIDX_CONTROLLER_TXFIFO_TRIGGER = I2C_CPU_INT_IIDX_STAT_MTXFIFOTRG,   DL_I2C_IIDX_CONTROLLER_RXFIFO_FULL = I2C_CPU_INT_IIDX_STAT_MRXFIFOFULL,   DL_I2C_IIDX_CONTROLLER_TXFIFO_EMPTY = I2C_CPU_INT_IIDX_STAT_MTX_EMPTY,   DL_I2C_IIDX_CONTROLLER_NACK = I2C_CPU_INT_IIDX_STAT_MNACKFG,   DL_I2C_IIDX_CONTROLLER_START = I2C_CPU_INT_IIDX_STAT_MSTARTFG,   DL_I2C_IIDX_CONTROLLER_STOP = I2C_CPU_INT_IIDX_STAT_MSTOPFG,   DL_I2C_IIDX_CONTROLLER_ARBITRATION_LOST = I2C_CPU_INT_IIDX_STAT_MARBLOSTFG,   DL_I2C_IIDX_CONTROLLER_EVENT1_DMA_DONE,   DL_I2C_IIDX_CONTROLLER_EVENT2_DMA_DONE,   DL_I2C_IIDX_CONTROLLER_PEC_RX_ERROR = I2C_CPU_INT_IIDX_STAT_MPEC_RX_ERR,   DL_I2C_IIDX_TIMEOUT_A = I2C_CPU_INT_IIDX_STAT_TIMEOUTA,   DL_I2C_IIDX_TIMEOUT_B = I2C_CPU_INT_IIDX_STAT_TIMEOUTB,   DL_I2C_IIDX_TARGET_RX_DONE = I2C_CPU_INT_IIDX_STAT_SRXDONEFG,   DL_I2C_IIDX_TARGET_TX_DONE = I2C_CPU_INT_IIDX_STAT_STXDONEFG,   DL_I2C_IIDX_TARGET_RXFIFO_TRIGGER = I2C_CPU_INT_IIDX_STAT_SRXFIFOTRG,   DL_I2C_IIDX_TARGET_TXFIFO_TRIGGER = I2C_CPU_INT_IIDX_STAT_STXFIFOTRG,   DL_I2C_IIDX_TARGET_RXFIFO_FULL = I2C_CPU_INT_IIDX_STAT_SRXFIFOFULL,   DL_I2C_IIDX_TARGET_TXFIFO_EMPTY = I2C_CPU_INT_IIDX_STAT_STXEMPTY,   DL_I2C_IIDX_TARGET_START = I2C_CPU_INT_IIDX_STAT_SSTARTFG,   DL_I2C_IIDX_TARGET_STOP = I2C_CPU_INT_IIDX_STAT_SSTOPFG,   DL_I2C_IIDX_TARGET_GENERAL_CALL = I2C_CPU_INT_IIDX_STAT_SGENCALL,   DL_I2C_IIDX_TARGET_EVENT1_DMA_DONE = I2C_CPU_INT_IIDX_STAT_SDMA_DONE_TX,   DL_I2C_IIDX_TARGET_EVENT2_DMA_DONE = I2C_CPU_INT_IIDX_STAT_SDMA_DONE_RX,   DL_I2C_IIDX_TARGET_PEC_RX_ERROR = I2C_CPU_INT_IIDX_STAT_SPEC_RX_ERR,   DL_I2C_IIDX_TARGET_TXFIFO_UNDERFLOW = I2C_CPU_INT_IIDX_STAT_STX_UNFL,   DL_I2C_IIDX_TARGET_RXFIFO_OVERFLOW = I2C_CPU_INT_IIDX_STAT_SRX_OVFL,   DL_I2C_IIDX_TARGET_ARBITRATION_LOST = I2C_CPU_INT_IIDX_STAT_SARBLOST,   DL_I2C_IIDX_INTERRUPT_OVERFLOW = I2C_CPU_INT_IIDX_STAT_INTR_OVFL }

Functions
void	DL_I2C_setClockConfig (I2C_Regs *i2c, const DL_I2C_ClockConfig *config)
	Configure I2C source clock. More...
void	DL_I2C_getClockConfig (const I2C_Regs *i2c, DL_I2C_ClockConfig *config)
	Get I2C source clock configuration. More...
uint16_t	DL_I2C_fillControllerTXFIFO (I2C_Regs *i2c, const uint8_t *buffer, uint16_t count)
	Fills the controller TX FIFO with data. More...
void	DL_I2C_flushControllerTXFIFO (I2C_Regs *i2c)
	Flushes/removes all elements in the controller TX FIFO. More...
void	DL_I2C_flushControllerRXFIFO (I2C_Regs *i2c)
	Flushes/removes all elements in the controller RX FIFO. More...
__STATIC_INLINE bool	DL_I2C_isControllerTXFIFOFull (const I2C_Regs *i2c)
	Checks if controller TX FIFO is full. More...
__STATIC_INLINE bool	DL_I2C_isControllerTXFIFOEmpty (const I2C_Regs *i2c)
	Checks if controller TX FIFO is empty. More...
__STATIC_INLINE bool	DL_I2C_isControllerRXFIFOEmpty (const I2C_Regs *i2c)
	Checks if controller RX FIFO is empty. More...
__STATIC_INLINE void	DL_I2C_resetControllerTransfer (I2C_Regs *i2c)
	Reset transfers from from I2C controller. More...
__STATIC_INLINE void	DL_I2C_startControllerTransfer (I2C_Regs *i2c, uint32_t targetAddr, DL_I2C_CONTROLLER_DIRECTION direction, uint16_t length)
	Sets up a transfer from I2C controller. More...
__STATIC_INLINE void	DL_I2C_startControllerTransferAdvanced (I2C_Regs *i2c, uint32_t targetAddr, DL_I2C_CONTROLLER_DIRECTION direction, uint16_t length, DL_I2C_CONTROLLER_START start, DL_I2C_CONTROLLER_STOP stop, DL_I2C_CONTROLLER_ACK ack)
	Sets up a transfer from I2C controller with control of START, STOP and ACK. More...
__STATIC_INLINE bool	DL_I2C_isTargetTXFIFOFull (const I2C_Regs *i2c)
	Checks if target TX FIFO is full. More...
__STATIC_INLINE bool	DL_I2C_isTargetTXFIFOEmpty (const I2C_Regs *i2c)
	Checks if target TX FIFO is empty. More...
__STATIC_INLINE bool	DL_I2C_isTargetRXFIFOEmpty (const I2C_Regs *i2c)
	Checks if target RX FIFO is empty. More...
uint8_t	DL_I2C_fillTargetTXFIFO (I2C_Regs *i2c, const uint8_t *buffer, uint8_t count)
	Fills the target TX FIFO with data. More...
void	DL_I2C_flushTargetTXFIFO (I2C_Regs *i2c)
	Flushes/removes all elements in the target TX FIFO. More...
void	DL_I2C_flushTargetRXFIFO (I2C_Regs *i2c)
	Flushes/removes all elements in the target RX FIFO. More...
void	DL_I2C_transmitTargetDataBlocking (I2C_Regs *i2c, uint8_t data)
	Transmit target data, waiting until transmit request. More...
bool	DL_I2C_transmitTargetDataCheck (I2C_Regs *i2c, uint8_t data)
	Transmit target data. More...
uint8_t	DL_I2C_receiveTargetDataBlocking (const I2C_Regs *i2c)
	Receive target data, waiting until receive request. More...
bool	DL_I2C_receiveTargetDataCheck (const I2C_Regs *i2c, uint8_t *buffer)
	Receive target data. More...
__STATIC_INLINE void	DL_I2C_enablePower (I2C_Regs *i2c)
	Enables the Peripheral Write Enable (PWREN) register for the I2C. More...
__STATIC_INLINE void	DL_I2C_disablePower (I2C_Regs *i2c)
	Disables the Peripheral Write Enable (PWREN) register for the I2C. More...
__STATIC_INLINE bool	DL_I2C_isPowerEnabled (const I2C_Regs *i2c)
	Returns if the Peripheral Write Enable (PWREN) register for the I2C is enabled. More...
__STATIC_INLINE void	DL_I2C_reset (I2C_Regs *i2c)
	Resets i2c peripheral. More...
__STATIC_INLINE bool	DL_I2C_isReset (const I2C_Regs *i2c)
	Returns if i2c peripheral was reset. More...
__STATIC_INLINE void	DL_I2C_selectClockSource (I2C_Regs *i2c, DL_I2C_CLOCK clockSource)
	Set Clock Source. More...
__STATIC_INLINE void	DL_I2C_selectClockDivider (I2C_Regs *i2c, DL_I2C_CLOCK_DIVIDE clockDivider)
	Set Clock Divider. More...
__STATIC_INLINE DL_I2C_ANALOG_GLITCH_FILTER_WIDTH	DL_I2C_getAnalogGlitchFilterPulseWidth (const I2C_Regs *i2c)
	Get Analog Glitch Suppression Pulse Width. More...
__STATIC_INLINE void	DL_I2C_setAnalogGlitchFilterPulseWidth (I2C_Regs *i2c, DL_I2C_ANALOG_GLITCH_FILTER_WIDTH filterWidth)
	Set Analog Glitch Suppression Pulse Width. More...
__STATIC_INLINE DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH	DL_I2C_getDigitalGlitchFilterPulseWidth (const I2C_Regs *i2c)
	Get Digital Glitch Suppression Pulse Width. More...
__STATIC_INLINE void	DL_I2C_setDigitalGlitchFilterPulseWidth (I2C_Regs *i2c, DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH filterWidth)
	Set Digital Glitch Suppression Pulse Width. More...
__STATIC_INLINE void	DL_I2C_disableAnalogGlitchFilter (I2C_Regs *i2c)
	Disable Analog Glitch Suppression. More...
__STATIC_INLINE bool	DL_I2C_isAnalogGlitchFilterEnabled (const I2C_Regs *i2c)
	Checks if analog glitch suppression is enabled. More...
__STATIC_INLINE void	DL_I2C_enableAnalogGlitchFilter (I2C_Regs *i2c)
	Enable Analog Glitch Suppression. More...
__STATIC_INLINE DL_I2C_CONTROLLER_DIRECTION	DL_I2C_getControllerDirection (const I2C_Regs *i2c)
	Get direction of next controller operation. More...
__STATIC_INLINE void	DL_I2C_setControllerDirection (I2C_Regs *i2c, DL_I2C_CONTROLLER_DIRECTION direction)
	Set direction of next controller operation. More...
__STATIC_INLINE uint32_t	DL_I2C_getTargetAddress (const I2C_Regs *i2c)
	Get the address of the target being addressed when configured as an I2C controller. More...
__STATIC_INLINE void	DL_I2C_setTargetAddress (I2C_Regs *i2c, uint32_t targetAddress)
	Set the address of the target being addressed when configured as an I2C controller. More...
__STATIC_INLINE DL_I2C_CONTROLLER_ADDRESSING_MODE	DL_I2C_getControllerAddressingMode (const I2C_Regs *i2c)
	Get controller addressing mode. More...
__STATIC_INLINE void	DL_I2C_setControllerAddressingMode (I2C_Regs *i2c, DL_I2C_CONTROLLER_ADDRESSING_MODE mode)
	Set controller addressing mode between 7-bit and 10-bit mode. More...
__STATIC_INLINE void	DL_I2C_disableControllerACKOverride (I2C_Regs *i2c)
	Disable controller ACK override. More...
__STATIC_INLINE bool	DL_I2C_isControllerACKOverrideEnabled (const I2C_Regs *i2c)
	Checks if controller ACK override is enabled. More...
__STATIC_INLINE void	DL_I2C_enableControllerACKOverride (I2C_Regs *i2c)
	Enable controller ACK override. More...
__STATIC_INLINE void	DL_I2C_disableControllerReadOnTXEmpty (I2C_Regs *i2c)
	Disable controller read on TX empty. More...
__STATIC_INLINE bool	DL_I2C_isControllerReadOnTXEmptyEnabled (const I2C_Regs *i2c)
	Checks if controller read on TX empty is enabled. More...
__STATIC_INLINE void	DL_I2C_enableControllerReadOnTXEmpty (I2C_Regs *i2c)
	Enable controller read on TX empty. More...
__STATIC_INLINE uint32_t	DL_I2C_getControllerPECCountValue (const I2C_Regs *i2c)
	Get the SMBus/PMBus Packet Error Checking (PEC) count value. More...
__STATIC_INLINE void	DL_I2C_setControllerPECCountValue (I2C_Regs *i2c, uint32_t count)
	Set the SMBus/PMBus Packet Error Checking (PEC) count value. More...
__STATIC_INLINE void	DL_I2C_disableControllerPEC (I2C_Regs *i2c)
	Disable controller SMBus/PMBus Packet Error Checking (PEC) More...
__STATIC_INLINE bool	DL_I2C_isControllerPECEnabled (const I2C_Regs *i2c)
	Checks if controller SMBus/PMBus Packet Error Checking (PEC) is enabled. More...
__STATIC_INLINE void	DL_I2C_enableControllerPEC (I2C_Regs *i2c)
	Enable controller SMBus/PMBus Packet Error Checking (PEC) More...
__STATIC_INLINE uint32_t	DL_I2C_getControllerCurrentPECCount (const I2C_Regs *i2c)
	Get the current SMBus/PMBus PEC byte count of the controller state machine. More...
__STATIC_INLINE DL_I2C_CONTROLLER_PEC_STATUS	DL_I2C_getControllerPECCheckedStatus (const I2C_Regs *i2c)
	If controller SMBus/PMBus PEC was checked in last transaction. More...
__STATIC_INLINE DL_I2C_CONTROLLER_PEC_CHECK_ERROR	DL_I2C_getControllerPECCheckError (const I2C_Regs *i2c)
	Get the status of the controller SMBus/PMBus PEC Check error. More...
__STATIC_INLINE void	DL_I2C_disableControllerBurst (I2C_Regs *i2c)
	Disable I2C controller burst mode. More...
__STATIC_INLINE bool	DL_I2C_isControllerBurstEnabled (const I2C_Regs *i2c)
	Checks if I2C controller burst mode is enabled. More...
__STATIC_INLINE void	DL_I2C_enableControllerBurst (I2C_Regs *i2c)
	Enable I2C controller burst mode. More...
__STATIC_INLINE void	DL_I2C_disableStartCondition (I2C_Regs *i2c)
	Disable I2C START generation. More...
__STATIC_INLINE bool	DL_I2C_isStartConditionEnabled (const I2C_Regs *i2c)
	Checks if I2C START generation is enabled. More...
__STATIC_INLINE void	DL_I2C_enableStartCondition (I2C_Regs *i2c)
	Enable I2C START generation. More...
__STATIC_INLINE void	DL_I2C_disableStopCondition (I2C_Regs *i2c)
	Disable I2C STOP generation. More...
__STATIC_INLINE bool	DL_I2C_isStopConditionEnabled (const I2C_Regs *i2c)
	Checks if I2C STOP generation is enabled. More...
__STATIC_INLINE void	DL_I2C_enableStopCondition (I2C_Regs *i2c)
	Enable I2C STOP generation. More...
__STATIC_INLINE void	DL_I2C_disableControllerACK (I2C_Regs *i2c)
	Disable I2C controller data acknowledge (ACK or NACK) More...
__STATIC_INLINE bool	DL_I2C_isControllerACKEnabled (const I2C_Regs *i2c)
	Checks if I2C controller data acknowledge (ACK or NACK) is enabled. More...
__STATIC_INLINE void	DL_I2C_enableControllerACK (I2C_Regs *i2c)
	Enable I2C controller data acknowledge (ACK or NACK) More...
__STATIC_INLINE uint32_t	DL_I2C_getTransactionLength (const I2C_Regs *i2c)
	Get transaction length in bytes. More...
__STATIC_INLINE void	DL_I2C_setTransactionLength (I2C_Regs *i2c, uint32_t length)
	Set transaction length in bytes. More...
__STATIC_INLINE uint32_t	DL_I2C_getControllerStatus (const I2C_Regs *i2c)
	Get status of I2C bus controller for controller. More...
__STATIC_INLINE uint16_t	DL_I2C_getTransactionCount (const I2C_Regs *i2c)
	Get transaction count in bytes. More...
__STATIC_INLINE uint8_t	DL_I2C_receiveControllerData (const I2C_Regs *i2c)
	Get byte of data from I2C controller. More...
__STATIC_INLINE void	DL_I2C_transmitControllerData (I2C_Regs *i2c, uint8_t data)
	Set next byte to be transferred during the next transaction. More...
__STATIC_INLINE uint8_t	DL_I2C_getTimerPeriod (const I2C_Regs *i2c)
	Get timer period This field is used in the equation to configure SCL_PERIOD: More...
__STATIC_INLINE void	DL_I2C_setTimerPeriod (I2C_Regs *i2c, uint8_t period)
	Set timer period This field is used in the equation to configure SCL_PERIOD: More...
__STATIC_INLINE void	DL_I2C_disableLoopbackMode (I2C_Regs *i2c)
	Disable loopback mode. More...
__STATIC_INLINE bool	DL_I2C_isLoopbackModeEnabled (const I2C_Regs *i2c)
	Checks if loopback mode is enabled. More...
__STATIC_INLINE void	DL_I2C_enableLoopbackMode (I2C_Regs *i2c)
	Enable loopback mode. More...
__STATIC_INLINE void	DL_I2C_disableMultiControllerMode (I2C_Regs *i2c)
	Disable multicontroller mode. More...
__STATIC_INLINE bool	DL_I2C_isMultiControllerModeEnabled (const I2C_Regs *i2c)
	Checks if multicontroller mode is enabled. More...
__STATIC_INLINE void	DL_I2C_enableMultiControllerMode (I2C_Regs *i2c)
	Enable multicontroller mode. More...
__STATIC_INLINE void	DL_I2C_disableController (I2C_Regs *i2c)
	Disable controller. More...
__STATIC_INLINE bool	DL_I2C_isControllerEnabled (const I2C_Regs *i2c)
	Checks if controller is enabled. More...
__STATIC_INLINE void	DL_I2C_enableController (I2C_Regs *i2c)
	Enable controller. More...
__STATIC_INLINE void	DL_I2C_disableControllerClockStretching (I2C_Regs *i2c)
	Disable controller clock stretching. More...
__STATIC_INLINE bool	DL_I2C_isControllerClockStretchingEnabled (const I2C_Regs *i2c)
	Checks if controller clock stretching is enabled. More...
__STATIC_INLINE void	DL_I2C_enableControllerClockStretching (I2C_Regs *i2c)
	Enable controller clock stretching. More...
__STATIC_INLINE DL_I2C_CONTROLLER_SCL	DL_I2C_getSCLStatus (const I2C_Regs *i2c)
	Get SCL signal status. More...
__STATIC_INLINE DL_I2C_CONTROLLER_SDA	DL_I2C_getSDAStatus (const I2C_Regs *i2c)
	Get SDA signal status. More...
__STATIC_INLINE DL_I2C_TX_FIFO_LEVEL	DL_I2C_getControllerTXFIFOThreshold (const I2C_Regs *i2c)
	Get controller TX FIFO threshold level. More...
__STATIC_INLINE void	DL_I2C_setControllerTXFIFOThreshold (I2C_Regs *i2c, DL_I2C_TX_FIFO_LEVEL level)
	Set controller TX FIFO threshold level. More...
__STATIC_INLINE void	DL_I2C_stopFlushControllerTXFIFO (I2C_Regs *i2c)
	Stop controller TX FIFO flush. More...
__STATIC_INLINE void	DL_I2C_startFlushControllerTXFIFO (I2C_Regs *i2c)
	Start controller TX FIFO flush. More...
__STATIC_INLINE DL_I2C_RX_FIFO_LEVEL	DL_I2C_getControllerRXFIFOThreshold (const I2C_Regs *i2c)
	Get controller RX FIFO threshold level. More...
__STATIC_INLINE void	DL_I2C_setControllerRXFIFOThreshold (I2C_Regs *i2c, DL_I2C_RX_FIFO_LEVEL level)
	Set controller RX FIFO threshold level. More...
__STATIC_INLINE void	DL_I2C_stopFlushControllerRXFIFO (I2C_Regs *i2c)
	Stop controller RX FIFO flush. More...
__STATIC_INLINE void	DL_I2C_startFlushControllerRXFIFO (I2C_Regs *i2c)
	Start controller RX FIFO flush. More...
__STATIC_INLINE uint32_t	DL_I2C_getControllerRXFIFOCounter (const I2C_Regs *i2c)
	Get number of bytes which can be read from RX FIFO. More...
__STATIC_INLINE uint32_t	DL_I2C_getControllerTXFIFOCounter (const I2C_Regs *i2c)
	Get number of bytes which can be put into TX FIFO. More...
__STATIC_INLINE bool	DL_I2C_isControllerRXFIFOFlushActive (const I2C_Regs *i2c)
	Checks if controller RX FIFO flush is active. More...
__STATIC_INLINE bool	DL_I2C_isControllerTXFIFOFlushActive (const I2C_Regs *i2c)
	Checks if controller TX FIFO flush is active. More...
__STATIC_INLINE void	DL_I2C_setTargetOwnAddress (I2C_Regs *i2c, uint32_t addr)
	Set target own address. More...
__STATIC_INLINE uint32_t	DL_I2C_getTargetOwnAddress (const I2C_Regs *i2c)
	Get target own address. More...
__STATIC_INLINE void	DL_I2C_enableTargetOwnAddress (I2C_Regs *i2c)
	Enable target own address. More...
__STATIC_INLINE void	DL_I2C_disableTargetOwnAddress (I2C_Regs *i2c)
	Disable target own address. More...
__STATIC_INLINE bool	DL_I2C_isTargetOwnAddressEnabled (const I2C_Regs *i2c)
	Checks if target own address is enabled. More...
__STATIC_INLINE void	DL_I2C_setTargetAddressingMode (I2C_Regs *i2c, DL_I2C_TARGET_ADDRESSING_MODE mode)
	Set target addressing mode. More...
__STATIC_INLINE DL_I2C_TARGET_ADDRESSING_MODE	DL_I2C_getTargetAddressingMode (const I2C_Regs *i2c)
	Get target addressing mode. More...
__STATIC_INLINE uint32_t	I2C_getTargetOwnAddressAlternate (const I2C_Regs *i2c)
	Get target own address alternate. More...
__STATIC_INLINE void	DL_I2C_setTargetOwnAddressAlternate (I2C_Regs *i2c, uint32_t addr)
	Set target own address alternate. More...
__STATIC_INLINE uint32_t	I2C_getTargetOwnAddressAlternateMask (const I2C_Regs *i2c)
	Get target own address alternate mask. More...
__STATIC_INLINE void	DL_I2C_setTargetOwnAddressAlternateMask (I2C_Regs *i2c, uint32_t addressMask)
	Set target own address alternate mask. More...
__STATIC_INLINE void	DL_I2C_disableTargetOwnAddressAlternate (I2C_Regs *i2c)
	Disable usage of target own address alternate. More...
__STATIC_INLINE bool	DL_I2C_isTargetOwnAddressAlternateEnabled (const I2C_Regs *i2c)
	Checks if target own address alternate is enabled. More...
__STATIC_INLINE void	DL_I2C_enableTargetOwnAddressAlternate (I2C_Regs *i2c)
	Enable usage of target own address alternate. More...
__STATIC_INLINE uint32_t	DL_I2C_getTargetAddressMatch (const I2C_Regs *i2c)
	Get the address for which address match happened. More...
__STATIC_INLINE void	DL_I2C_disableTargetClockStretching (I2C_Regs *i2c)
	Disable target clock stretching. More...
__STATIC_INLINE bool	DL_I2C_isTargetClockStretchingEnabled (const I2C_Regs *i2c)
	Checks if target clock stretching is enabled. More...
__STATIC_INLINE void	DL_I2C_enableTargetClockStretching (I2C_Regs *i2c)
	Enable target clock stretching. More...
__STATIC_INLINE void	DL_I2C_disableTargetTXEmptyOnTXRequest (I2C_Regs *i2c)
	Disable target TX empty interrupt on transmit request. More...
__STATIC_INLINE bool	DL_I2C_isTargetTXEmptyOnTXRequestEnabled (const I2C_Regs *i2c)
	Checks if target TX empty interrupt on transmit request is enabled. More...
__STATIC_INLINE void	DL_I2C_enableTargetTXEmptyOnTXRequest (I2C_Regs *i2c)
	Enable target TX empty interrupt on transmit request. More...
__STATIC_INLINE void	DL_I2C_disableTargetTXTriggerInTXMode (I2C_Regs *i2c)
	Disable target TX trigger in TX mode. More...
__STATIC_INLINE bool	DL_I2C_isTargetTXTriggerInTXModeEnabled (const I2C_Regs *i2c)
	Checks if target TX trigger in TX mode is enabled. More...
__STATIC_INLINE void	DL_I2C_enableTargetTXTriggerInTXMode (I2C_Regs *i2c)
	Enable TX trigger when target is in TX mode. More...
__STATIC_INLINE void	DL_I2C_disableTargetTXWaitWhenTXFIFOStale (I2C_Regs *i2c)
	Disable target TX transfer waits when stale data in TX FIFO. More...
__STATIC_INLINE bool	DL_I2C_isTargetTXWaitWhenTXFIFOStaleEnabled (const I2C_Regs *i2c)
	Checks if target TX transfer waits when stale data in TX FIFO is enabled. More...
__STATIC_INLINE void	DL_I2C_enableTargetTXWaitWhenTXFIFOStale (I2C_Regs *i2c)
	Enable target TX transfer waits when stale data in TX FIFO. More...
__STATIC_INLINE void	DL_I2C_disableTargetRXFullOnRXRequest (I2C_Regs *i2c)
	Disable target RX full interrupt on receive request. More...
__STATIC_INLINE bool	DL_I2C_isTargetRXFullOnRXRequestEnabled (const I2C_Regs *i2c)
	Checks if target RX full interrupt on receive request is enabled. More...
__STATIC_INLINE void	DL_I2C_enableTargetRXFullOnRXRequest (I2C_Regs *i2c)
	Enable target RX full interrupt on receive request. More...
__STATIC_INLINE void	DL_I2C_disableDefaultHostAddress (I2C_Regs *i2c)
	Disable SMBus/PMBus default host address of 000 1000b. More...
__STATIC_INLINE bool	DL_I2C_isDefaultHostAddressEnabled (const I2C_Regs *i2c)
	Checks if SMBus/PMBus default host address of 000 1000b is enabled. More...
__STATIC_INLINE void	DL_I2C_enableDefaultHostAddress (I2C_Regs *i2c)
	Enable SMBus/PMBus default host address of 000 1000b. More...
__STATIC_INLINE void	DL_I2C_disableAlertResponseAddress (I2C_Regs *i2c)
	Disable SMBus/PMBus Alert response address (ARA) of 000 1100b. More...
__STATIC_INLINE bool	DL_I2C_isAlertResponseAddressEnabled (const I2C_Regs *i2c)
	Checks if SMBus/PMBus Alert response address (ARA) of 000 1100b is enabled. More...
__STATIC_INLINE void	DL_I2C_enableAlertResponseAddress (I2C_Regs *i2c)
	Enable SMBus/PMBus Alert response address (ARA) of 000 1100b. More...
__STATIC_INLINE void	DL_I2C_disableDefaultDeviceAddress (I2C_Regs *i2c)
	Disable SMBus/PMBus default device address of 110 0001b. More...
__STATIC_INLINE bool	DL_I2C_isDefaultDeviceAddressEnabled (const I2C_Regs *i2c)
	Checks SMBus/PMBus default device address of 110 0001b is enabled. More...
__STATIC_INLINE void	DL_I2C_enableDefaultDeviceAddress (I2C_Regs *i2c)
	Enable SMBus/PMBus default device address of 110 0001b. More...
__STATIC_INLINE void	DL_I2C_disableTargetWakeup (I2C_Regs *i2c)
	Disable target wakeup. More...
__STATIC_INLINE bool	DL_I2C_isTargetWakeupEnabled (const I2C_Regs *i2c)
	Checks if target wakeup is enabled. More...
__STATIC_INLINE void	DL_I2C_enableTargetWakeup (I2C_Regs *i2c)
	Enable target wakeup. More...
__STATIC_INLINE void	DL_I2C_disableTarget (I2C_Regs *i2c)
	Disable target functionality. More...
__STATIC_INLINE bool	DL_I2C_isTargetEnabled (const I2C_Regs *i2c)
	Checks if target functionality is enabled. More...
__STATIC_INLINE void	DL_I2C_enableTarget (I2C_Regs *i2c)
	Enable usage of target functionality. More...
__STATIC_INLINE void	DL_I2C_disableGeneralCall (I2C_Regs *i2c)
	Disable general call address of 000 0000b. More...
__STATIC_INLINE bool	DL_I2C_isGeneralCallEnabled (const I2C_Regs *i2c)
	Checks if general call address of 000 0000b is enabled. More...
__STATIC_INLINE void	DL_I2C_enableGeneralCall (I2C_Regs *i2c)
	Enable usage of general call address of 000 0000b. More...
__STATIC_INLINE uint32_t	DL_I2C_getTargetStatus (const I2C_Regs *i2c)
	Get status of I2C bus controller for target. More...
__STATIC_INLINE uint8_t	DL_I2C_receiveTargetData (const I2C_Regs *i2c)
	Get byte of data from I2C target. More...
__STATIC_INLINE void	DL_I2C_transmitTargetData (I2C_Regs *i2c, uint8_t data)
	Set next byte to be transferred during the next transaction. More...
__STATIC_INLINE void	DL_I2C_disableTargetACKOverride (I2C_Regs *i2c)
	Disable target ACK override. More...
__STATIC_INLINE bool	DL_I2C_isTargetACKOverrideEnabled (const I2C_Regs *i2c)
	Checks if target ACK override is enabled. More...
__STATIC_INLINE void	DL_I2C_enableTargetACKOverride (I2C_Regs *i2c)
	Enable target ACK override. More...
__STATIC_INLINE DL_I2C_TARGET_RESPONSE_OVERRIDE_VALUE	DL_I2C_getTargetACKOverrideValue (const I2C_Regs *i2c)
	Get target acknowledge override value. More...
__STATIC_INLINE void	DL_I2C_setTargetACKOverrideValue (I2C_Regs *i2c, DL_I2C_TARGET_RESPONSE_OVERRIDE_VALUE value)
	Set target acknowledge override value. More...
__STATIC_INLINE void	DL_I2C_disableACKOverrideOnStart (I2C_Regs *i2c)
	Disable target ACK override on Start Condition. More...
__STATIC_INLINE bool	DL_I2C_isACKOverrideOnStartEnabled (const I2C_Regs *i2c)
	Checks if target ACK override on Start condition is enabled. More...
__STATIC_INLINE void	DL_I2C_enableACKOverrideOnStart (I2C_Regs *i2c)
	Enable target ACK override on Start condition. More...
__STATIC_INLINE void	DL_I2C_disableACKOverrideOnPECNext (I2C_Regs *i2c)
	Disable target ACK override when SMBus/PMBus PEC is next byte. More...
__STATIC_INLINE bool	DL_I2C_isACKOverrideOnPECNextEnabled (const I2C_Regs *i2c)
	Checks if target ACK override when SMBus/PMBus PEC is next byte is enabled. More...
__STATIC_INLINE void	DL_I2C_enableACKOverrideOnPECNext (I2C_Regs *i2c)
	Enable target ACK override when SMBus/PMBus PEC is next byte. More...
__STATIC_INLINE void	DL_I2C_disableACKOverrideOnPECDone (I2C_Regs *i2c)
	Disable target ACK override when SMBus/PMBus PEC is next byte. More...
__STATIC_INLINE bool	DL_I2C_isACKOverrideOnPECDoneEnabled (const I2C_Regs *i2c)
	Checks if target ACK override when SMBus/PMBus PEC is next byte is enabled. More...
__STATIC_INLINE void	DL_I2C_enableACKOverrideOnPECDone (I2C_Regs *i2c)
	Enable target ACK override when SMBus/PMBus PEC is done. More...
__STATIC_INLINE uint32_t	DL_I2C_getTargetPECCountValue (const I2C_Regs *i2c)
	Get the target SMBus/PMBus Packet Error Checking (PEC) count value. More...
__STATIC_INLINE void	DL_I2C_setTargetPECCountValue (I2C_Regs *i2c, uint32_t count)
	Set the target SMBus/PMBus Packet Error Checking (PEC) count value. More...
__STATIC_INLINE void	DL_I2C_disableTargetPEC (I2C_Regs *i2c)
	Disable target SMBus/PMBus Packet Error Checking (PEC) More...
__STATIC_INLINE bool	DL_I2C_isTargetPECEnabled (const I2C_Regs *i2c)
	Checks if target SMBus/PMBus Packet Error Checking (PEC) is enabled. More...
__STATIC_INLINE void	DL_I2C_enableTargetPEC (I2C_Regs *i2c)
	Enable target SMBus/PMBus Packet Error Checking (PEC) More...
__STATIC_INLINE uint32_t	DL_I2C_getTargetCurrentPECCount (const I2C_Regs *i2c)
	Get the current SMBus/PMBus PEC byte count of the Target state machine. More...
__STATIC_INLINE DL_I2C_TARGET_PEC_STATUS	DL_I2C_getTargetPECCheckedStatus (const I2C_Regs *i2c)
	Get status if SMBus/PMBus target PEC was checked in last transaction. More...
__STATIC_INLINE DL_I2C_TARGET_PEC_CHECK_ERROR	DL_I2C_getTargetPECCheckError (const I2C_Regs *i2c)
	Get status if SMBus/PMBus target PEC had an error. More...
__STATIC_INLINE DL_I2C_TX_FIFO_LEVEL	DL_I2C_getTargetTXFIFOThreshold (const I2C_Regs *i2c)
	Get target TX FIFO threshold level. More...
__STATIC_INLINE void	DL_I2C_setTargetTXFIFOThreshold (I2C_Regs *i2c, DL_I2C_TX_FIFO_LEVEL level)
	Set target TX FIFO threshold level. More...
__STATIC_INLINE void	DL_I2C_stopFlushTargetTXFIFO (I2C_Regs *i2c)
	Stop target TX FIFO flush. More...
__STATIC_INLINE void	DL_I2C_startFlushTargetTXFIFO (I2C_Regs *i2c)
	Start target TX FIFO flush. More...
__STATIC_INLINE void	DL_I2C_stopFlushTargetRXFIFO (I2C_Regs *i2c)
	Stop target RX FIFO flush. More...
__STATIC_INLINE void	DL_I2C_startFlushTargetRXFIFO (I2C_Regs *i2c)
	Start target RX FIFO flush. More...
__STATIC_INLINE DL_I2C_RX_FIFO_LEVEL	DL_I2C_getTargetRXFIFOThreshold (const I2C_Regs *i2c)
	Get target RX FIFO threshold level. More...
__STATIC_INLINE void	DL_I2C_setTargetRXFIFOThreshold (I2C_Regs *i2c, DL_I2C_RX_FIFO_LEVEL level)
	Set target RX FIFO threshold level. More...
__STATIC_INLINE uint32_t	DL_I2C_getTargetRXFIFOCounter (const I2C_Regs *i2c)
	Get number of bytes which can be read from RX FIFO. More...
__STATIC_INLINE uint32_t	DL_I2C_getTargetTXFIFOCounter (const I2C_Regs *i2c)
	Get number of bytes which can be put into TX FIFO. More...
__STATIC_INLINE bool	DL_I2C_isTargetRXFIFOFlushActive (const I2C_Regs *i2c)
	Checks if target RX FIFO flush is active. More...
__STATIC_INLINE bool	DL_I2C_isTargetTXFIFOFlushActive (const I2C_Regs *i2c)
	Checks if target TX FIFO flush is active. More...
__STATIC_INLINE void	DL_I2C_enableInterrupt (I2C_Regs *i2c, uint32_t interruptMask)
	Enable I2C interrupts. More...
__STATIC_INLINE void	DL_I2C_disableInterrupt (I2C_Regs *i2c, uint32_t interruptMask)
	Disable I2C interrupts. More...
__STATIC_INLINE uint32_t	DL_I2C_getEnabledInterrupts (const I2C_Regs *i2c, uint32_t interruptMask)
	Check which I2C interrupts are enabled. More...
__STATIC_INLINE uint32_t	DL_I2C_getEnabledInterruptStatus (const I2C_Regs *i2c, uint32_t interruptMask)
	Check interrupt flag of enabled I2C interrupts. More...
__STATIC_INLINE uint32_t	DL_I2C_getRawInterruptStatus (const I2C_Regs *i2c, uint32_t interruptMask)
	Check interrupt flag of any I2C interrupt. More...
__STATIC_INLINE DL_I2C_IIDX	DL_I2C_getPendingInterrupt (const I2C_Regs *i2c)
	Get highest priority pending I2C interrupt. More...
__STATIC_INLINE void	DL_I2C_clearInterruptStatus (I2C_Regs *i2c, uint32_t interruptMask)
	Clear pending I2C interrupts. More...
__STATIC_INLINE void	DL_I2C_enableDMAEvent (I2C_Regs *i2c, DL_I2C_EVENT_ROUTE index, uint32_t interrupt)
	Enables I2C interrupt for triggering DMA events. More...
__STATIC_INLINE void	DL_I2C_disableDMAEvent (I2C_Regs *i2c, DL_I2C_EVENT_ROUTE index, uint32_t interrupt)
	Disables I2C interrupt from triggering DMA events. More...
__STATIC_INLINE uint32_t	DL_I2C_getEnabledDMAEvents (I2C_Regs *i2c, DL_I2C_EVENT_ROUTE index, uint32_t interruptMask)
	Check which I2C interrupt for DMA receive events is enabled. More...
__STATIC_INLINE uint32_t	DL_I2C_getEnabledDMAEventStatus (const I2C_Regs *i2c, DL_I2C_EVENT_ROUTE index, uint32_t interruptMask)
	Check interrupt flag of enabled I2C interrupt for DMA event. More...
__STATIC_INLINE uint32_t	DL_I2C_getRawDMAEventStatus (const I2C_Regs *i2c, DL_I2C_EVENT_ROUTE index, uint32_t interruptMask)
	Check interrupt flag of any I2C interrupt for DMA event. More...
__STATIC_INLINE DL_I2C_DMA_IIDX	DL_I2C_getPendingDMAEvent (const I2C_Regs *i2c, DL_I2C_EVENT_ROUTE index)
	Get highest priority pending I2C interrupt for DMA event. More...
__STATIC_INLINE void	DL_I2C_clearDMAEvent (I2C_Regs *i2c, DL_I2C_EVENT_ROUTE index, uint32_t interrupt)
	Clear pending SPI interrupts for DMA events. More...
__STATIC_INLINE void	DL_I2C_disableGlitchFilterChaining (I2C_Regs *i2c)
	Disable analog and digital glitch filter chaining. More...
__STATIC_INLINE bool	DL_I2C_isGlitchFilterChainingEnabled (const I2C_Regs *i2c)
	Checks if analog and digital glitch filter chaining is enabled. More...
__STATIC_INLINE void	DL_I2C_enableGlitchFilterChaining (I2C_Regs *i2c)
	Enable analog and digitial glitch filter chaining. More...
__STATIC_INLINE uint32_t	DL_I2C_getTimeoutACount (const I2C_Regs *i2c)
	Get the Timeout Counter A value. More...
__STATIC_INLINE void	DL_I2C_setTimeoutACount (I2C_Regs *i2c, uint32_t count)
	Set the Timeout Counter A value. More...
__STATIC_INLINE void	DL_I2C_disableTimeoutA (I2C_Regs *i2c)
	Disable Timeout Counter A. More...
__STATIC_INLINE bool	DL_I2C_isTimeoutAEnabled (const I2C_Regs *i2c)
	Checks if Timeout Counter A is enabled. More...
__STATIC_INLINE void	DL_I2C_enableTimeoutA (I2C_Regs *i2c)
	Enable Timeout Counter A. More...
__STATIC_INLINE uint32_t	DL_I2C_getCurrentTimeoutACounter (const I2C_Regs *i2c)
	Get the current Timer Counter A value. More...
__STATIC_INLINE uint32_t	DL_I2C_getTimeoutBCount (const I2C_Regs *i2c)
	Get the Timeout Counter B value. More...
__STATIC_INLINE void	DL_I2C_setTimeoutBCount (I2C_Regs *i2c, uint32_t count)
	Set the Timeout Counter B value. More...
__STATIC_INLINE void	DL_I2C_disableTimeoutB (I2C_Regs *i2c)
	Disable Timeout Counter B. More...
__STATIC_INLINE bool	DL_I2C_isTimeoutBEnabled (const I2C_Regs *i2c)
	Checks if Timeout Counter B is enabled. More...
__STATIC_INLINE void	DL_I2C_enableTimeoutB (I2C_Regs *i2c)
	Enable Timeout Counter B. More...
__STATIC_INLINE uint32_t	DL_I2C_getCurrentTimeoutBCounter (const I2C_Regs *i2c)
	Get the current Timer Counter B value. More...

Detailed Description

Overview

The I2C Library allows full configuration of the MSPM0 I2C module. The I2C module provides a standardized serial interface to transfer data between MSP devices and other external I2C devices (such as a sensors, memory, or DACs).

---

Macro Definition Documentation

DL_I2C_TX_FIFO_COUNT_MAXIMUM

#define DL_I2C_TX_FIFO_COUNT_MAXIMUM   ((uint32_t)I2C_SYS_FENTRIES << 8)

I2C number of bytes which could be put into the TX FIFO.

This variable is device specific and is calculated using the system parameter I2C_SYS_FENTRIES defined in each devices header file.

Referenced by DL_I2C_isControllerTXFIFOEmpty(), and DL_I2C_isTargetTXFIFOEmpty().

DL_I2C_RX_FIFO_COUNT_MAXIMUM

#define DL_I2C_RX_FIFO_COUNT_MAXIMUM   ((uint32_t)I2C_SYS_FENTRIES)

I2C number of bytes which could be put into the RX FIFO.

This variable is device specific and is calculated using the system parameter I2C_SYS_FENTRIES defined in each devices header file.

Enumeration Type Documentation

DL_I2C_DMA_IIDX

enum DL_I2C_DMA_IIDX

Enumerator
DL_I2C_DMA_IIDX_TARGET_TXFIFO_TRIGGER	I2C interrupt index for enabling I2C Target Transmit FIFO Trigger as DMA trigger
DL_I2C_DMA_IIDX_TARGET_RXFIFO_TRIGGER	I2C interrupt index for enabling I2C Target Receive FIFO Trigger as DMA trigger
DL_I2C_DMA_IIDX_CONTROLLER_TXFIFO_TRIGGER	I2C interrupt index for enabling I2C Controller Transmit FIFO Trigger as DMA trigger
DL_I2C_DMA_IIDX_CONTROLLER_RXFIFO_TRIGGER	I2C interrupt index for enabling I2C Controller Receive FIFO Trigger as DMA trigger

DL_I2C_EVENT_ROUTE

enum DL_I2C_EVENT_ROUTE

Enumerator
DL_I2C_EVENT_ROUTE_1	I2C event route 1
DL_I2C_EVENT_ROUTE_2	I2C event route 2

DL_I2C_CLOCK

enum DL_I2C_CLOCK

Enumerator
DL_I2C_CLOCK_BUSCLK	BUSCLK enabled as I2C clock source
DL_I2C_CLOCK_MFCLK	MFCLK enabled as I2C clock source

DL_I2C_CLOCK_DIVIDE

enum DL_I2C_CLOCK_DIVIDE

Enumerator
DL_I2C_CLOCK_DIVIDE_1	I2C Clock Divided by 1
DL_I2C_CLOCK_DIVIDE_2	I2C Clock Divided by 2
DL_I2C_CLOCK_DIVIDE_3	I2C Clock Divided by 3
DL_I2C_CLOCK_DIVIDE_4	I2C Clock Divided by 4
DL_I2C_CLOCK_DIVIDE_5	I2C Clock Divided by 5
DL_I2C_CLOCK_DIVIDE_6	I2C Clock Divided by 6
DL_I2C_CLOCK_DIVIDE_7	I2C Clock Divided by 7
DL_I2C_CLOCK_DIVIDE_8	I2C Clock Divided by 8

DL_I2C_TARGET_ADDRESSING_MODE

enum DL_I2C_TARGET_ADDRESSING_MODE

Enumerator
DL_I2C_TARGET_ADDRESSING_MODE_7_BIT	Enable Target in 7-bit addressing mode
DL_I2C_TARGET_ADDRESSING_MODE_10_BIT	Enable Target in 10-bit addressing mode

DL_I2C_TARGET_PEC_STATUS

enum DL_I2C_TARGET_PEC_STATUS

Enumerator
DL_I2C_TARGET_PEC_STATUS_CHECKED	I2C Target SMBus/PMBus PEC was checked in the transaction that occurred before the last Stop
DL_I2C_TARGET_PEC_STATUS_NOT_CHECKED	I2C Target SMBus/PMBus PEC was not checked in the transaction that occurred before the last Stop

DL_I2C_TARGET_PEC_CHECK_ERROR

enum DL_I2C_TARGET_PEC_CHECK_ERROR

Enumerator
DL_I2C_TARGET_PEC_CHECK_ERROR_CLEARED	Indicates PEC check error did not occurr in the transaction that occurred before the last Stop
DL_I2C_TARGET_PEC_CHECK_ERROR_SET	Indicates PEC check error occurred in the transaction that occurred before the last Stop

DL_I2C_ANALOG_GLITCH_FILTER_WIDTH

enum DL_I2C_ANALOG_GLITCH_FILTER_WIDTH

Enumerator
DL_I2C_ANALOG_GLITCH_FILTER_WIDTH_5NS	Pulses shorter than 5ns in length are filtered.
DL_I2C_ANALOG_GLITCH_FILTER_WIDTH_10NS	Pulses shorter than 10ns in length are filtered.
DL_I2C_ANALOG_GLITCH_FILTER_WIDTH_25NS	Pulses shorter than 25ns in length are filtered.
DL_I2C_ANALOG_GLITCH_FILTER_WIDTH_50NS	Pulses shorter than 50ns in length are filtered.

DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH

enum DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH

Enumerator
DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_DISABLED	Pulses filtering disabled.
DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_1	Pulses shorter than 1 functional clock tick in length are filtered.
DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_2	Pulses shorter than 2 functional clock ticks in length are filtered.
DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_3	Pulses shorter than 3 functional clock ticks in length are filtered.
DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_4	Pulses shorter than 4 functional clock ticks in length are filtered.
DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_8	Pulses shorter than 8 functional clock ticks in length are filtered.
DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_16	Pulses shorter than 16 functional clock ticks in length are filtered.
DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH_CLOCKS_31	Pulses shorter than 31 functional clock ticks in length are filtered.

DL_I2C_CONTROLLER_DIRECTION

enum DL_I2C_CONTROLLER_DIRECTION

Enumerator
DL_I2C_CONTROLLER_DIRECTION_TX	Set direction to controller transmitting to target
DL_I2C_CONTROLLER_DIRECTION_RX	Set direction to controller receiving from target

DL_I2C_CONTROLLER_ADDRESSING_MODE

enum DL_I2C_CONTROLLER_ADDRESSING_MODE

Enumerator
DL_I2C_CONTROLLER_ADDRESSING_MODE_7_BIT	Enable Controller in 7-bit addressing mode
DL_I2C_CONTROLLER_ADDRESSING_MODE_10_BIT	Enable Controller in 10-bit addressing mode

DL_I2C_CONTROLLER_PEC_STATUS

enum DL_I2C_CONTROLLER_PEC_STATUS

Enumerator
DL_I2C_CONTROLLER_PEC_STATUS_CHECKED	I2C Controller SMBus/PMBus PEC was checked in the transaction that occurred before the last Stop
DL_I2C_CONTROLLER_PEC_STATUS_NOT_CHECKED	I2C Controller SMBus/PMBus PEC was not checked in the transaction that occurred the last Stop

DL_I2C_CONTROLLER_PEC_CHECK_ERROR

enum DL_I2C_CONTROLLER_PEC_CHECK_ERROR

Enumerator
DL_I2C_CONTROLLER_PEC_CHECK_ERROR_SET	I2C Controller SMBus/PMBus PEC check error occurred in the transaction before the last stop
DL_I2C_CONTROLLER_PEC_CHECK_ERROR_CLEARED	I2C Controller SMBus/PMBus PEC check error did not occur in the transaction before the last stop

DL_I2C_CONTROLLER_SCL

enum DL_I2C_CONTROLLER_SCL

Enumerator
DL_I2C_CONTROLLER_SCL_HIGH	I2C SCL signal high
DL_I2C_CONTROLLER_SCL_LOW	I2C SCL signal low

DL_I2C_CONTROLLER_SDA

enum DL_I2C_CONTROLLER_SDA

Enumerator
DL_I2C_CONTROLLER_SDA_HIGH	I2C SDA signal high
DL_I2C_CONTROLLER_SDA_LOW	I2C SDA signal low

DL_I2C_CONTROLLER_START

enum DL_I2C_CONTROLLER_START

Enumerator
DL_I2C_CONTROLLER_START_ENABLE	Controller generates START condition
DL_I2C_CONTROLLER_START_DISABLE	Controller doesn't generate START condition

DL_I2C_CONTROLLER_STOP

enum DL_I2C_CONTROLLER_STOP

Enumerator
DL_I2C_CONTROLLER_STOP_ENABLE	Controller generates STOP condition
DL_I2C_CONTROLLER_STOP_DISABLE	Controller doesn't generate STOP condition

DL_I2C_CONTROLLER_ACK

enum DL_I2C_CONTROLLER_ACK

Enumerator
DL_I2C_CONTROLLER_ACK_ENABLE	Last received data byte of a transaction is not ACKed automatically
DL_I2C_CONTROLLER_ACK_DISABLE	Last received data byte of a transaction is ACKed automatically

DL_I2C_TX_FIFO_LEVEL

enum DL_I2C_TX_FIFO_LEVEL

Enumerator
DL_I2C_TX_FIFO_LEVEL_EMPTY	Trigger when the TX FIFO is empty
DL_I2C_TX_FIFO_LEVEL_BYTES_1	Trigger when TX FIFO contains 1 byte
DL_I2C_TX_FIFO_LEVEL_BYTES_2	Trigger when TX FIFO contains 2 bytes
DL_I2C_TX_FIFO_LEVEL_BYTES_3	Trigger when TX FIFO contains 3 bytes
DL_I2C_TX_FIFO_LEVEL_BYTES_4	Trigger when TX FIFO contains 4 bytes
DL_I2C_TX_FIFO_LEVEL_BYTES_5	Trigger when TX FIFO contains 5 bytes
DL_I2C_TX_FIFO_LEVEL_BYTES_6	Trigger when TX FIFO contains 6 bytes
DL_I2C_TX_FIFO_LEVEL_BYTES_7	Trigger when TX FIFO contains 7 bytes

DL_I2C_RX_FIFO_LEVEL

enum DL_I2C_RX_FIFO_LEVEL

Enumerator
DL_I2C_RX_FIFO_LEVEL_BYTES_1	Trigger when RX FIFO contains at least 1 byte
DL_I2C_RX_FIFO_LEVEL_BYTES_2	Trigger when RX FIFO contains at least 2 bytes
DL_I2C_RX_FIFO_LEVEL_BYTES_3	Trigger when RX FIFO contains at least 3 bytes
DL_I2C_RX_FIFO_LEVEL_BYTES_4	Trigger when RX FIFO contains at least 4 bytes
DL_I2C_RX_FIFO_LEVEL_BYTES_5	Trigger when RX FIFO contains at least 5 bytes
DL_I2C_RX_FIFO_LEVEL_BYTES_6	Trigger when RX FIFO contains at least 6 bytes
DL_I2C_RX_FIFO_LEVEL_BYTES_7	Trigger when RX FIFO contains at least 7 bytes
DL_I2C_RX_FIFO_LEVEL_BYTES_8	Trigger when RX FIFO contains at least 8 bytes

DL_I2C_TARGET_RESPONSE_OVERRIDE_VALUE

enum DL_I2C_TARGET_RESPONSE_OVERRIDE_VALUE

Enumerator
DL_I2C_TARGET_RESPONSE_OVERRIDE_VALUE_ACK	Target manual ACK for valid data or command.
DL_I2C_TARGET_RESPONSE_OVERRIDE_VALUE_NACK	Target manual NACK for invalid data or command.

DL_I2C_IIDX

enum DL_I2C_IIDX

Enumerator
DL_I2C_IIDX_NO_INT	Interrupt index for I2C if no interrupt is pending
DL_I2C_IIDX_CONTROLLER_RX_DONE	Interrupt index for I2C Controller Receive Transaction completed
DL_I2C_IIDX_CONTROLLER_TX_DONE	Interrupt index for Controller Transmit Transaction completed
DL_I2C_IIDX_CONTROLLER_RXFIFO_TRIGGER	Interrupt index for I2C Controller Receive FIFO Trigger
DL_I2C_IIDX_CONTROLLER_TXFIFO_TRIGGER	Interrupt index for I2C Controller Transmit FIFO Trigger
DL_I2C_IIDX_CONTROLLER_RXFIFO_FULL	Interrupt index for I2C Controller Receive when FIFO is full
DL_I2C_IIDX_CONTROLLER_TXFIFO_EMPTY	Interrupt index for I2C Controller when Transmit FIFO is empty
DL_I2C_IIDX_CONTROLLER_NACK	Interrupt index for Address/Data NACK
DL_I2C_IIDX_CONTROLLER_START	Interrupt index for I2C controller START Detection
DL_I2C_IIDX_CONTROLLER_STOP	Interrupt index for I2C controller STOP Detection
DL_I2C_IIDX_CONTROLLER_ARBITRATION_LOST	Interrupt index for I2C controller Arbitration Lost
DL_I2C_IIDX_CONTROLLER_EVENT1_DMA_DONE	Interrupt index for I2C controller Event 1 DMA Done
DL_I2C_IIDX_CONTROLLER_EVENT2_DMA_DONE	Interrupt index for I2C controller Event 2 DMA Done
DL_I2C_IIDX_CONTROLLER_PEC_RX_ERROR	Interrupt index for I2C controller SMBus/PMBus PEC Receive Error Event
DL_I2C_IIDX_TIMEOUT_A	Interrupt index for I2C Timeout A Event
DL_I2C_IIDX_TIMEOUT_B	Interrupt index for I2C Timeout B Event
DL_I2C_IIDX_TARGET_RX_DONE	Interrupt index for I2C Target Receive Data
DL_I2C_IIDX_TARGET_TX_DONE	Interrupt index for I2C Target Transmit Transaction completed
DL_I2C_IIDX_TARGET_RXFIFO_TRIGGER	Interrupt index for I2C Target Receive FIFO Trigger
DL_I2C_IIDX_TARGET_TXFIFO_TRIGGER	Interrupt index for I2C Target Transmit FIFO Trigger
DL_I2C_IIDX_TARGET_RXFIFO_FULL	Interrupt index for I2C Target RX FIFO full
DL_I2C_IIDX_TARGET_TXFIFO_EMPTY	Interrupt index for I2C Target TX FIFO empty. All data in Transmit FIFO shifted out and transmit goes into idle mode.
DL_I2C_IIDX_TARGET_START	Interrupt index for I2C Target Start Condition detected
DL_I2C_IIDX_TARGET_STOP	Interrupt index for I2C Target Stop Condition detected
DL_I2C_IIDX_TARGET_GENERAL_CALL	Interrupt index for I2C General Call
DL_I2C_IIDX_TARGET_EVENT1_DMA_DONE	Interrupt index for I2C Target Event 1 DMA Done
DL_I2C_IIDX_TARGET_EVENT2_DMA_DONE	Interrupt index for I2C Target Event 2 DMA Done
DL_I2C_IIDX_TARGET_PEC_RX_ERROR	Interrupt index for I2C Target SMBus/PMBus PEC Receive Error Event
DL_I2C_IIDX_TARGET_TXFIFO_UNDERFLOW	Interrupt index for I2C Target TX FIFO underflow event
DL_I2C_IIDX_TARGET_RXFIFO_OVERFLOW	Interrupt index for I2C Target RX FIFO overflow event
DL_I2C_IIDX_TARGET_ARBITRATION_LOST	Interrupt index for I2C Target arbitration lost event
DL_I2C_IIDX_INTERRUPT_OVERFLOW	Interrupt index for I2C interrupt overflow event

Function Documentation

DL_I2C_setClockConfig()

void DL_I2C_setClockConfig	(	I2C_Regs *	i2c,
		const DL_I2C_ClockConfig *	config
	)

Configure I2C source clock.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	config	Pointer to the clock configuration struct DL_I2C_ClockConfig.

DL_I2C_getClockConfig()

void DL_I2C_getClockConfig	(	const I2C_Regs *	i2c,
		DL_I2C_ClockConfig *	config
	)

Get I2C source clock configuration.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	config	Pointer to the clock configuration struct DL_I2C_ClockConfig.

DL_I2C_fillControllerTXFIFO()

uint16_t DL_I2C_fillControllerTXFIFO	(	I2C_Regs *	i2c,
		const uint8_t *	buffer,
		uint16_t	count
	)

Fills the controller TX FIFO with data.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	buffer	Pointer to buffer of bytes
[in]	count	Number of bytes to fill controller TX FIFO from buffer

Returns

Number of bytes that were successfully written

DL_I2C_flushControllerTXFIFO()

void DL_I2C_flushControllerTXFIFO

(

I2C_Regs *

i2c

)

Flushes/removes all elements in the controller TX FIFO.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_flushControllerRXFIFO()

void DL_I2C_flushControllerRXFIFO

(

I2C_Regs *

i2c

)

Flushes/removes all elements in the controller RX FIFO.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isControllerTXFIFOFull()

__STATIC_INLINE bool DL_I2C_isControllerTXFIFOFull

(

const I2C_Regs *

i2c

)

Checks if controller TX FIFO is full.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If controller TX FIFO is full

Return values

true	if controller TX FIFO is full
false	if controller TX FIFO is not full

DL_I2C_isControllerTXFIFOEmpty()

__STATIC_INLINE bool DL_I2C_isControllerTXFIFOEmpty

(

const I2C_Regs *

i2c

)

Checks if controller TX FIFO is empty.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If controller TX FIFO is empty

Return values

true	if controller TX FIFO is empty
false	if controller TX FIFO is not empty

References DL_I2C_TX_FIFO_COUNT_MAXIMUM.

DL_I2C_isControllerRXFIFOEmpty()

__STATIC_INLINE bool DL_I2C_isControllerRXFIFOEmpty

(

const I2C_Regs *

i2c

)

Checks if controller RX FIFO is empty.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If controller RX FIFO is empty

Return values

true	if controller RX FIFO is empty
false	if controller RX FIFO is not empty

DL_I2C_resetControllerTransfer()

__STATIC_INLINE void DL_I2C_resetControllerTransfer

(

I2C_Regs *

i2c

)

Reset transfers from from I2C controller.

Resets transfer register to initialize I2C

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_startControllerTransfer()

__STATIC_INLINE void DL_I2C_startControllerTransfer	(	I2C_Regs *	i2c,
		uint32_t	targetAddr,
		DL_I2C_CONTROLLER_DIRECTION	direction,
		uint16_t	length
	)

Sets up a transfer from I2C controller.

Set target address, transfer direction, burst length, START+STOP generation.

Note

Reading/writing data must be done separately.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	targetAddr	Target address [0x00, 0x3FF]
[in]	direction	One of DL_I2C_CONTROLLER_DIRECTION
[in]	length	Intended burst length in number of bytes

References DL_Common_updateReg().

DL_I2C_startControllerTransferAdvanced()

__STATIC_INLINE void DL_I2C_startControllerTransferAdvanced	(	I2C_Regs *	i2c,
		uint32_t	targetAddr,
		DL_I2C_CONTROLLER_DIRECTION	direction,
		uint16_t	length,
		DL_I2C_CONTROLLER_START	start,
		DL_I2C_CONTROLLER_STOP	stop,
		DL_I2C_CONTROLLER_ACK	ack
	)

Sets up a transfer from I2C controller with control of START, STOP and ACK.

Note

Reading/writing data must be done separately.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	targetAddr	7-bit target address [0x00, 0x7f]
[in]	direction	One of DL_I2C_CONTROLLER_DIRECTION
[in]	length	Intended burst length in number of bytes
[in]	start	One of DL_I2C_CONTROLLER_START
[in]	stop	One of DL_I2C_CONTROLLER_STOP
[in]	ack	One of DL_I2C_CONTROLLER_ACK

References DL_Common_updateReg().

DL_I2C_isTargetTXFIFOFull()

__STATIC_INLINE bool DL_I2C_isTargetTXFIFOFull

(

const I2C_Regs *

i2c

)

Checks if target TX FIFO is full.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target TX FIFO is full

Return values

true	if target TX FIFO is full
false	if target TX FIFO is not full

DL_I2C_isTargetTXFIFOEmpty()

__STATIC_INLINE bool DL_I2C_isTargetTXFIFOEmpty

(

const I2C_Regs *

i2c

)

Checks if target TX FIFO is empty.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target TX FIFO is empty

Return values

true	if target TX FIFO is empty
false	if target TX FIFO is not empty

References DL_I2C_TX_FIFO_COUNT_MAXIMUM.

DL_I2C_isTargetRXFIFOEmpty()

__STATIC_INLINE bool DL_I2C_isTargetRXFIFOEmpty

(

const I2C_Regs *

i2c

)

Checks if target RX FIFO is empty.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target RX FIFO is empty

Return values

true	if target RX FIFO is empty
false	if target RX FIFO is not empty

References DL_I2C_fillTargetTXFIFO(), DL_I2C_flushTargetRXFIFO(), DL_I2C_flushTargetTXFIFO(), DL_I2C_receiveTargetDataBlocking(), DL_I2C_receiveTargetDataCheck(), DL_I2C_transmitTargetDataBlocking(), and DL_I2C_transmitTargetDataCheck().

DL_I2C_fillTargetTXFIFO()

uint8_t DL_I2C_fillTargetTXFIFO	(	I2C_Regs *	i2c,
		const uint8_t *	buffer,
		uint8_t	count
	)

Fills the target TX FIFO with data.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	buffer	Pointer to buffer of bytes
[in]	count	Number of bytes to fill target TX FIFO from buffer

Returns

Number of bytes that were successfully written

Referenced by DL_I2C_isTargetRXFIFOEmpty().

DL_I2C_flushTargetTXFIFO()

void DL_I2C_flushTargetTXFIFO

(

I2C_Regs *

i2c

)

Flushes/removes all elements in the target TX FIFO.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Referenced by DL_I2C_isTargetRXFIFOEmpty().

DL_I2C_flushTargetRXFIFO()

void DL_I2C_flushTargetRXFIFO

(

I2C_Regs *

i2c

)

Flushes/removes all elements in the target RX FIFO.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Referenced by DL_I2C_isTargetRXFIFOEmpty().

DL_I2C_transmitTargetDataBlocking()

void DL_I2C_transmitTargetDataBlocking	(	I2C_Regs *	i2c,
		uint8_t	data
	)

Transmit target data, waiting until transmit request.

Note

Setting own target addresses and enabling target should be done separately.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	data	Byte of data to transmit

Referenced by DL_I2C_isTargetRXFIFOEmpty().

DL_I2C_transmitTargetDataCheck()

bool DL_I2C_transmitTargetDataCheck	(	I2C_Regs *	i2c,
		uint8_t	data
	)

Transmit target data.

Note

Setting own target addresses and enabling target should be done separately.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	data	Byte of data to transmit

Returns

Whether data could be transmitted or not

Return values

true	if data could be transmitted
false	if data could not be transmitted

Referenced by DL_I2C_isTargetRXFIFOEmpty().

DL_I2C_receiveTargetDataBlocking()

uint8_t DL_I2C_receiveTargetDataBlocking

(

const I2C_Regs *

i2c

)

Receive target data, waiting until receive request.

Note

Setting own target addresses and enabling target should be done separately.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Data received from target

Referenced by DL_I2C_isTargetRXFIFOEmpty().

DL_I2C_receiveTargetDataCheck()

bool DL_I2C_receiveTargetDataCheck	(	const I2C_Regs *	i2c,
		uint8_t *	buffer
	)

Receive target data.

Note

Setting own target addresses and enabling target should be done separately.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	buffer	Pointer to where byte of received data should be stored

Returns

Whether data could be received or not

Return values

true	if data could be received
false	if data could not be received

Referenced by DL_I2C_isTargetRXFIFOEmpty().

DL_I2C_enablePower()

__STATIC_INLINE void DL_I2C_enablePower

(

I2C_Regs *

i2c

)

Enables the Peripheral Write Enable (PWREN) register for the I2C.

Before any peripheral registers can be configured by software, the peripheral itself must be enabled by writing the ENABLE bit together with the appropriate KEY value to the peripheral's PWREN register.

Parameters

i2c	Pointer to the register overlay for the peripheral

DL_I2C_disablePower()

__STATIC_INLINE void DL_I2C_disablePower

(

I2C_Regs *

i2c

)

Disables the Peripheral Write Enable (PWREN) register for the I2C.

When the PWREN.ENABLE bit is cleared, the peripheral's registers are not accessible for read/write operations.

Note

This API does not provide large power savings.

Parameters

i2c	Pointer to the register overlay for the peripheral

DL_I2C_isPowerEnabled()

__STATIC_INLINE bool DL_I2C_isPowerEnabled

(

const I2C_Regs *

i2c

)

Returns if the Peripheral Write Enable (PWREN) register for the I2C is enabled.

Before any peripheral registers can be configured by software, the peripheral itself must be enabled by writing the ENABLE bit together with the appropriate KEY value to the peripheral's PWREN register.

When the PWREN.ENABLE bit is cleared, the peripheral's registers are not accessible for read/write operations.

Parameters

i2c	Pointer to the register overlay for the peripheral

Returns

true if peripheral register access is enabled

false if peripheral register access is disabled

DL_I2C_reset()

__STATIC_INLINE void DL_I2C_reset

(

I2C_Regs *

i2c

)

Resets i2c peripheral.

Parameters

i2c	Pointer to the register overlay for the peripheral

DL_I2C_isReset()

__STATIC_INLINE bool DL_I2C_isReset

(

const I2C_Regs *

i2c

)

Returns if i2c peripheral was reset.

Parameters

i2c	Pointer to the register overlay for the peripheral

Returns

true if peripheral was reset

false if peripheral wasn't reset

DL_I2C_selectClockSource()

__STATIC_INLINE void DL_I2C_selectClockSource	(	I2C_Regs *	i2c,
		DL_I2C_CLOCK	clockSource
	)

Set Clock Source.

Clock sources depend on device and clock should be enabled

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	clockSource	One of DL_I2C_CLOCK.

References DL_Common_updateReg().

DL_I2C_selectClockDivider()

__STATIC_INLINE void DL_I2C_selectClockDivider	(	I2C_Regs *	i2c,
		DL_I2C_CLOCK_DIVIDE	clockDivider
	)

Set Clock Divider.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	clockDivider	One of DL_I2C_CLOCK_DIVIDE.

References DL_Common_updateReg().

DL_I2C_getAnalogGlitchFilterPulseWidth()

__STATIC_INLINE DL_I2C_ANALOG_GLITCH_FILTER_WIDTH DL_I2C_getAnalogGlitchFilterPulseWidth

(

const I2C_Regs *

i2c

)

Get Analog Glitch Suppression Pulse Width.

Pulse width for the analog glitch suppression on SCL/SDA lines.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Analog glitch suppression pulse width

Return values

One	of DL_I2C_ANALOG_GLITCH_FILTER_WIDTH.

DL_I2C_setAnalogGlitchFilterPulseWidth()

__STATIC_INLINE void DL_I2C_setAnalogGlitchFilterPulseWidth	(	I2C_Regs *	i2c,
		DL_I2C_ANALOG_GLITCH_FILTER_WIDTH	filterWidth
	)

Set Analog Glitch Suppression Pulse Width.

Pulse width for the analog glitch suppression on SCL/SDA lines.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	filterWidth	One of DL_I2C_ANALOG_GLITCH_FILTER_WIDTH.

References DL_Common_updateReg().

DL_I2C_getDigitalGlitchFilterPulseWidth()

__STATIC_INLINE DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH DL_I2C_getDigitalGlitchFilterPulseWidth

(

const I2C_Regs *

i2c

)

Get Digital Glitch Suppression Pulse Width.

Pulse width for the digital glitch suppression on SCL/SDA lines. Values are in terms of functional clock ticks.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Digital glitch suppression pulse width

Return values

One	of DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH.

DL_I2C_setDigitalGlitchFilterPulseWidth()

__STATIC_INLINE void DL_I2C_setDigitalGlitchFilterPulseWidth	(	I2C_Regs *	i2c,
		DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH	filterWidth
	)

Set Digital Glitch Suppression Pulse Width.

Pulse width for the digital glitch suppression on SCL/SDA lines. Values are in terms of functional clock ticks.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	filterWidth	One of DL_I2C_DIGITAL_GLITCH_FILTER_WIDTH.

References DL_Common_updateReg().

DL_I2C_disableAnalogGlitchFilter()

__STATIC_INLINE void DL_I2C_disableAnalogGlitchFilter

(

I2C_Regs *

i2c

)

Disable Analog Glitch Suppression.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isAnalogGlitchFilterEnabled()

__STATIC_INLINE bool DL_I2C_isAnalogGlitchFilterEnabled

(

const I2C_Regs *

i2c

)

Checks if analog glitch suppression is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If analog glitch suppression is enabled

Return values

true	if analog glitch suppression is enabled
false	if analog glitch suppression is disabled

DL_I2C_enableAnalogGlitchFilter()

__STATIC_INLINE void DL_I2C_enableAnalogGlitchFilter

(

I2C_Regs *

i2c

)

Enable Analog Glitch Suppression.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getControllerDirection()

__STATIC_INLINE DL_I2C_CONTROLLER_DIRECTION DL_I2C_getControllerDirection

(

const I2C_Regs *

i2c

)

Get direction of next controller operation.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Direction of next controller operation

Return values

One	of DL_I2C_CONTROLLER_DIRECTION

DL_I2C_setControllerDirection()

__STATIC_INLINE void DL_I2C_setControllerDirection	(	I2C_Regs *	i2c,
		DL_I2C_CONTROLLER_DIRECTION	direction
	)

Set direction of next controller operation.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	direction	Direction of next controller operation. One of DL_I2C_CONTROLLER_DIRECTION.

References DL_Common_updateReg().

DL_I2C_getTargetAddress()

__STATIC_INLINE uint32_t DL_I2C_getTargetAddress

(

const I2C_Regs *

i2c

)

Get the address of the target being addressed when configured as an I2C controller.

Specifies bits A9 through A0 of the target address. In 7-bit addressing mode as selected by DL_I2C_setTargetAddressingMode, the top 3 bits are don't care.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

The target address

Return values

[0x00,0x07FE]

See also

DL_I2C_setTargetAddressingMode

DL_I2C_setTargetAddress()

__STATIC_INLINE void DL_I2C_setTargetAddress	(	I2C_Regs *	i2c,
		uint32_t	targetAddress
	)

Set the address of the target being addressed when configured as an I2C controller.

Specifies bits A9 through A0 of the target address. In 7-bit addressing mode as selected by DL_I2C_setTargetAddressingMode, the top 3 bits are don't care.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	targetAddress	Target address to set [0x00, 0x07FE]

See also

DL_I2C_setTargetAddressingMode

References DL_Common_updateReg().

DL_I2C_getControllerAddressingMode()

__STATIC_INLINE DL_I2C_CONTROLLER_ADDRESSING_MODE DL_I2C_getControllerAddressingMode

(

const I2C_Regs *

i2c

)

Get controller addressing mode.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Addressing mode the controller is set to

Return values

One	of DL_I2C_CONTROLLER_ADDRESSING_MODE

DL_I2C_setControllerAddressingMode()

__STATIC_INLINE void DL_I2C_setControllerAddressingMode	(	I2C_Regs *	i2c,
		DL_I2C_CONTROLLER_ADDRESSING_MODE	mode
	)

Set controller addressing mode between 7-bit and 10-bit mode.

Selects the addressing mode between 7-bit and 10-bit mode to be used when device is configured as a controller

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	mode	Addressing mode to set the target to. One of DL_I2C_CONTROLLER_ADDRESSING_MODE.

References DL_Common_updateReg().

DL_I2C_disableControllerACKOverride()

__STATIC_INLINE void DL_I2C_disableControllerACKOverride

(

I2C_Regs *

i2c

)

Disable controller ACK override.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isControllerACKOverrideEnabled()

__STATIC_INLINE bool DL_I2C_isControllerACKOverrideEnabled

(

const I2C_Regs *

i2c

)

Checks if controller ACK override is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If controller ACK override is enabled

Return values

true	if controller ACK override is enabled
false	if controller ACK override is disabled

DL_I2C_enableControllerACKOverride()

__STATIC_INLINE void DL_I2C_enableControllerACKOverride

(

I2C_Regs *

i2c

)

Enable controller ACK override.

When enabled and the controller is receiving data and the number of bytes indicated in MCTR.MBLEN have been received, the state machine will generate an RXDONE interrupt and wait at the start of the ACK for FW to indicate if an ACK or NACK should be sent. The ACK or NACK is selected by writing the MCTR register and setting ACK accordingly. The other fields in this register can also be written at this time to continue on with the transaction. If a NACK is sent the state machine will automatically send a Stop.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

See also

DL_I2C_setTransactionLength

DL_I2C_disableControllerReadOnTXEmpty()

__STATIC_INLINE void DL_I2C_disableControllerReadOnTXEmpty

(

I2C_Regs *

i2c

)

Disable controller read on TX empty.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isControllerReadOnTXEmptyEnabled()

__STATIC_INLINE bool DL_I2C_isControllerReadOnTXEmptyEnabled

(

const I2C_Regs *

i2c

)

Checks if controller read on TX empty is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If controller read on TX empty is enabled

Return values

true	if controller read on TX empty is enabled
false	if controller read on TX empty is disabled

DL_I2C_enableControllerReadOnTXEmpty()

__STATIC_INLINE void DL_I2C_enableControllerReadOnTXEmpty

(

I2C_Regs *

i2c

)

Enable controller read on TX empty.

When enabled, the controller will transmit all bytes from the TX FIFO before continuing with the programmed Burst Run Read. If the DIR is not set to Read in the MSA then this bit is ignored. The Start must be set in the MCTR for proper I2C protocol. The controller will first send the Start Condition, I2C Address with R/W bit set to write, before sending the bytes in the TX FIFO. When the TX FIFO is empty, the I2C transaction will continue as programmed in MTCR and MSA without sending a Stop Condition. This is intended to be used to perform simple I2C command based reads transition that will complete after initiating them without having to get an interrupt to turn the bus around.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getControllerPECCountValue()

__STATIC_INLINE uint32_t DL_I2C_getControllerPECCountValue

(

const I2C_Regs *

i2c

)

Get the SMBus/PMBus Packet Error Checking (PEC) count value.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

The value the PEC count is set to

Return values

Value

between [0x0, 0x01FF]

DL_I2C_setControllerPECCountValue()

__STATIC_INLINE void DL_I2C_setControllerPECCountValue	(	I2C_Regs *	i2c,
		uint32_t	count
	)

Set the SMBus/PMBus Packet Error Checking (PEC) count value.

When this field is non zero, the number of I2C data bytes are counted. Refer to the device TRM for more details.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	count	The value to set the PEC count to. Value between [0x0, 0x01FF]

References DL_Common_updateReg().

DL_I2C_disableControllerPEC()

__STATIC_INLINE void DL_I2C_disableControllerPEC

(

I2C_Regs *

i2c

)

Disable controller SMBus/PMBus Packet Error Checking (PEC)

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isControllerPECEnabled()

__STATIC_INLINE bool DL_I2C_isControllerPECEnabled

(

const I2C_Regs *

i2c

)

Checks if controller SMBus/PMBus Packet Error Checking (PEC) is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If controller PEC is enabled

Return values

true	if controller PEC is enabled
false	if controller PEC is disabled

DL_I2C_enableControllerPEC()

__STATIC_INLINE void DL_I2C_enableControllerPEC

(

I2C_Regs *

i2c

)

Enable controller SMBus/PMBus Packet Error Checking (PEC)

When enabled, the PEC is calculated on all bits accept the Start, Stop, ACK and NACK. The PEC LSFR and the Byte Counter is set to 0 when the State Machine is in the IDLE state, which occurs following a Stop or when a timeout occurs. The Counter is also set to 0 after the PEC byte is sent or received. Note that the NACK is automatically sent following a PEC byte that results in a PEC error. The PEC Polynomial is x^8 + x^2 + x^1 + 1.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getControllerCurrentPECCount()

__STATIC_INLINE uint32_t DL_I2C_getControllerCurrentPECCount

(

const I2C_Regs *

i2c

)

Get the current SMBus/PMBus PEC byte count of the controller state machine.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

The current PEC byte count of the controller state machine

Return values

Value

between [0x0, 0x01FF]

DL_I2C_getControllerPECCheckedStatus()

__STATIC_INLINE DL_I2C_CONTROLLER_PEC_STATUS DL_I2C_getControllerPECCheckedStatus

(

const I2C_Regs *

i2c

)

If controller SMBus/PMBus PEC was checked in last transaction.

The status of if the controller PEC was checked in the transaction that occurred before the last Stop. Latched on Stop.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Status of controller PEC checked in last transaction

Return values

One	of DL_I2C_CONTROLLER_PEC_STATUS

DL_I2C_getControllerPECCheckError()

__STATIC_INLINE DL_I2C_CONTROLLER_PEC_CHECK_ERROR DL_I2C_getControllerPECCheckError

(

const I2C_Regs *

i2c

)

Get the status of the controller SMBus/PMBus PEC Check error.

The status of if a PEC check error occurred in the transaction that occurred before the last Stop. Latched on Stop.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Status of controller PEC check error

Return values

One	of DL_I2C_CONTROLLER_PEC_CHECK_ERROR

DL_I2C_disableControllerBurst()

__STATIC_INLINE void DL_I2C_disableControllerBurst

(

I2C_Regs *

i2c

)

Disable I2C controller burst mode.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isControllerBurstEnabled()

__STATIC_INLINE bool DL_I2C_isControllerBurstEnabled

(

const I2C_Regs *

i2c

)

Checks if I2C controller burst mode is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If I2C controller burst mode is enabled

Return values

true	if I2C controller burst mode is enabled
false	if I2C controller burst mode is disabled

DL_I2C_enableControllerBurst()

__STATIC_INLINE void DL_I2C_enableControllerBurst

(

I2C_Regs *

i2c

)

Enable I2C controller burst mode.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableStartCondition()

__STATIC_INLINE void DL_I2C_disableStartCondition

(

I2C_Regs *

i2c

)

Disable I2C START generation.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isStartConditionEnabled()

__STATIC_INLINE bool DL_I2C_isStartConditionEnabled

(

const I2C_Regs *

i2c

)

Checks if I2C START generation is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If I2C START generation is enabled

Return values

true	if I2C START generation is enabled
false	if I2C START generation is disabled

DL_I2C_enableStartCondition()

__STATIC_INLINE void DL_I2C_enableStartCondition

(

I2C_Regs *

i2c

)

Enable I2C START generation.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableStopCondition()

__STATIC_INLINE void DL_I2C_disableStopCondition

(

I2C_Regs *

i2c

)

Disable I2C STOP generation.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isStopConditionEnabled()

__STATIC_INLINE bool DL_I2C_isStopConditionEnabled

(

const I2C_Regs *

i2c

)

Checks if I2C STOP generation is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If I2C STOP generation is enabled

Return values

true	if I2C STOP generation is enabled
false	if I2C STOP generation is disabled

DL_I2C_enableStopCondition()

__STATIC_INLINE void DL_I2C_enableStopCondition

(

I2C_Regs *

i2c

)

Enable I2C STOP generation.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableControllerACK()

__STATIC_INLINE void DL_I2C_disableControllerACK

(

I2C_Regs *

i2c

)

Disable I2C controller data acknowledge (ACK or NACK)

When the I2C module operates in Controller receiver mode, the ACK bit can be cleared when no further data needs to be received from the target transmitter.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isControllerACKEnabled()

__STATIC_INLINE bool DL_I2C_isControllerACKEnabled

(

const I2C_Regs *

i2c

)

Checks if I2C controller data acknowledge (ACK or NACK) is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If I2C controller data acknowledge is enabled

Return values

true	if I2C controller data acknowledge is enabled
false	if I2C controller data acknowledge is disabled

DL_I2C_enableControllerACK()

__STATIC_INLINE void DL_I2C_enableControllerACK

(

I2C_Regs *

i2c

)

Enable I2C controller data acknowledge (ACK or NACK)

When the I2C module operates in Controller receiver mode, the ACK bit is normally set causing the I2C bus controller to transmit an acknowledge automatically after each byte.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getTransactionLength()

__STATIC_INLINE uint32_t DL_I2C_getTransactionLength

(

const I2C_Regs *

i2c

)

Get transaction length in bytes.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Length of I2C transaction in bytes

Return values

[0x000,0xfff]

DL_I2C_setTransactionLength()

__STATIC_INLINE void DL_I2C_setTransactionLength	(	I2C_Regs *	i2c,
		uint32_t	length
	)

Set transaction length in bytes.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	length	Length of I2C transaction in bytes [0x000, 0xfff]

References DL_Common_updateReg().

DL_I2C_getControllerStatus()

__STATIC_INLINE uint32_t DL_I2C_getControllerStatus

(

const I2C_Regs *

i2c

)

Get status of I2C bus controller for controller.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Status of I2C bus controller for controller

Return values

Bitwise

OR of DL_I2C_CONTROLLER_STATUS

DL_I2C_getTransactionCount()

__STATIC_INLINE uint16_t DL_I2C_getTransactionCount

(

const I2C_Regs *

i2c

)

Get transaction count in bytes.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Current 12-bit countdown value of the transaction

Return values

[0x000,0xfff]

DL_I2C_receiveControllerData()

__STATIC_INLINE uint8_t DL_I2C_receiveControllerData

(

const I2C_Regs *

i2c

)

Get byte of data from I2C controller.

If using FIFO, it is first byte from the RX FIFO.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Last received byte of data

Return values

[0x00,0xff]

DL_I2C_transmitControllerData()

__STATIC_INLINE void DL_I2C_transmitControllerData	(	I2C_Regs *	i2c,
		uint8_t	data
	)

Set next byte to be transferred during the next transaction.

Does not transmit data until DL_I2C_startControllerTransfer

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	data	Data to be transferred during the next transaction. [0x00, 0xff]

DL_I2C_getTimerPeriod()

__STATIC_INLINE uint8_t DL_I2C_getTimerPeriod

(

const I2C_Regs *

i2c

)

Get timer period This field is used in the equation to configure SCL_PERIOD:

SCL_PERIOD = (1 + TPR) * (SCL_LP + SCL_HP) * INT_CLK_PRD

where: SCL_PRD is the SCL line period (I2C clock)

TPR is the Timer Period register value (range of 1 to 127)

SCL_LP is the SCL Low period (fixed at 6) SCL_HP is the SCL High period (fixed at 4)

CLK_PRD is the functional clock period in ns

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Timer period

Return values

[0x00,0x7f]

DL_I2C_setTimerPeriod()

__STATIC_INLINE void DL_I2C_setTimerPeriod	(	I2C_Regs *	i2c,
		uint8_t	period
	)

Set timer period This field is used in the equation to configure SCL_PERIOD:

SCL_PERIOD = (1 + TPR) * (SCL_LP + SCL_HP) * INT_CLK_PRD

where: SCL_PRD is the SCL line period (I2C clock)

TPR is the Timer Period register value (range of 1 to 127)

SCL_LP is the SCL Low period (fixed at 6) SCL_HP is the SCL High period (fixed at 4)

CLK_PRD is the functional clock period in ns

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	period	Timer period [0x00, 0x7f]

DL_I2C_disableLoopbackMode()

__STATIC_INLINE void DL_I2C_disableLoopbackMode

(

I2C_Regs *

i2c

)

Disable loopback mode.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isLoopbackModeEnabled()

__STATIC_INLINE bool DL_I2C_isLoopbackModeEnabled

(

const I2C_Regs *

i2c

)

Checks if loopback mode is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If loopback mode is enabled

Return values

true	if loopback mode is enabled
false	if loopback mode is disabled

DL_I2C_enableLoopbackMode()

__STATIC_INLINE void DL_I2C_enableLoopbackMode

(

I2C_Regs *

i2c

)

Enable loopback mode.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableMultiControllerMode()

__STATIC_INLINE void DL_I2C_disableMultiControllerMode

(

I2C_Regs *

i2c

)

Disable multicontroller mode.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isMultiControllerModeEnabled()

__STATIC_INLINE bool DL_I2C_isMultiControllerModeEnabled

(

const I2C_Regs *

i2c

)

Checks if multicontroller mode is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If multicontroller mode is enabled

Return values

true	if multicontroller mode is enabled
false	if multicontroller mode is disabled

DL_I2C_enableMultiControllerMode()

__STATIC_INLINE void DL_I2C_enableMultiControllerMode

(

I2C_Regs *

i2c

)

Enable multicontroller mode.

In multicontroller mode, the SCL high time counts once the SCL line has been detected high. If this is not enabled, the high time counts as soon as the SCL line has been set high by the I2C controller

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableController()

__STATIC_INLINE void DL_I2C_disableController

(

I2C_Regs *

i2c

)

Disable controller.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isControllerEnabled()

__STATIC_INLINE bool DL_I2C_isControllerEnabled

(

const I2C_Regs *

i2c

)

Checks if controller is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If controller is enabled

Return values

true	if controller is enabled
false	if controller is disabled

DL_I2C_enableController()

__STATIC_INLINE void DL_I2C_enableController

(

I2C_Regs *

i2c

)

Enable controller.

After controller has enabled, it should not be re-enabled unless it has been disabled or by a reset, otherwise transfer failures may occur.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableControllerClockStretching()

__STATIC_INLINE void DL_I2C_disableControllerClockStretching

(

I2C_Regs *

i2c

)

Disable controller clock stretching.

Clock stretching can be disabled if no target on the bus supports clock stretching; however, it should be typically enabled to be compliant with I2C specification.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isControllerClockStretchingEnabled()

__STATIC_INLINE bool DL_I2C_isControllerClockStretchingEnabled

(

const I2C_Regs *

i2c

)

Checks if controller clock stretching is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If controller clock stretching is enabled

Return values

true	if controller clock stretching is enabled
false	if controller clock stretching is disabled

DL_I2C_enableControllerClockStretching()

__STATIC_INLINE void DL_I2C_enableControllerClockStretching

(

I2C_Regs *

i2c

)

Enable controller clock stretching.

Clock stretching can be disabled if no target on the bus supports clock stretching; however, it should be typically enabled to be compliant with I2C specification.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getSCLStatus()

__STATIC_INLINE DL_I2C_CONTROLLER_SCL DL_I2C_getSCLStatus

(

const I2C_Regs *

i2c

)

Get SCL signal status.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Status of SCL signal

Return values

One	of DL_I2C_CONTROLLER_SCL

DL_I2C_getSDAStatus()

__STATIC_INLINE DL_I2C_CONTROLLER_SDA DL_I2C_getSDAStatus

(

const I2C_Regs *

i2c

)

Get SDA signal status.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Status of SDA signal

Return values

One	of DL_I2C_CONTROLLER_SDA

DL_I2C_getControllerTXFIFOThreshold()

__STATIC_INLINE DL_I2C_TX_FIFO_LEVEL DL_I2C_getControllerTXFIFOThreshold

(

const I2C_Regs *

i2c

)

Get controller TX FIFO threshold level.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Indicates at what fill level in the TX FIFO a threshold will be generated

Return values

One	of DL_I2C_TX_FIFO_LEVEL

DL_I2C_setControllerTXFIFOThreshold()

__STATIC_INLINE void DL_I2C_setControllerTXFIFOThreshold	(	I2C_Regs *	i2c,
		DL_I2C_TX_FIFO_LEVEL	level
	)

Set controller TX FIFO threshold level.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	level	Indicates at what fill level in the TX FIFO a threshold will be generated. One of DL_I2C_TX_FIFO_LEVEL.

References DL_Common_updateReg().

DL_I2C_stopFlushControllerTXFIFO()

__STATIC_INLINE void DL_I2C_stopFlushControllerTXFIFO

(

I2C_Regs *

i2c

)

Stop controller TX FIFO flush.

Before stopping the flush, check if DL_I2C_isControllerTXFIFOEmpty, indicating flush is complete.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_startFlushControllerTXFIFO()

__STATIC_INLINE void DL_I2C_startFlushControllerTXFIFO

(

I2C_Regs *

i2c

)

Start controller TX FIFO flush.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getControllerRXFIFOThreshold()

__STATIC_INLINE DL_I2C_RX_FIFO_LEVEL DL_I2C_getControllerRXFIFOThreshold

(

const I2C_Regs *

i2c

)

Get controller RX FIFO threshold level.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Indicates at what fill level in the RX FIFO a threshold will be generated

Return values

One	of DL_I2C_RX_FIFO_LEVEL

DL_I2C_setControllerRXFIFOThreshold()

__STATIC_INLINE void DL_I2C_setControllerRXFIFOThreshold	(	I2C_Regs *	i2c,
		DL_I2C_RX_FIFO_LEVEL	level
	)

Set controller RX FIFO threshold level.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	level	Indicates at what fill level in the RX FIFO a threshold will be generated. One of DL_I2C_RX_FIFO_LEVEL.

References DL_Common_updateReg().

DL_I2C_stopFlushControllerRXFIFO()

__STATIC_INLINE void DL_I2C_stopFlushControllerRXFIFO

(

I2C_Regs *

i2c

)

Stop controller RX FIFO flush.

Before stopping the flush, check if DL_I2C_isControllerRXFIFOEmpty, indicating flush is complete.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_startFlushControllerRXFIFO()

__STATIC_INLINE void DL_I2C_startFlushControllerRXFIFO

(

I2C_Regs *

i2c

)

Start controller RX FIFO flush.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getControllerRXFIFOCounter()

__STATIC_INLINE uint32_t DL_I2C_getControllerRXFIFOCounter

(

const I2C_Regs *

i2c

)

Get number of bytes which can be read from RX FIFO.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Number of bytes which can be read from RX FIFO

Return values

[0x0,0x8]

DL_I2C_getControllerTXFIFOCounter()

__STATIC_INLINE uint32_t DL_I2C_getControllerTXFIFOCounter

(

const I2C_Regs *

i2c

)

Get number of bytes which can be put into TX FIFO.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Number of bytes which can be put into TX FIFO

Return values

[0x0,0x8]

DL_I2C_isControllerRXFIFOFlushActive()

__STATIC_INLINE bool DL_I2C_isControllerRXFIFOFlushActive

(

const I2C_Regs *

i2c

)

Checks if controller RX FIFO flush is active.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If controller RX FIFO flush is active

Return values

true	if controller RX FIFO flush is active
false	if controller RX FIFO flush is not active

DL_I2C_isControllerTXFIFOFlushActive()

__STATIC_INLINE bool DL_I2C_isControllerTXFIFOFlushActive

(

const I2C_Regs *

i2c

)

Checks if controller TX FIFO flush is active.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If controller TX FIFO flush is active

Return values

true	if controller TX FIFO flush is active
false	if controller TX FIFO flush is not active

DL_I2C_setTargetOwnAddress()

__STATIC_INLINE void DL_I2C_setTargetOwnAddress	(	I2C_Regs *	i2c,
		uint32_t	addr
	)

Set target own address.

This field specifies bits A9 through A0 of the target own address.

In 7-bit addressing mode as selected by DL_I2C_setTargetAddressingMode, the top 3 bits are don't care

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	addr	Value of target own address [0x00, 0x3FF]

References DL_Common_updateReg().

DL_I2C_getTargetOwnAddress()

__STATIC_INLINE uint32_t DL_I2C_getTargetOwnAddress

(

const I2C_Regs *

i2c

)

Get target own address.

Get bits A9 through A0 of the target own address.

In 7-bit addressing mode as selected by DL_I2C_setTargetAddressingMode, the top 3 bits are don't care

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Target own address

Return values

[0x00,0x3FF]

DL_I2C_enableTargetOwnAddress()

__STATIC_INLINE void DL_I2C_enableTargetOwnAddress

(

I2C_Regs *

i2c

)

Enable target own address.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

See also

DL_I2C_setTargetOwnAddress

DL_I2C_disableTargetOwnAddress()

__STATIC_INLINE void DL_I2C_disableTargetOwnAddress

(

I2C_Regs *

i2c

)

Disable target own address.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isTargetOwnAddressEnabled()

__STATIC_INLINE bool DL_I2C_isTargetOwnAddressEnabled

(

const I2C_Regs *

i2c

)

Checks if target own address is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target own address is enabled

Return values

true	if target own address is enabled
false	if target own address is disabled

DL_I2C_setTargetAddressingMode()

__STATIC_INLINE void DL_I2C_setTargetAddressingMode	(	I2C_Regs *	i2c,
		DL_I2C_TARGET_ADDRESSING_MODE	mode
	)

Set target addressing mode.

Selects the addressing mode to be used when device is configured as a target

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	mode	Addressing mode to set the target to. One of DL_I2C_TARGET_ADDRESSING_MODE.

References DL_Common_updateReg().

DL_I2C_getTargetAddressingMode()

__STATIC_INLINE DL_I2C_TARGET_ADDRESSING_MODE DL_I2C_getTargetAddressingMode

(

const I2C_Regs *

i2c

)

Get target addressing mode.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Addressing mode the target is set to

Return values

One	of DL_I2C_TARGET_ADDRESSING_MODE

I2C_getTargetOwnAddressAlternate()

__STATIC_INLINE uint32_t I2C_getTargetOwnAddressAlternate

(

const I2C_Regs *

i2c

)

Get target own address alternate.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Target own address alternate

Return values

[0x00,0x7f]

DL_I2C_setTargetOwnAddressAlternate()

__STATIC_INLINE void DL_I2C_setTargetOwnAddressAlternate	(	I2C_Regs *	i2c,
		uint32_t	addr
	)

Set target own address alternate.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	addr	Value of target own address alternate [0x00, 0x7f]

References DL_Common_updateReg().

I2C_getTargetOwnAddressAlternateMask()

__STATIC_INLINE uint32_t I2C_getTargetOwnAddressAlternateMask

(

const I2C_Regs *

i2c

)

Get target own address alternate mask.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Which bits of the target address are matched

Return values

Bit	mask with each bit corresponding to bits A6 through A0 of the target address. Value between [0x00, 0x7F]

DL_I2C_setTargetOwnAddressAlternateMask()

__STATIC_INLINE void DL_I2C_setTargetOwnAddressAlternateMask	(	I2C_Regs *	i2c,
		uint32_t	addressMask
	)

Set target own address alternate mask.

This field specifies bits A6 through A0 of the target address. The bits with a value of 1 in the SOAR2.OAR2_MASK field will make the corresponding incoming address bits to match by default regardless of the value inside SOAR2.OAR2 i.e. corresponding SOAR2.OAR2 bit is a don't care.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	addressMask	Bit mask of address bits to match. Value between [0x00, 0x7F]

References DL_Common_updateReg().

DL_I2C_disableTargetOwnAddressAlternate()

__STATIC_INLINE void DL_I2C_disableTargetOwnAddressAlternate

(

I2C_Regs *

i2c

)

Disable usage of target own address alternate.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isTargetOwnAddressAlternateEnabled()

__STATIC_INLINE bool DL_I2C_isTargetOwnAddressAlternateEnabled

(

const I2C_Regs *

i2c

)

Checks if target own address alternate is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target own address alternate is enabled

Return values

true	if target own address alternate is enabled
false	if target own address alternate is disabled

DL_I2C_enableTargetOwnAddressAlternate()

__STATIC_INLINE void DL_I2C_enableTargetOwnAddressAlternate

(

I2C_Regs *

i2c

)

Enable usage of target own address alternate.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getTargetAddressMatch()

__STATIC_INLINE uint32_t DL_I2C_getTargetAddressMatch

(

const I2C_Regs *

i2c

)

Get the address for which address match happened.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Matched Target address

Return values

Bit	mask with each bit corresponding to the target address. Value between [0x00, 0x7F] in 7-bit mode, or [0x00, 0x3FF] in 10-bit mode.

DL_I2C_disableTargetClockStretching()

__STATIC_INLINE void DL_I2C_disableTargetClockStretching

(

I2C_Regs *

i2c

)

Disable target clock stretching.

Clock stretching should be enabled to be compliant with I2C specification and the SCL will be stretched when data must be read or written from the FIFO. It can optionally be disabled if a controller does not support it or to achieve maximum I2C frequency; however the developer should ensure that the FIFO is written or read on time.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isTargetClockStretchingEnabled()

__STATIC_INLINE bool DL_I2C_isTargetClockStretchingEnabled

(

const I2C_Regs *

i2c

)

Checks if target clock stretching is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target clock stretching is enabled

Return values

true	if target clock stretching is enabled
false	if target clock stretching is disabled

DL_I2C_enableTargetClockStretching()

__STATIC_INLINE void DL_I2C_enableTargetClockStretching

(

I2C_Regs *

i2c

)

Enable target clock stretching.

Clock stretching should be enabled to be compliant with I2C specification and the SCL will be stretched when data must be read or written from the FIFO. It can optionally be disabled if a controller does not support it or to achieve maximum I2C frequency; however the developer should ensure that the FIFO is written or read on time.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableTargetTXEmptyOnTXRequest()

__STATIC_INLINE void DL_I2C_disableTargetTXEmptyOnTXRequest

(

I2C_Regs *

i2c

)

Disable target TX empty interrupt on transmit request.

When disabled, RIS.STXEMPTY will be set when only the Target TX FIFO is empty. This allows the STXEMPTY interrupt to be used to indicate that the I2C bus is being clock stretched and that Target TX data is required.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

See also

DL_I2C_isTargetClockStretchEnabled

DL_I2C_isTargetTXEmptyOnTXRequestEnabled()

__STATIC_INLINE bool DL_I2C_isTargetTXEmptyOnTXRequestEnabled

(

const I2C_Regs *

i2c

)

Checks if target TX empty interrupt on transmit request is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If TX empty interrupt on transmit request is enabled

Return values

true	if TX empty interrupt on transmit request is enabled
false	if TX empty interrupt on transmit request disabled

DL_I2C_enableTargetTXEmptyOnTXRequest()

__STATIC_INLINE void DL_I2C_enableTargetTXEmptyOnTXRequest

(

I2C_Regs *

i2c

)

Enable target TX empty interrupt on transmit request.

When enabled, RIS.STXEMPTY will be set when the Target state machine is in the TX_WAIT state which occurs when the TX FIFO is empty AND the I2C transaction is clock stretched waiting for the FIFO to receive data.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableTargetTXTriggerInTXMode()

__STATIC_INLINE void DL_I2C_disableTargetTXTriggerInTXMode

(

I2C_Regs *

i2c

)

Disable target TX trigger in TX mode.

When disabled, RIS.TXFIFOTRG will only be set when the Target TX FIFO is at or above the trigger level.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isTargetTXTriggerInTXModeEnabled()

__STATIC_INLINE bool DL_I2C_isTargetTXTriggerInTXModeEnabled

(

const I2C_Regs *

i2c

)

Checks if target TX trigger in TX mode is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target TX trigger in TX mode is enabled

Return values

true	if target TX trigger in TX mode is enabled
false	if target TX trigger in TX mode is disabled

DL_I2C_enableTargetTXTriggerInTXMode()

__STATIC_INLINE void DL_I2C_enableTargetTXTriggerInTXMode

(

I2C_Regs *

i2c

)

Enable TX trigger when target is in TX mode.

When enabled, RIS.TXFIFOTRG will be set when the Target TX FIFO has reached the trigger level AND the Target state machine is in the TXMODE as defined in the SSR register. When cleared RIS.TXFIFOTRG will be set when the Target TX FIFO is at or above the trigger level. This setting can be used to hold off the TX DMA until a transaction starts. This allows the DMA to be configured when the I2C is idle but have it wait till the transaction starts to load the Target TX FIFO, so it can load from a memory buffer that might be changing over time.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

See also

DL_I2C_INTERRUPT_CONTROLLER_TXFIFO_TRIGGER

DL_I2C_disableTargetTXWaitWhenTXFIFOStale()

__STATIC_INLINE void DL_I2C_disableTargetTXWaitWhenTXFIFOStale

(

I2C_Regs *

i2c

)

Disable target TX transfer waits when stale data in TX FIFO.

When disabled, the TX FIFO empty signal to the Target state machine indicates that the TX FIFO is empty.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isTargetTXWaitWhenTXFIFOStaleEnabled()

__STATIC_INLINE bool DL_I2C_isTargetTXWaitWhenTXFIFOStaleEnabled

(

const I2C_Regs *

i2c

)

Checks if target TX transfer waits when stale data in TX FIFO is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target TX transfer waits when stale data in TX FIFO is enabled

Return values

true	if target TX transfer waits when stale data in TX FIFO is enabled
false	if target TX transfer waits when stale data in TX FIFO is disabled

DL_I2C_enableTargetTXWaitWhenTXFIFOStale()

__STATIC_INLINE void DL_I2C_enableTargetTXWaitWhenTXFIFOStale

(

I2C_Regs *

i2c

)

Enable target TX transfer waits when stale data in TX FIFO.

When enabled, the TX FIFO empty signal to the Target state machine will indicate that the TX FIFO is empty or that the TX FIFO data is stale. The TX FIFO data is determined to be stale when there is data in the TX FIFO when the Target state machine leaves the TXMODE as defined in the SSR register. This can occur is a Stop or timeout occur when there are bytes left in the TX FIFO.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableTargetRXFullOnRXRequest()

__STATIC_INLINE void DL_I2C_disableTargetRXFullOnRXRequest

(

I2C_Regs *

i2c

)

Disable target RX full interrupt on receive request.

When disabled, RIS.SRXFULL will be set when only the Target RX FIFO is full. This allows the SRXFULL interrupt to be used to indicate that the I2C bus is being clock stretched and that the FW must either read the RX FIFO or ACK/NACK the current RX byte.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

See also

DL_I2C_isTargetClockStretchEnabled

DL_I2C_isTargetRXFullOnRXRequestEnabled()

__STATIC_INLINE bool DL_I2C_isTargetRXFullOnRXRequestEnabled

(

const I2C_Regs *

i2c

)

Checks if target RX full interrupt on receive request is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target RX full interrupt on receive request enabled

Return values

true	if target RX full interrupt on receive request enabled
false	if target RX full interrupt on receive request disabled

DL_I2C_enableTargetRXFullOnRXRequest()

__STATIC_INLINE void DL_I2C_enableTargetRXFullOnRXRequest

(

I2C_Regs *

i2c

)

Enable target RX full interrupt on receive request.

When enabled, RIS.SRXFULL will be set when the Target state machine is in the RX_WAIT or RX_ACK_WAIT states which occurs when the I2C transaction is clock stretched because the RX FIFO is full or the ACKOEN has been set and the state machine is waiting for FW to ACK/NACK the current byte.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableDefaultHostAddress()

__STATIC_INLINE void DL_I2C_disableDefaultHostAddress

(

I2C_Regs *

i2c

)

Disable SMBus/PMBus default host address of 000 1000b.

When disabled, the default host address is not matched. NOTE: The host address may still be matched if programmed as an own address. The I2C module can still be addressed as a target if enabled and own address match is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isDefaultHostAddressEnabled()

__STATIC_INLINE bool DL_I2C_isDefaultHostAddressEnabled

(

const I2C_Regs *

i2c

)

Checks if SMBus/PMBus default host address of 000 1000b is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If default host address is enabled

Return values

true	if default host address is enabled
false	if default host address disabled

DL_I2C_enableDefaultHostAddress()

__STATIC_INLINE void DL_I2C_enableDefaultHostAddress

(

I2C_Regs *

i2c

)

Enable SMBus/PMBus default host address of 000 1000b.

When enabled, default host address of 0x0001000 is always matched by the target address match logic

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableAlertResponseAddress()

__STATIC_INLINE void DL_I2C_disableAlertResponseAddress

(

I2C_Regs *

i2c

)

Disable SMBus/PMBus Alert response address (ARA) of 000 1100b.

When disabled, the alert response address 0x0001100 is not matched. NOTE: The alert response address may still be matched if programmed as an own address. The I2C module can still be addressed as a target if enabled and own address match is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isAlertResponseAddressEnabled()

__STATIC_INLINE bool DL_I2C_isAlertResponseAddressEnabled

(

const I2C_Regs *

i2c

)

Checks if SMBus/PMBus Alert response address (ARA) of 000 1100b is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If alert response address is enabled

Return values

true	if alert response address is enabled
false	if alert response address disabled

DL_I2C_enableAlertResponseAddress()

__STATIC_INLINE void DL_I2C_enableAlertResponseAddress

(

I2C_Regs *

i2c

)

Enable SMBus/PMBus Alert response address (ARA) of 000 1100b.

When enabled, default alert response address of 0x0001100 is always matched by the target address match logic

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableDefaultDeviceAddress()

__STATIC_INLINE void DL_I2C_disableDefaultDeviceAddress

(

I2C_Regs *

i2c

)

Disable SMBus/PMBus default device address of 110 0001b.

Used for Address Resolution Protocol. When disabled, the default device address is not matched. NOTE: The host address may still be matched if programmed as an own address. The I2C module can still be addressed as a target if enabled and own address match is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isDefaultDeviceAddressEnabled()

__STATIC_INLINE bool DL_I2C_isDefaultDeviceAddressEnabled

(

const I2C_Regs *

i2c

)

Checks SMBus/PMBus default device address of 110 0001b is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If default device address is enabled

Return values

true	if default device address is enabled
false	if default device address disabled

DL_I2C_enableDefaultDeviceAddress()

__STATIC_INLINE void DL_I2C_enableDefaultDeviceAddress

(

I2C_Regs *

i2c

)

Enable SMBus/PMBus default device address of 110 0001b.

Used for Address Resolution Protocol. When enabled, default device address of 110 0001b is always matched by the target address match logic.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableTargetWakeup()

__STATIC_INLINE void DL_I2C_disableTargetWakeup

(

I2C_Regs *

i2c

)

Disable target wakeup.

When disabled, the target is not allowed to clock stretch on START detection.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isTargetWakeupEnabled()

__STATIC_INLINE bool DL_I2C_isTargetWakeupEnabled

(

const I2C_Regs *

i2c

)

Checks if target wakeup is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target wakeup is enabled

Return values

true	if target wakeup is enabled
false	if target wakeup disabled

DL_I2C_enableTargetWakeup()

__STATIC_INLINE void DL_I2C_enableTargetWakeup

(

I2C_Regs *

i2c

)

Enable target wakeup.

Enables low-power wake-up, however it is recommended to enable target clock stretching to stretch the clock while the module is waking up.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

See also

DL_I2C_enableTargetClockStretching

DL_I2C_disableTarget()

__STATIC_INLINE void DL_I2C_disableTarget

(

I2C_Regs *

i2c

)

Disable target functionality.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isTargetEnabled()

__STATIC_INLINE bool DL_I2C_isTargetEnabled

(

const I2C_Regs *

i2c

)

Checks if target functionality is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target functionality is enabled

Return values

true	if target functionality is enabled
false	if target functionality is disabled

DL_I2C_enableTarget()

__STATIC_INLINE void DL_I2C_enableTarget

(

I2C_Regs *

i2c

)

Enable usage of target functionality.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_disableGeneralCall()

__STATIC_INLINE void DL_I2C_disableGeneralCall

(

I2C_Regs *

i2c

)

Disable general call address of 000 0000b.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isGeneralCallEnabled()

__STATIC_INLINE bool DL_I2C_isGeneralCallEnabled

(

const I2C_Regs *

i2c

)

Checks if general call address of 000 0000b is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If general call is enabled

Return values

true	if general call is enabled
false	if general call is disabled

DL_I2C_enableGeneralCall()

__STATIC_INLINE void DL_I2C_enableGeneralCall

(

I2C_Regs *

i2c

)

Enable usage of general call address of 000 0000b.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getTargetStatus()

__STATIC_INLINE uint32_t DL_I2C_getTargetStatus

(

const I2C_Regs *

i2c

)

Get status of I2C bus controller for target.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Status of I2C bus controller for target

Return values

Bitwise

OR of DL_I2C_TARGET_STATUS

DL_I2C_receiveTargetData()

__STATIC_INLINE uint8_t DL_I2C_receiveTargetData

(

const I2C_Regs *

i2c

)

Get byte of data from I2C target.

If using FIFO, it is first byte from the RX FIFO.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Last received byte of data

Return values

[0x00,0xff]

DL_I2C_transmitTargetData()

__STATIC_INLINE void DL_I2C_transmitTargetData	(	I2C_Regs *	i2c,
		uint8_t	data
	)

Set next byte to be transferred during the next transaction.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	data	Byte of data to be transferred during the next transaction. [0x00, 0xff]

DL_I2C_disableTargetACKOverride()

__STATIC_INLINE void DL_I2C_disableTargetACKOverride

(

I2C_Regs *

i2c

)

Disable target ACK override.

Disable manual ACK override to automatically ACK all received bytes until the RX FIFO is full.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isTargetACKOverrideEnabled()

__STATIC_INLINE bool DL_I2C_isTargetACKOverrideEnabled

(

const I2C_Regs *

i2c

)

Checks if target ACK override is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target ACK override is enabled

Return values

true	if target ACK override is enabled
false	if target ACK override is disabled

DL_I2C_enableTargetACKOverride()

__STATIC_INLINE void DL_I2C_enableTargetACKOverride

(

I2C_Regs *

i2c

)

Enable target ACK override.

When manual ACK override is enabled, the I2C target SCL is pulled low after the last data is received until the ACK override value (through DL_I2C_setTargetACKOverrideValue) is written. Disable manual ACK override to automatically ACK all received bytes until the RX FIFO is full.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getTargetACKOverrideValue()

__STATIC_INLINE DL_I2C_TARGET_RESPONSE_OVERRIDE_VALUE DL_I2C_getTargetACKOverrideValue

(

const I2C_Regs *

i2c

)

Get target acknowledge override value.

Note

for General Call this bit will be ignored if set to NACK and target continues to receive data.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

What type of response will be generated

Return values

One	of DL_I2C_TARGET_RESPONSE_OVERRIDE_VALUE.

DL_I2C_setTargetACKOverrideValue()

__STATIC_INLINE void DL_I2C_setTargetACKOverrideValue	(	I2C_Regs *	i2c,
		DL_I2C_TARGET_RESPONSE_OVERRIDE_VALUE	value
	)

Set target acknowledge override value.

Note

for General Call this bit will be ignored if set to NACK and target continues to receive data.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	value	Indicates what type of response will be generated. One of DL_I2C_TARGET_RESPONSE_OVERRIDE_VALUE.

See also

DL_I2C_enableTargetACKOverride

References DL_Common_updateReg().

DL_I2C_disableACKOverrideOnStart()

__STATIC_INLINE void DL_I2C_disableACKOverrideOnStart

(

I2C_Regs *

i2c

)

Disable target ACK override on Start Condition.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isACKOverrideOnStartEnabled()

__STATIC_INLINE bool DL_I2C_isACKOverrideOnStartEnabled

(

const I2C_Regs *

i2c

)

Checks if target ACK override on Start condition is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target ACK override on Start condition is enabled

Return values

true	if target ACK override on Start condition is enabled
false	if target ACK override on Start condition is disabled

DL_I2C_enableACKOverrideOnStart()

__STATIC_INLINE void DL_I2C_enableACKOverrideOnStart

(

I2C_Regs *

i2c

)

Enable target ACK override on Start condition.

When enabled, this bit will automatically turn on the Target ACKOEN field following a Start condition.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

See also

DL_I2C_enableTargetACKOverride

DL_I2C_disableACKOverrideOnPECNext()

__STATIC_INLINE void DL_I2C_disableACKOverrideOnPECNext

(

I2C_Regs *

i2c

)

Disable target ACK override when SMBus/PMBus PEC is next byte.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isACKOverrideOnPECNextEnabled()

__STATIC_INLINE bool DL_I2C_isACKOverrideOnPECNextEnabled

(

const I2C_Regs *

i2c

)

Checks if target ACK override when SMBus/PMBus PEC is next byte is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target ACK override when PEC is next byte is enabled

Return values

true	if target ACK override when PEC is next byte is enabled
false	if target ACK override when PEC is next byte is disabled

DL_I2C_enableACKOverrideOnPECNext()

__STATIC_INLINE void DL_I2C_enableACKOverrideOnPECNext

(

I2C_Regs *

i2c

)

Enable target ACK override when SMBus/PMBus PEC is next byte.

When enabled, this bit will automatically turn on the Target ACKOEN field following the ACK/NACK of the byte received just prior to the PEC byte. Note that when ACKOEN is set, the PEC byte will not automatically be ACKed/NACKed by the state machine and FW must perform this function by writing SLAVE_SACKCTL.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

See also

DL_I2C_enableTargetACKOverride

DL_I2C_disableACKOverrideOnPECDone()

__STATIC_INLINE void DL_I2C_disableACKOverrideOnPECDone

(

I2C_Regs *

i2c

)

Disable target ACK override when SMBus/PMBus PEC is next byte.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isACKOverrideOnPECDoneEnabled()

__STATIC_INLINE bool DL_I2C_isACKOverrideOnPECDoneEnabled

(

const I2C_Regs *

i2c

)

Checks if target ACK override when SMBus/PMBus PEC is next byte is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target ACK override when PEC is next byte is enabled

Return values

true	if target ACK override when PEC is next byte is enabled
false	if target ACK override when PEC is next byte is disabled

DL_I2C_enableACKOverrideOnPECDone()

__STATIC_INLINE void DL_I2C_enableACKOverrideOnPECDone

(

I2C_Regs *

i2c

)

Enable target ACK override when SMBus/PMBus PEC is done.

When enabled, this bit will automatically turn on the Target ACKOEN field following the ACK/NACK of the received PEC byte.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

See also

DL_I2C_enableTargetACKOverride

DL_I2C_getTargetPECCountValue()

__STATIC_INLINE uint32_t DL_I2C_getTargetPECCountValue

(

const I2C_Regs *

i2c

)

Get the target SMBus/PMBus Packet Error Checking (PEC) count value.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

The value the PEC count is set to

Return values

Value

between [0x0, 0x01FF]

DL_I2C_setTargetPECCountValue()

__STATIC_INLINE void DL_I2C_setTargetPECCountValue	(	I2C_Regs *	i2c,
		uint32_t	count
	)

Set the target SMBus/PMBus Packet Error Checking (PEC) count value.

When this field is non zero, the number of I2C data bytes are counted. Refer to the device TRM for more details.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	count	The value to set the PEC count to. Value between [0x0, 0x01FF]

References DL_Common_updateReg().

DL_I2C_disableTargetPEC()

__STATIC_INLINE void DL_I2C_disableTargetPEC

(

I2C_Regs *

i2c

)

Disable target SMBus/PMBus Packet Error Checking (PEC)

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isTargetPECEnabled()

__STATIC_INLINE bool DL_I2C_isTargetPECEnabled

(

const I2C_Regs *

i2c

)

Checks if target SMBus/PMBus Packet Error Checking (PEC) is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target PEC is enabled

Return values

true	if target PEC is enabled
false	if target PEC is disabled

DL_I2C_enableTargetPEC()

__STATIC_INLINE void DL_I2C_enableTargetPEC

(

I2C_Regs *

i2c

)

Enable target SMBus/PMBus Packet Error Checking (PEC)

When enabled, the PEC is calculated on all bits accept the Start, Stop, ACK and NACK. The PEC LSFR and the Byte Counter is set to 0 when the State Machine is in the IDLE state, which occurs following a Stop or when a timeout occurs. The Counter is also set to 0 after the PEC byte is sent or received. Note that the NACK is automatically sent following a PEC byte that results in a PEC error. The PEC Polynomial is x^8 + x^2 + x^1 + 1.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getTargetCurrentPECCount()

__STATIC_INLINE uint32_t DL_I2C_getTargetCurrentPECCount

(

const I2C_Regs *

i2c

)

Get the current SMBus/PMBus PEC byte count of the Target state machine.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

The current PEC byte count of the target state macione

Return values

Value

between [0x0, 0x01FF]

DL_I2C_getTargetPECCheckedStatus()

__STATIC_INLINE DL_I2C_TARGET_PEC_STATUS DL_I2C_getTargetPECCheckedStatus

(

const I2C_Regs *

i2c

)

Get status if SMBus/PMBus target PEC was checked in last transaction.

The status indicates if the target PEC was checked in the transaction that occurred before the last Stop. Latched on Stop.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Status of PEC target checked

Return values

One	of DL_I2C_TARGET_PEC_STATUS

DL_I2C_getTargetPECCheckError()

__STATIC_INLINE DL_I2C_TARGET_PEC_CHECK_ERROR DL_I2C_getTargetPECCheckError

(

const I2C_Regs *

i2c

)

Get status if SMBus/PMBus target PEC had an error.

The status indicates if a PEC check error occurred in the transaction that occurred before the last Stop. Latched on Stop.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Status of target PEC error check

Return values

One	of DL_I2C_TARGET_PEC_CHECK_ERROR

DL_I2C_getTargetTXFIFOThreshold()

__STATIC_INLINE DL_I2C_TX_FIFO_LEVEL DL_I2C_getTargetTXFIFOThreshold

(

const I2C_Regs *

i2c

)

Get target TX FIFO threshold level.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Indicates at what fill level in the TX FIFO a threshold will be generated

Return values

One	of DL_I2C_TX_FIFO_LEVEL

DL_I2C_setTargetTXFIFOThreshold()

__STATIC_INLINE void DL_I2C_setTargetTXFIFOThreshold	(	I2C_Regs *	i2c,
		DL_I2C_TX_FIFO_LEVEL	level
	)

Set target TX FIFO threshold level.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	level	Indicates at what fill level in the TX FIFO a threshold will be generated. One of DL_I2C_TX_FIFO_LEVEL.

References DL_Common_updateReg().

DL_I2C_stopFlushTargetTXFIFO()

__STATIC_INLINE void DL_I2C_stopFlushTargetTXFIFO

(

I2C_Regs *

i2c

)

Stop target TX FIFO flush.

Before stopping the flush, check if DL_I2C_isTargetTXFIFOEmpty, indicating flush is complete.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_startFlushTargetTXFIFO()

__STATIC_INLINE void DL_I2C_startFlushTargetTXFIFO

(

I2C_Regs *

i2c

)

Start target TX FIFO flush.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_stopFlushTargetRXFIFO()

__STATIC_INLINE void DL_I2C_stopFlushTargetRXFIFO

(

I2C_Regs *

i2c

)

Stop target RX FIFO flush.

Before stopping the flush, check if DL_I2C_isTargetRXFIFOEmpty, indicating flush is complete.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_startFlushTargetRXFIFO()

__STATIC_INLINE void DL_I2C_startFlushTargetRXFIFO

(

I2C_Regs *

i2c

)

Start target RX FIFO flush.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getTargetRXFIFOThreshold()

__STATIC_INLINE DL_I2C_RX_FIFO_LEVEL DL_I2C_getTargetRXFIFOThreshold

(

const I2C_Regs *

i2c

)

Get target RX FIFO threshold level.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Indicates at what fill level in the RX FIFO a threshold will be generated

Return values

One	of DL_I2C_RX_FIFO_LEVEL

DL_I2C_setTargetRXFIFOThreshold()

__STATIC_INLINE void DL_I2C_setTargetRXFIFOThreshold	(	I2C_Regs *	i2c,
		DL_I2C_RX_FIFO_LEVEL	level
	)

Set target RX FIFO threshold level.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	level	Indicates at what fill level in the RX FIFO a threshold will be generated. One of DL_I2C_RX_FIFO_LEVEL.

References DL_Common_updateReg().

DL_I2C_getTargetRXFIFOCounter()

__STATIC_INLINE uint32_t DL_I2C_getTargetRXFIFOCounter

(

const I2C_Regs *

i2c

)

Get number of bytes which can be read from RX FIFO.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Number of bytes which can be read from RX FIFO

Return values

[0x0,0x8]

DL_I2C_getTargetTXFIFOCounter()

__STATIC_INLINE uint32_t DL_I2C_getTargetTXFIFOCounter

(

const I2C_Regs *

i2c

)

Get number of bytes which can be put into TX FIFO.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

Number of bytes which can be put into TX FIFO

Return values

[0x0,0x8]

DL_I2C_isTargetRXFIFOFlushActive()

__STATIC_INLINE bool DL_I2C_isTargetRXFIFOFlushActive

(

const I2C_Regs *

i2c

)

Checks if target RX FIFO flush is active.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target RX FIFO flush is active

Return values

true	if target RX FIFO flush is active
false	if target RX FIFO flush is not active

DL_I2C_isTargetTXFIFOFlushActive()

__STATIC_INLINE bool DL_I2C_isTargetTXFIFOFlushActive

(

const I2C_Regs *

i2c

)

Checks if target TX FIFO flush is active.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If target TX FIFO flush is active

Return values

true	if target TX FIFO flush is active
false	if target TX FIFO flush is not active

DL_I2C_enableInterrupt()

__STATIC_INLINE void DL_I2C_enableInterrupt	(	I2C_Regs *	i2c,
		uint32_t	interruptMask
	)

Enable I2C interrupts.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	interruptMask	Bit mask of interrupts to enable. Bitwise OR of DL_I2C_INTERRUPT.

DL_I2C_disableInterrupt()

__STATIC_INLINE void DL_I2C_disableInterrupt	(	I2C_Regs *	i2c,
		uint32_t	interruptMask
	)

Disable I2C interrupts.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	interruptMask	Bit mask of interrupts to disable. Bitwise OR of DL_I2C_INTERRUPT.

DL_I2C_getEnabledInterrupts()

__STATIC_INLINE uint32_t DL_I2C_getEnabledInterrupts	(	const I2C_Regs *	i2c,
		uint32_t	interruptMask
	)

Check which I2C interrupts are enabled.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	interruptMask	Bit mask of interrupts to check. Bitwise OR of DL_I2C_INTERRUPT.

Returns

Which of the requested I2C interrupts are enabled

Return values

Bitwise

OR of DL_I2C_INTERRUPT values

DL_I2C_getEnabledInterruptStatus()

__STATIC_INLINE uint32_t DL_I2C_getEnabledInterruptStatus	(	const I2C_Regs *	i2c,
		uint32_t	interruptMask
	)

Check interrupt flag of enabled I2C interrupts.

Checks if any of the I2C interrupts that were previously enabled are pending.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	interruptMask	Bit mask of interrupts to check. Bitwise OR of DL_I2C_INTERRUPT.

Returns

Which of the requested I2C interrupts are pending

Return values

Bitwise

OR of DL_I2C_INTERRUPT values

See also

DL_I2C_enableInterrupt

DL_I2C_getRawInterruptStatus()

__STATIC_INLINE uint32_t DL_I2C_getRawInterruptStatus	(	const I2C_Regs *	i2c,
		uint32_t	interruptMask
	)

Check interrupt flag of any I2C interrupt.

Checks if any of the I2C interrupts are pending. Interrupts do not have to be previously enabled.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	interruptMask	Bit mask of interrupts to check. Bitwise OR of DL_I2C_INTERRUPT.

Returns

Which of the requested I2C interrupts are pending

Return values

Bitwise

OR of DL_I2C_INTERRUPT values

DL_I2C_getPendingInterrupt()

__STATIC_INLINE DL_I2C_IIDX DL_I2C_getPendingInterrupt

(

const I2C_Regs *

i2c

)

Get highest priority pending I2C interrupt.

Checks if any of the I2C interrupts are pending. Interrupts do not have to be previously enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

The highest priority pending I2C interrupt

Return values

One	of DL_I2C_IIDX

DL_I2C_clearInterruptStatus()

__STATIC_INLINE void DL_I2C_clearInterruptStatus	(	I2C_Regs *	i2c,
		uint32_t	interruptMask
	)

Clear pending I2C interrupts.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	interruptMask	Bit mask of interrupts to clear. Bitwise OR of DL_I2C_INTERRUPT.

DL_I2C_enableDMAEvent()

__STATIC_INLINE void DL_I2C_enableDMAEvent	(	I2C_Regs *	i2c,
		DL_I2C_EVENT_ROUTE	index,
		uint32_t	interrupt
	)

Enables I2C interrupt for triggering DMA events.

Enables the I2C interrupt to be used as the condition to generate an event to directly trigger the DMA.

Each event publisher DL_I2C_EVENT_ROUTE can set any one of DL_I2C_DMA_INTERRUPT.

Note

Only one interrupt source should be enabled at a time.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	index	Specifies the register event publisher to configure
[in]	interrupt	Interrupt to enable as the trigger condition for the DMA. One of DL_I2C_DMA_INTERRUPT.

References DL_I2C_EVENT_ROUTE_1, and DL_I2C_EVENT_ROUTE_2.

DL_I2C_disableDMAEvent()

__STATIC_INLINE void DL_I2C_disableDMAEvent	(	I2C_Regs *	i2c,
		DL_I2C_EVENT_ROUTE	index,
		uint32_t	interrupt
	)

Disables I2C interrupt from triggering DMA events.

Disables the I2C interrupt from being used as the condition to generate an event to directly trigger the DMA.

Each event publisher DL_I2C_EVENT_ROUTE can set any one of DL_I2C_DMA_INTERRUPT.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	index	Specifies the register event publisher to configure
[in]	interrupt	Interrupt to disable as the trigger condition for the DMA. One of DL_I2C_DMA_INTERRUPT.

References DL_I2C_EVENT_ROUTE_1, and DL_I2C_EVENT_ROUTE_2.

DL_I2C_getEnabledDMAEvents()

__STATIC_INLINE uint32_t DL_I2C_getEnabledDMAEvents	(	I2C_Regs *	i2c,
		DL_I2C_EVENT_ROUTE	index,
		uint32_t	interruptMask
	)

Check which I2C interrupt for DMA receive events is enabled.

This API checks the event publisher register as selected by DL_I2C_EVENT_ROUTE, which are used for triggering the DMA for Controller or Target and receive or transmit events.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	index	Specifies the register event publisher to configure
[in]	interruptMask	Bit mask of interrupts to check. Bitwise OR of DL_I2C_DMA_INTERRUPT.

Note

Only one interrupt source should be enabled at a time.

Returns

The requested I2C interrupt status

Return values

One	of DL_I2C_DMA_INTERRUPT

DL_I2C_getEnabledDMAEventStatus()

__STATIC_INLINE uint32_t DL_I2C_getEnabledDMAEventStatus	(	const I2C_Regs *	i2c,
		DL_I2C_EVENT_ROUTE	index,
		uint32_t	interruptMask
	)

Check interrupt flag of enabled I2C interrupt for DMA event.

Checks if any of the I2C interrupts for the DMA receive event that were previously enabled are pending. This API checks the event publisher register as selected by DL_I2C_EVENT_ROUTE, which are used for triggering the DMA for Controller or Target and receive or transmit events.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	index	Specifies the register event publisher to configure
[in]	interruptMask	Bit mask of interrupts to check. Bitwise OR of DL_I2C_DMA_INTERRUPT.

Note

Only one interrupt source should be enabled at a time.

Returns

The requested I2C interrupt status

Return values

One	of DL_I2C_DMA_INTERRUPT

See also

DL_I2C_enableDMAEvent

DL_I2C_getRawDMAEventStatus()

__STATIC_INLINE uint32_t DL_I2C_getRawDMAEventStatus	(	const I2C_Regs *	i2c,
		DL_I2C_EVENT_ROUTE	index,
		uint32_t	interruptMask
	)

Check interrupt flag of any I2C interrupt for DMA event.

Checks if any of the I2C interrupts for DMA receive event are pending. Interrupts do not have to be previously enabled. This API checks the event publisher register as selected by DL_I2C_EVENT_ROUTE, which are used for triggering the DMA for Controller or Target and receive or transmit events.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	index	Specifies the register event publisher to configure
[in]	interruptMask	Bit mask of interrupts to check. Bitwise OR of DL_I2C_DMA_INTERRUPT.

Returns

Which of the requested I2C interrupts are pending

Return values

Bitwise

OR of DL_I2C_DMA_INTERRUPT values

DL_I2C_getPendingDMAEvent()

__STATIC_INLINE DL_I2C_DMA_IIDX DL_I2C_getPendingDMAEvent	(	const I2C_Regs *	i2c,
		DL_I2C_EVENT_ROUTE	index
	)

Get highest priority pending I2C interrupt for DMA event.

Checks if any of the I2C interrupts for DMA receive event are pending. Interrupts do not have to be previously enabled. This API checks the event publisher register as selected by DL_I2C_EVENT_ROUTE, which are used for triggering the DMA for Controller or Target and receive or transmit events.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	index	Specifies the register event publisher to configure

Returns

The highest priority pending I2C interrupt

Return values

One	of DL_I2C_DMA_IIDX

DL_I2C_clearDMAEvent()

__STATIC_INLINE void DL_I2C_clearDMAEvent	(	I2C_Regs *	i2c,
		DL_I2C_EVENT_ROUTE	index,
		uint32_t	interrupt
	)

Clear pending SPI interrupts for DMA events.

This API checks the event publisher register as selected by DL_I2C_EVENT_ROUTE, which are used for triggering the DMA for Controller or Target and receive or transmit events.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	index	Specifies the register event publisher to configure
[in]	interrupt	Interrupt to clear. One of DL_I2C_DMA_INTERRUPT

References DL_I2C_EVENT_ROUTE_1, and DL_I2C_EVENT_ROUTE_2.

DL_I2C_disableGlitchFilterChaining()

__STATIC_INLINE void DL_I2C_disableGlitchFilterChaining

(

I2C_Regs *

i2c

)

Disable analog and digital glitch filter chaining.

Chaining is disabled and only digital filter output is available to IP sampling logic.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isGlitchFilterChainingEnabled()

__STATIC_INLINE bool DL_I2C_isGlitchFilterChainingEnabled

(

const I2C_Regs *

i2c

)

Checks if analog and digital glitch filter chaining is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If glitch filter chaining is enabled

Return values

true	if glitch filter chaining is enabled
false	if glitch filter chaining is disabled

DL_I2C_enableGlitchFilterChaining()

__STATIC_INLINE void DL_I2C_enableGlitchFilterChaining

(

I2C_Regs *

i2c

)

Enable analog and digitial glitch filter chaining.

When enabled, analog and digital glitch filters are chained and the output of the combination is made available to IP sampling logic.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getTimeoutACount()

__STATIC_INLINE uint32_t DL_I2C_getTimeoutACount

(

const I2C_Regs *

i2c

)

Get the Timeout Counter A value.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

The Timeout A counter value

Return values

Value

between [0x0, 0xFF]

DL_I2C_setTimeoutACount()

__STATIC_INLINE void DL_I2C_setTimeoutACount	(	I2C_Regs *	i2c,
		uint32_t	count
	)

Set the Timeout Counter A value.

Timeout A is used for SCL low detection. This field contains the upper 8 bits of a 12-bit pre-load value for the Timeout A count. NOTE: The value of the counter must be greater than 1 to enable the timeout. Each count is equal to 520 times the timeout period of the functional clock. For example, with 8MHz functional clock and a 100KHz operating I2C clock, one timeout period will be equal to (1 / 8MHz) * 520 = 65us.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	count	The value to set the Timeout A counter to. Value between [0x0, 0xFF]

References DL_Common_updateReg().

DL_I2C_disableTimeoutA()

__STATIC_INLINE void DL_I2C_disableTimeoutA

(

I2C_Regs *

i2c

)

Disable Timeout Counter A.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isTimeoutAEnabled()

__STATIC_INLINE bool DL_I2C_isTimeoutAEnabled

(

const I2C_Regs *

i2c

)

Checks if Timeout Counter A is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If Timeout Counter A is enabled

Return values

true	if Timeout Counter A is enabled
false	if Timeout Counter A is disabled

DL_I2C_enableTimeoutA()

__STATIC_INLINE void DL_I2C_enableTimeoutA

(

I2C_Regs *

i2c

)

Enable Timeout Counter A.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getCurrentTimeoutACounter()

__STATIC_INLINE uint32_t DL_I2C_getCurrentTimeoutACounter

(

const I2C_Regs *

i2c

)

Get the current Timer Counter A value.

This field contains the upper 8 bits of a 12-bit current counter for Timeout Counter A.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

The Timeout A counter value

Return values

Value

between [0x0, 0xFF]

DL_I2C_getTimeoutBCount()

__STATIC_INLINE uint32_t DL_I2C_getTimeoutBCount

(

const I2C_Regs *

i2c

)

Get the Timeout Counter B value.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

The Timeout B counter value

Return values

Value

between [0x0, 0xFF]

DL_I2C_setTimeoutBCount()

__STATIC_INLINE void DL_I2C_setTimeoutBCount	(	I2C_Regs *	i2c,
		uint32_t	count
	)

Set the Timeout Counter B value.

Timeout B is used for SCL high detection. This field contains the upper 8 bits of a 12-bit pre-load value for the Timeout A count. NOTE: The value of the counter must be greater than 1 to enable the timeout. Each count is equal to 1* clock period. For example, with 10MHz functional clock one timeout period will be equal to 1 * 10ns.

Parameters

[in]	i2c	Pointer to the register overlay for the peripheral
[in]	count	The value to set the Timeout A counter to. Value between [0x0, 0xFF]

References DL_Common_updateReg().

DL_I2C_disableTimeoutB()

__STATIC_INLINE void DL_I2C_disableTimeoutB

(

I2C_Regs *

i2c

)

Disable Timeout Counter B.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_isTimeoutBEnabled()

__STATIC_INLINE bool DL_I2C_isTimeoutBEnabled

(

const I2C_Regs *

i2c

)

Checks if Timeout Counter B is enabled.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

If Timeout Counter B is enabled

Return values

true	if Timeout Counter B is enabled
false	if Timeout Counter B is disabled

DL_I2C_enableTimeoutB()

__STATIC_INLINE void DL_I2C_enableTimeoutB

(

I2C_Regs *

i2c

)

Enable Timeout Counter B.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

DL_I2C_getCurrentTimeoutBCounter()

__STATIC_INLINE uint32_t DL_I2C_getCurrentTimeoutBCounter

(

const I2C_Regs *

i2c

)

Get the current Timer Counter B value.

This field contains the upper 8 bits of a 12-bit current counter for Timeout Counter B.

Parameters

[in]

i2c

Pointer to the register overlay for the peripheral

Returns

The Timeout B counter value

Return values

Value

between [0x0, 0xFF]