Motor Driver/DRV8316

Data Structures
struct	DRV8316_Instance
	Defines DRV8316 instance. More...

Macros
#define	DRV8316_ADDR_MASK   (0x7E00)
	Defines the address mask.
#define	DRV8316_DATA_MASK   (0x00FF)
	Defines the data mask.
#define	DRV8316_DATA_TRANSMIT_TO_READ   (0x00)
	Defines the data transmitted while reading a register.
#define	DRV8316_INITIAL_PARITY   (0x00)
	Defines the initial parity of command word.
#define	DRV8316_PARITY_CHECK   (0x01)
	Defines the parity checking bit.
#define	DRV8316_RIGHT_SHIFT_REGISTER   (1)
	Defines the number of bits right shifted.
#define	DRV8316_PARITY_BIT_POSITION   (8)
	Defines the position of the parity in command word.
#define	DRV8316_ADDR_BIT_POSITION   (9)
	Defines the position of the parity in command word.
#define	DRV8316_SPICMD_BIT_POSITION   (15)
	Defines the position of the parity in command word.
#define	DRV8316_CLEAR_BIT_MASK   (0x01)
	Defines the claer bit mask.
#define	DRV8316_MAXIMUM_RESET_TIME   (40)
	Defines the time to clear the nSLEEP pin to reset faults.
#define	DRV8316_MAXIMUM_WAKEUP_TIME   (2000)
	Defines the time to wakeup the drv after reset.
#define	DRV8316_VOLTAGE_CONV_CONST   _IQ20(13.417)
	Defines voltage conversion constant.
#define	DRV8316_CSA_REF_VOLTAGE   (3000)
	Defines CSA reference voltage.
#define	DRV8316_CSAGAIN_0P15VA_IQ   _IQ20(0.15)
	Defines CSA gains 0.15 in IQ20.
#define	DRV8316_CSAGAIN_0P3VA_IQ   _IQ20(0.3)
	Defines CSA gains 0.3 in IQ20.
#define	DRV8316_CSAGAIN_0P6VA_IQ   _IQ20(0.6)
	Defines CSA gains 0.6 in IQ20.
#define	DRV8316_CSAGAIN_1P2VA_IQ   _IQ20(1.2)
	Defines CSA gains 1.2 in IQ20.

Enumerations
enum	DRV8316_CTRL01_MASK { DRV8316_CTRL01_MASK_REG_LOCK = 0x07 << 0 }
enum	DRV8316_CTRL02_MASK {   DRV8316_CTRL02_MASK_CLR_FLT = 0x01 << 0,   DRV8316_CTRL02_MASK_PWM_MODE = 0x03 << 1,   DRV8316_CTRL02_MASK_SLEW = 0x03 << 3,   DRV8316_CTRL02_MASK_SDO_MODE = 0x01 << 5 }
enum	DRV8316_CTRL03_MASK {   DRV8316_CTRL03_MASK_OTW_REP = 0x01 << 0,   DRV8316_CTRL03_MASK_OVP_EN = 0x01 << 2,   DRV8316_CTRL03_MASK_OVP_SEL = 0x01 << 3,   DRV8316_CTRL03_MASK_PWM_100_DUTY_SEL = 0x01 << 4 }
enum	DRV8316_CTRL04_MASK {   DRV8316_CTRL04_MASK_OCP_MODE = 0x03 << 0,   DRV8316_CTRL04_MASK_OCP_LVL = 0x01 << 2,   DRV8316_CTRL04_MASK_OCP_RETRY = 0x01 << 3,   DRV8316_CTRL04_MASK_OCP_DEG = 0x03 << 4,   DRV8316_CTRL04_MASK_OCP_CBC = 0x01 << 6,   DRV8316_CTRL04_MASK_DRV_OFF = 0x01 << 7 }
enum	DRV8316_CTRL05_MASK {   DRV8316_CTRL05_MASK_CSA_GAIN = 0x03 << 0,   DRV8316_CTRL05_MASK_EN_ASR = 0x01 << 2,   DRV8316_CTRL05_MASK_EN_AAR = 0x01 << 3,   DRV8316_CTRL05_MASK_ILIM_RECIR = 0x01 << 6 }
enum	DRV8316_CTRL06_MASK {   DRV8316_CTRL06_MASK_BUCK_DIS = 0x01 << 0,   DRV8316_CTRL06_MASK_BUCK_SEL = 0x03 << 1,   DRV8316_CTRL06_MASK_BUCK_CL = 0x01 << 3,   DRV8316_CTRL06_MASK_BUCK_PS_DIS = 0x01 << 4 }
enum	DRV8316_CTRL10_MASK {   DRV8316_CTRL10_MASK_DLY_TARGET = 0x0F << 0,   DRV8316_CTRL10_MASK_DLYCMP_EN = 0x01 << 4 }
enum	DRV8316_CTRL01 {   DRV8316_CTRL01_REG_UNLOCK = 0x03 << 0,   DRV8316_CTRL01_REG_LOCK = 0x06 << 0 }
enum	DRV8316_CTRL02 {   DRV8316_CTRL02_CLR_FLT = 0x01 << 0,   DRV8316_CTRL02_PWMMODE_6x = 0x00 << 1,   DRV8316_CTRL02_PWMMODE_6x_CL = 0x01 << 1,   DRV8316_CTRL02_PWMMODE_3x = 0x02 << 1,   DRV8316_CTRL02_PWMMODE_3x_CL = 0x03 << 1,   DRV8316_CTRL02_SLEWRATE_25 = 0x00 << 3,   DRV8316_CTRL02_SLEWRATE_50 = 0x01 << 3,   DRV8316_CTRL02_SLEWRATE_125 = 0x02 << 3,   DRV8316_CTRL02_SLEWRATE_200 = 0x03 << 3,   DRV8316_CTRL02_SDO_OPEN_DRAIN_MODE = 0x00 << 5,   DRV8316_CTRL02_SDO_PUSH_PULL_MODE = 0x01 << 5 }
enum	DRV8316_CTRL03 {   DRV8316_CTRL03_OTW_REP_DISABLE = 0x00 << 0,   DRV8316_CTRL03_OTW_REP_ENABLE = 0x01 << 0,   DRV8316_CTRL03_OVP_DISABLE = 0x00 << 2,   DRV8316_CTRL03_OVP_ENABLE = 0x01 << 2,   DRV8316_CTRL03_OVP_SEL_34V = 0x00 << 3,   DRV8316_CTRL03_OVP_SEL_22V = 0x01 << 3,   DRV8316_CTRL03_PWM_20KHZ = 0x00 << 4,   DRV8316_CTRL03_PWM_40KHZ = 0x01 << 4 }
enum	DRV8316_CTRL04 {   DRV8316_CTRL04_OCP_LATCHED = 0x00 << 0,   DRV8316_CTRL04_OCP_AUTO_RETRY = 0x01 << 0,   DRV8316_CTRL04_OCP_REPORT = 0x02 << 0,   DRV8316_CTRL04_OCP_DISABLE = 0x03 << 0,   DRV8316_CTRL04_OCP_LVL_16A = 0x00 << 2,   DRV8316_CTRL04_OCP_LVL_24A = 0x01 << 2,   DRV8316_CTRL04_OCP_RETRY_5MS = 0x00 << 3,   DRV8316_CTRL04_OCP_RETRY_500MS = 0x01 << 3,   DRV8316_CTRL04_OCP_DEG_0P2US = 0x00 << 4,   DRV8316_CTRL04_OCP_DEG_0P6US = 0x01 << 4,   DRV8316_CTRL04_OCP_DEG_1P25US = 0x02 << 4,   DRV8316_CTRL04_OCP_DEG_1P6US = 0x03 << 4,   DRV8316_CTRL04_OCP_CBC_DISABLE = 0x00 << 6,   DRV8316_CTRL04_OCP_CBC_ENABLE = 0x01 << 6,   DRV8316_CTRL04_DRV_OFF_NO_ACTION = 0x00 << 7,   DRV8316_CTRL04_DRV_OFF_LOW_POWER_MODE = 0x01 << 7 }
enum	DRV8316_CTRL05 {   DRV8316_CTRL05_CSA_GAIN_0P15VA = 0x00 << 0,   DRV8316_CTRL05_CSA_GAIN_0P3VA = 0x01 << 0,   DRV8316_CTRL05_CSA_GAIN_0P6VA = 0x02 << 0,   DRV8316_CTRL05_CSA_GAIN_1P2VA = 0x03 << 0,   DRV8316_CTRL05_EN_ASR_DISABLE = 0x00 << 2,   DRV8316_CTRL05_EN_ASR_ENABLE = 0x01 << 2,   DRV8316_CTRL05_EN_AAR_DISABLE = 0x00 << 3,   DRV8316_CTRL05_EN_AAR_ENABLE = 0x01 << 3,   DRV8316_CTRL05_ILIM_RECIR_BRAKE_MODE = 0x00 << 6,   DRV8316_CTRL05_ILIM_RECIR_COAST_MODE = 0x01 << 6 }
enum	DRV8316_CTRL06 {   DRV8316_CTRL06_BUCK_DIS_ENABLE = 0x00 << 0,   DRV8316_CTRL06_BUCK_DIS_DISABLE = 0x01 << 0,   DRV8316_CTRL06_BUCK_SEL_3P3V = 0x00 << 1,   DRV8316_CTRL06_BUCK_SEL_5P0V = 0x01 << 1,   DRV8316_CTRL06_BUCK_SEL_4P0V = 0x02 << 1,   DRV8316_CTRL06_BUCK_SEL_5P7V = 0x03 << 1,   DRV8316_CTRL06_BUCK_CL_600MA = 0x00 << 3,   DRV8316_CTRL06_BUCK_CL_150MA = 0x01 << 3,   DRV8316_CTRL06_BUCK_PS_DIS_ENABLE = 0x00 << 4,   DRV8316_CTRL06_BUCK_PS_DIS_DISABLE = 0x01 << 4 }
enum	DRV8316_CTRL10 {   DRV8316_CTRL10_DLY_TARGET_0P0US = 0x00 << 0,   DRV8316_CTRL10_DLY_TARGET_0P4US = 0x01 << 0,   DRV8316_CTRL10_DLY_TARGET_0P6US = 0x02 << 0,   DRV8316_CTRL10_DLY_TARGET_0P8US = 0x03 << 0,   DRV8316_CTRL10_DLY_TARGET_1P0US = 0x04 << 0,   DRV8316_CTRL10_DLY_TARGET_1P2US = 0x05 << 0,   DRV8316_CTRL10_DLY_TARGET_1P4US = 0x06 << 0,   DRV8316_CTRL10_DLY_TARGET_1P6US = 0x07 << 0,   DRV8316_CTRL10_DLY_TARGET_1P8US = 0x08 << 0,   DRV8316_CTRL10_DLY_TARGET_2P0US = 0x09 << 0,   DRV8316_CTRL10_DLY_TARGET_2P2US = 0x0A << 0,   DRV8316_CTRL10_DLY_TARGET_2P4US = 0x0B << 0,   DRV8316_CTRL10_DLY_TARGET_2P6US = 0x0C << 0,   DRV8316_CTRL10_DLY_TARGET_2P8US = 0x0D << 0,   DRV8316_CTRL10_DLY_TARGET_3P0US = 0x0E << 0,   DRV8316_CTRL10_DLY_TARGET_3P2US = 0x0F << 0,   DRV8316_CTRL10_DLYCMP_EN_DISABLE = 0x00 << 4,   DRV8316_CTRL10_DLYCMP_EN_ENABLE = 0x01 << 4 }
enum	DRV8316_SPI {   DRV8316_SPI_READ = 1 << 15,   DRV8316_SPI_WRITE = 0 << 15 }
enum	DRV8316_ADDR {   DRV8316_ADDR_STAT_IC = 0x0,   DRV8316_ADDR_STAT_1 = 0x1,   DRV8316_ADDR_STAT_2 = 0x2,   DRV8316_ADDR_CTRL_1 = 0x3,   DRV8316_ADDR_CTRL_2 = 0x4,   DRV8316_ADDR_CTRL_3 = 0x5,   DRV8316_ADDR_CTRL_4 = 0x6,   DRV8316_ADDR_CTRL_5 = 0x7,   DRV8316_ADDR_CTRL_6 = 0x8,   DRV8316_ADDR_CTRL_10 = 0xC }
enum	DRV8316_CSAGAIN {   DRV8316_CSAGAIN_0P15VA = 0x00 << 0,   DRV8316_CSAGAIN_0P3VA = 0x01 << 0,   DRV8316_CSAGAIN_0P6VA = 0x02 << 0,   DRV8316_CSAGAIN_1P2VA = 0x03 << 0 }
enum	DRV8316_DRVOFF_PIN_STAT {   DRV8316_DRVOFF_PIN_LOW = HAL_GPIO_PIN_LOW,   DRV8316_DRVOFF_PIN_HIGH = HAL_GPIO_PIN_HIGH }
enum	DRV8316_DRV_NSLEEP_STAT {   DRV8316_DRV_NSLEEP_SLEEP = HAL_GPIO_PIN_LOW,   DRV8316_DRV_NSLEEP_AWAKE = HAL_GPIO_PIN_HIGH }

Functions
__STATIC_INLINE void	DRV8316_setDrvoff (DRV8316_Instance *drvHandle, DRV8316_DRVOFF_PIN_STAT value)
	set drvoff More...
__STATIC_INLINE void	DRV8316_setnSleep (DRV8316_Instance *drvHandle, DRV8316_DRV_NSLEEP_STAT value)
	set nSleep More...
void	DRV8316_init (DRV8316_Instance *drvHandle)
	initialize the drv8316 module More...
uint16_t	DRV8316_SPIWrite (DRV8316_Instance *drvHandle, DRV8316_ADDR addr, uint8_t data)
	write data to spi More...
uint16_t	DRV8316_SPIRead (DRV8316_Instance *drvHandle, DRV8316_ADDR addr)
	write data to spi More...
void	DRV8316_enable (DRV8316_Instance *drvHandle)
	Enable DRV. More...
void	DRV8316_updateCTRLRegs (DRV8316_Instance *drvHandle, DRV8316_ADDR regAddr, uint16_t value, uint16_t mask)
	update the drv registers More...
void	DRV8316_updateCSAScaleFactor (DRV8316_Instance *drvHandle, DRV8316_CSAGAIN csa)
	updates the current gain scale factor More...
_iq20	DRV8316_getVoltage (HAL_ADC_CHAN chan)
	Get voltage from adc channel. More...
_iq20	DRV8316_getCurrent (HAL_ADC_CHAN chan, DRV8316_Instance *drvHandle, _iq20 vRef)
	Get current from adc channel. More...
void	DRV8316_ADCVRefSel (HAL_ADC_VREF adcRef, HAL_ADC_CHAN chan, HAL_ADC_INT_VREF internalVRef, uint16_t externalVRef)
	updates the adc voltage reference More...
__STATIC_INLINE void	DRV8316_updateSPICsagain (DRV8316_Instance *drvHandle, DRV8316_CSAGAIN csaGain)
	Update the SPI CSA gain register. More...
__STATIC_INLINE void	DRV8316_unlockRegs (DRV8316_Instance *drvHandle)
	unlock all registers More...
__STATIC_INLINE void	DRV8316_clearfaultBit (DRV8316_Instance *drvHandle)
	clear the status registers More...
__STATIC_INLINE _iq20	DRV8316_getcsaVref (uint16_t vRef)
	get Current reference in IQ20 More...

Detailed Description

Enumeration Type Documentation

DRV8316_CTRL01_MASK

enum DRV8316_CTRL01_MASK

Enumerator
DRV8316_CTRL01_MASK_REG_LOCK	Defines the mask for clear fault bit.

DRV8316_CTRL02_MASK

enum DRV8316_CTRL02_MASK

Enumerator
DRV8316_CTRL02_MASK_CLR_FLT	Defines the mask for clear fault bit.
DRV8316_CTRL02_MASK_PWM_MODE	Defines the mask for pwm mode selection bit.
DRV8316_CTRL02_MASK_SLEW	Defines the mask for slew rate selection bit.
DRV8316_CTRL02_MASK_SDO_MODE	Defines the mask for SDO mode selection bit.

DRV8316_CTRL03_MASK

enum DRV8316_CTRL03_MASK

Enumerator
DRV8316_CTRL03_MASK_OTW_REP	Defines the mask for over temp warning bit.
DRV8316_CTRL03_MASK_OVP_EN	Defines the mask for over voltage protection enable bit.
DRV8316_CTRL03_MASK_OVP_SEL	Defines the mask for over voltage protection level setting bit.
DRV8316_CTRL03_MASK_PWM_100_DUTY_SEL	Defines the mask for frequency selection bit.

DRV8316_CTRL04_MASK

enum DRV8316_CTRL04_MASK

Enumerator
DRV8316_CTRL04_MASK_OCP_MODE	Defines the mask for over current protection mode selection bit.
DRV8316_CTRL04_MASK_OCP_LVL	Defines the mask for over current protection level setting bit.
DRV8316_CTRL04_MASK_OCP_RETRY	Defines the mask for over current protection retry time setting bit.
DRV8316_CTRL04_MASK_OCP_DEG	Defines the mask for over current protection deglitch time setting bit.
DRV8316_CTRL04_MASK_OCP_CBC	Defines the mask for over current protection pwm cycle operation bit.
DRV8316_CTRL04_MASK_DRV_OFF	Defines the mask for drvoff bit.

DRV8316_CTRL05_MASK

enum DRV8316_CTRL05_MASK

Enumerator
DRV8316_CTRL05_MASK_CSA_GAIN	Defines the mask for CSA gain setting bit.
DRV8316_CTRL05_MASK_EN_ASR	Defines the mask for Active Synchronous Rectification Enable bit.
DRV8316_CTRL05_MASK_EN_AAR	Defines the mask for Active Asynshronous Rectification Enable bit.
DRV8316_CTRL05_MASK_ILIM_RECIR	Defines the mask for Current Limit Recirculation Settings bit.

DRV8316_CTRL06_MASK

enum DRV8316_CTRL06_MASK

Enumerator
DRV8316_CTRL06_MASK_BUCK_DIS	Defines the mask for buck disable bit.
DRV8316_CTRL06_MASK_BUCK_SEL	Defines the mask for buck voltage selection bit.
DRV8316_CTRL06_MASK_BUCK_CL	Defines the mask for buck current limit setting bit.
DRV8316_CTRL06_MASK_BUCK_PS_DIS	Defines the mask for buck power sequence disable bit.

DRV8316_CTRL10_MASK

enum DRV8316_CTRL10_MASK

Enumerator
DRV8316_CTRL10_MASK_DLY_TARGET	Defines the mask for delay target bit.
DRV8316_CTRL10_MASK_DLYCMP_EN	Defines the mask for driver delay compensation enable bit.

DRV8316_CTRL01

enum DRV8316_CTRL01

Enumerator
DRV8316_CTRL01_REG_UNLOCK	unlock all registers
DRV8316_CTRL01_REG_LOCK	lock all registers

DRV8316_CTRL02

enum DRV8316_CTRL02

Enumerator
DRV8316_CTRL02_CLR_FLT	clear the latched faults
DRV8316_CTRL02_PWMMODE_6x	set 6x pwm mode
DRV8316_CTRL02_PWMMODE_6x_CL	set 6x pwm mode with current limit
DRV8316_CTRL02_PWMMODE_3x	set 3x pwm mode
DRV8316_CTRL02_PWMMODE_3x_CL	set 3x pwm mode with current limit
DRV8316_CTRL02_SLEWRATE_25	set slew rate to 25V/us
DRV8316_CTRL02_SLEWRATE_50	set slew rate to 50V/us
DRV8316_CTRL02_SLEWRATE_125	set slew rate to 125V/us
DRV8316_CTRL02_SLEWRATE_200	set slew rate to 200V/us
DRV8316_CTRL02_SDO_OPEN_DRAIN_MODE	set SDO in open drain mode
DRV8316_CTRL02_SDO_PUSH_PULL_MODE	set SDO in push pull mode

DRV8316_CTRL03

enum DRV8316_CTRL03

Enumerator
DRV8316_CTRL03_OTW_REP_DISABLE	Disable over temperature warning.
DRV8316_CTRL03_OTW_REP_ENABLE	Enable over temperature warning.
DRV8316_CTRL03_OVP_DISABLE	Disable over voltage protection.
DRV8316_CTRL03_OVP_ENABLE	Enable over voltage protection.
DRV8316_CTRL03_OVP_SEL_34V	over voltage protection limit set to 34V
DRV8316_CTRL03_OVP_SEL_22V	over voltage protection limit set to 22V
DRV8316_CTRL03_PWM_20KHZ	PMW Freq at 100% duty is set to 20KHz.
DRV8316_CTRL03_PWM_40KHZ	PMW Freq at 100% duty is set to 40KHz.

DRV8316_CTRL04

enum DRV8316_CTRL04

Enumerator
DRV8316_CTRL04_OCP_LATCHED	set over current fault to latched
DRV8316_CTRL04_OCP_AUTO_RETRY	set over current fault to automatic retry
DRV8316_CTRL04_OCP_REPORT	report over current fault
DRV8316_CTRL04_OCP_DISABLE	disable over current fault
DRV8316_CTRL04_OCP_LVL_16A	set over current protection level to 16A
DRV8316_CTRL04_OCP_LVL_24A	set over current protection level to 24A
DRV8316_CTRL04_OCP_RETRY_5MS	set over current protection retry time to 5ms
DRV8316_CTRL04_OCP_RETRY_500MS	set over current protection retry time to 500ms
DRV8316_CTRL04_OCP_DEG_0P2US	set over current protection deglitch time to 0.2us
DRV8316_CTRL04_OCP_DEG_0P6US	set over current protection deglitch time to 0.6us
DRV8316_CTRL04_OCP_DEG_1P25US	set over current protection deglitch time to 1.25us
DRV8316_CTRL04_OCP_DEG_1P6US	set over current protection deglitch time to 1.6us
DRV8316_CTRL04_OCP_CBC_DISABLE	set over current protection pwm cycle operation dsiable
DRV8316_CTRL04_OCP_CBC_ENABLE	set over current protection pwm cycle operation enable
DRV8316_CTRL04_DRV_OFF_NO_ACTION	enable DRV
DRV8316_CTRL04_DRV_OFF_LOW_POWER_MODE	enter DRV into low power mode

DRV8316_CTRL05

enum DRV8316_CTRL05

Enumerator
DRV8316_CTRL05_CSA_GAIN_0P15VA	set CSAGAIN to 0.15V/A
DRV8316_CTRL05_CSA_GAIN_0P3VA	set CSAGAIN to 0.3V/A
DRV8316_CTRL05_CSA_GAIN_0P6VA	set CSAGAIN to 0.6V/A
DRV8316_CTRL05_CSA_GAIN_1P2VA	set CSAGAIN to 1.2V/A
DRV8316_CTRL05_EN_ASR_DISABLE	disable Active synchronous rectification
DRV8316_CTRL05_EN_ASR_ENABLE	enable Active synchronous rectification
DRV8316_CTRL05_EN_AAR_DISABLE	disable Active asynchronous rectification
DRV8316_CTRL05_EN_AAR_ENABLE	enable Active asynchronous rectification
DRV8316_CTRL05_ILIM_RECIR_BRAKE_MODE	set braking type to brake mode
DRV8316_CTRL05_ILIM_RECIR_COAST_MODE	set braking type to coast mode

DRV8316_CTRL06

enum DRV8316_CTRL06

Enumerator
DRV8316_CTRL06_BUCK_DIS_ENABLE	enable buck regulator
DRV8316_CTRL06_BUCK_DIS_DISABLE	disable buck regulator
DRV8316_CTRL06_BUCK_SEL_3P3V	set buck voltage selection to 3.3V
DRV8316_CTRL06_BUCK_SEL_5P0V	set buck voltage selection to 5.0V
DRV8316_CTRL06_BUCK_SEL_4P0V	set buck voltage selection to 4.0V
DRV8316_CTRL06_BUCK_SEL_5P7V	set buck voltage selection to 5.7V
DRV8316_CTRL06_BUCK_CL_600MA	set buck current limit to 600mA
DRV8316_CTRL06_BUCK_CL_150MA	set buck current limit to 150mA
DRV8316_CTRL06_BUCK_PS_DIS_ENABLE	enable buck power sequencing
DRV8316_CTRL06_BUCK_PS_DIS_DISABLE	disable buck power sequencing

DRV8316_CTRL10

enum DRV8316_CTRL10

Enumerator
DRV8316_CTRL10_DLY_TARGET_0P0US	Delay Target 0.0us.
DRV8316_CTRL10_DLY_TARGET_0P4US	Delay Target 0.4us.
DRV8316_CTRL10_DLY_TARGET_0P6US	Delay Target 0.6us.
DRV8316_CTRL10_DLY_TARGET_0P8US	Delay Target 0.8us.
DRV8316_CTRL10_DLY_TARGET_1P0US	Delay Target 1.0us.
DRV8316_CTRL10_DLY_TARGET_1P2US	Delay Target 1.2us.
DRV8316_CTRL10_DLY_TARGET_1P4US	Delay Target 1.4us.
DRV8316_CTRL10_DLY_TARGET_1P6US	Delay Target 1.6us.
DRV8316_CTRL10_DLY_TARGET_1P8US	Delay Target 1.8us.
DRV8316_CTRL10_DLY_TARGET_2P0US	Delay Target 2.0us.
DRV8316_CTRL10_DLY_TARGET_2P2US	Delay Target 2.2us.
DRV8316_CTRL10_DLY_TARGET_2P4US	Delay Target 2.4us.
DRV8316_CTRL10_DLY_TARGET_2P6US	Delay Target 2.6us.
DRV8316_CTRL10_DLY_TARGET_2P8US	Delay Target 2.8us.
DRV8316_CTRL10_DLY_TARGET_3P0US	Delay Target 3.0us.
DRV8316_CTRL10_DLY_TARGET_3P2US	Delay Target 3.2us.
DRV8316_CTRL10_DLYCMP_EN_DISABLE	disable driver delay compensation
DRV8316_CTRL10_DLYCMP_EN_ENABLE	enable driver delay compensation

DRV8316_SPI

enum DRV8316_SPI

Enumerator
DRV8316_SPI_READ	DRV8316 SPI read command.
DRV8316_SPI_WRITE	DRV8316 SPI write command.

DRV8316_ADDR

enum DRV8316_ADDR

Enumerator
DRV8316_ADDR_STAT_IC	Address of Static Register 0.
DRV8316_ADDR_STAT_1	Address of Static Register 1.
DRV8316_ADDR_STAT_2	Address of Static Register 2.
DRV8316_ADDR_CTRL_1	Address of Control Register 1.
DRV8316_ADDR_CTRL_2	Address of Control Register 2.
DRV8316_ADDR_CTRL_3	Address of Control Register 3.
DRV8316_ADDR_CTRL_4	Address of Control Register 4.
DRV8316_ADDR_CTRL_5	Address of Control Register 5.
DRV8316_ADDR_CTRL_6	Address of Control Register 6.
DRV8316_ADDR_CTRL_10	Address of Control Register 10.

DRV8316_CSAGAIN

enum DRV8316_CSAGAIN

Enumerator
DRV8316_CSAGAIN_0P15VA	Define DRV8316 CSA GAIN 0.15 Setting.
DRV8316_CSAGAIN_0P3VA	Define DRV8316 CSA GAIN 0.3 Setting.
DRV8316_CSAGAIN_0P6VA	Define DRV8316 CSA GAIN 0.6 Setting.
DRV8316_CSAGAIN_1P2VA	Define DRV8316 CSA GAIN 1.2 Setting.

DRV8316_DRVOFF_PIN_STAT

enum DRV8316_DRVOFF_PIN_STAT

Enumerator
DRV8316_DRVOFF_PIN_LOW	Define DRVOFF PIN LOW.
DRV8316_DRVOFF_PIN_HIGH	Define DRVOFF PIN HIGH.

DRV8316_DRV_NSLEEP_STAT

enum DRV8316_DRV_NSLEEP_STAT

Enumerator
DRV8316_DRV_NSLEEP_SLEEP	Define NSLEEP PIN LOW.
DRV8316_DRV_NSLEEP_AWAKE	Define NSLEEP PIN HIGH.

Function Documentation

DRV8316_setDrvoff()

__STATIC_INLINE void DRV8316_setDrvoff	(	DRV8316_Instance *	drvHandle,
		DRV8316_DRVOFF_PIN_STAT	value
	)

set drvoff

Parameters

[in]	drvHandle	The drv instance
[in]	value	drvoff value

References DRV8316_DRVOFF_PIN_HIGH, DRV8316_DRVOFF_PIN_LOW, DRV8316_Instance::drvoff, HAL_GPIO_PIN_HIGH, HAL_GPIO_PIN_LOW, and HAL_writeGPIOPin().

Referenced by DRV8316_enable().

DRV8316_setnSleep()

__STATIC_INLINE void DRV8316_setnSleep	(	DRV8316_Instance *	drvHandle,
		DRV8316_DRV_NSLEEP_STAT	value
	)

set nSleep

Parameters

[in]	drvHandle	The drv instance
[in]	value	nSleep value

References DRV8316_ADCVRefSel(), DRV8316_DRV_NSLEEP_AWAKE, DRV8316_DRV_NSLEEP_SLEEP, DRV8316_enable(), DRV8316_getCurrent(), DRV8316_getVoltage(), DRV8316_init(), DRV8316_MAXIMUM_WAKEUP_TIME, DRV8316_SPIRead(), DRV8316_SPIWrite(), DRV8316_updateCSAScaleFactor(), DRV8316_updateCTRLRegs(), HAL_delayMicroSeconds(), HAL_GPIO_PIN_HIGH, HAL_GPIO_PIN_LOW, HAL_writeGPIOPin(), and DRV8316_Instance::nsleep.

Referenced by DRV8316_enable().

DRV8316_init()

void DRV8316_init

(

DRV8316_Instance *

drvHandle

)

initialize the drv8316 module

Parameters

[in]

drvHandle

The drv instance

References DRV8316_ADDR_BIT_POSITION, DRV8316_INITIAL_PARITY, DRV8316_PARITY_BIT_POSITION, DRV8316_PARITY_CHECK, DRV8316_RIGHT_SHIFT_REGISTER, HAL_enableADCInterrupt(), HAL_readSPI16(), HAL_writeSPI16(), DRV8316_Instance::IsenA, DRV8316_Instance::IsenB, DRV8316_Instance::IsenC, DRV8316_Instance::Vsen, DRV8316_Instance::VsenA, DRV8316_Instance::VsenB, and DRV8316_Instance::VsenC.

Referenced by DRV8316_setnSleep().

DRV8316_SPIWrite()

uint16_t DRV8316_SPIWrite	(	DRV8316_Instance *	drvHandle,
		DRV8316_ADDR	addr,
		uint8_t	data
	)

write data to spi

Parameters

[in]	drvHandle	The drv instance
[in]	addr	SPI register address
[in]	data	data transmitted

Returns

Return

References DRV8316_SPI_WRITE, DRV8316_Instance::spiChan, and DRV8316_Instance::spiCs.

Referenced by DRV8316_setnSleep(), and DRV8316_updateCTRLRegs().

DRV8316_SPIRead()

uint16_t DRV8316_SPIRead	(	DRV8316_Instance *	drvHandle,
		DRV8316_ADDR	addr
	)

write data to spi

Parameters

[in]	drvHandle	The drv instance
[in]	addr	SPI register address

Returns

Return

References DRV8316_SPI_READ, DRV8316_Instance::spiChan, and DRV8316_Instance::spiCs.

Referenced by DRV8316_setnSleep(), and DRV8316_updateCTRLRegs().

DRV8316_enable()

void DRV8316_enable

(

DRV8316_Instance *

drvHandle

)

Enable DRV.

Parameters

[in]

drvHandle

The drv instance

References DRV8316_clearfaultBit(), DRV8316_DRV_NSLEEP_AWAKE, DRV8316_DRV_NSLEEP_SLEEP, DRV8316_DRVOFF_PIN_LOW, DRV8316_setDrvoff(), DRV8316_setnSleep(), and DRV8316_unlockRegs().

Referenced by DRV8316_setnSleep().

DRV8316_updateCTRLRegs()

void DRV8316_updateCTRLRegs	(	DRV8316_Instance *	drvHandle,
		DRV8316_ADDR	regAddr,
		uint16_t	value,
		uint16_t	mask
	)

update the drv registers

Parameters

[in]	drvHandle	The drv instance
[in]	regAddr	The register to be updated
[in]	value	new value of the bits to be updated
[in]	mask	mask for the bit to be updated

References DRV8316_SPIRead(), and DRV8316_SPIWrite().

Referenced by DRV8316_clearfaultBit(), DRV8316_setnSleep(), DRV8316_unlockRegs(), and DRV8316_updateSPICsagain().

DRV8316_updateCSAScaleFactor()

void DRV8316_updateCSAScaleFactor	(	DRV8316_Instance *	drvHandle,
		DRV8316_CSAGAIN	csa
	)

updates the current gain scale factor

Parameters

[in]	drvHandle	The drv instance
[in]	csa	DRV8316 CSA gain value

References DRV8316_Instance::csa_sf, DRV8316_CSAGAIN_0P15VA, DRV8316_CSAGAIN_0P15VA_IQ, DRV8316_CSAGAIN_0P3VA, DRV8316_CSAGAIN_0P3VA_IQ, DRV8316_CSAGAIN_0P6VA, DRV8316_CSAGAIN_0P6VA_IQ, DRV8316_CSAGAIN_1P2VA, and DRV8316_CSAGAIN_1P2VA_IQ.

Referenced by DRV8316_setnSleep().

DRV8316_getVoltage()

_iq20 DRV8316_getVoltage

(

HAL_ADC_CHAN

chan

)

Get voltage from adc channel.

Parameters

[in]

chan

The ADC channel name

Returns

Return

References DRV8316_VOLTAGE_CONV_CONST, and HAL_getIQ20VoltageFromADC().

Referenced by DRV8316_setnSleep().

DRV8316_getCurrent()

_iq20 DRV8316_getCurrent	(	HAL_ADC_CHAN	chan,
		DRV8316_Instance *	drvHandle,
		_iq20	vRef
	)

Get current from adc channel.

Parameters

[in]	chan	The ADC channel name
[in]	drvHandle	The drv instance
[in]	vRef	voltage reference for current

Returns

Return

References DRV8316_Instance::csa_sf, and HAL_getIQ20VoltageFromADC().

Referenced by DRV8316_setnSleep().

DRV8316_ADCVRefSel()

void DRV8316_ADCVRefSel	(	HAL_ADC_VREF	adcRef,
		HAL_ADC_CHAN	chan,
		HAL_ADC_INT_VREF	internalVRef,
		uint16_t	externalVRef
	)

updates the adc voltage reference

Parameters

[in]	adcRef	ADC voltage reference
[in]	chan	ADC channel name
[in]	internalVRef	Internal reference voltage
[in]	externalVRef	External reference voltage

References HAL_ADC_VREF_EXTERNAL, HAL_ADC_VREF_INTERNAL, HAL_ADC_VREF_VDDA, HAL_setADCVRefExternal(), HAL_setADCVRefInternal(), and HAL_setADCVRefVDDA().

Referenced by DRV8316_setnSleep().

DRV8316_updateSPICsagain()

__STATIC_INLINE void DRV8316_updateSPICsagain	(	DRV8316_Instance *	drvHandle,
		DRV8316_CSAGAIN	csaGain
	)

Update the SPI CSA gain register.

Parameters

[in]	drvHandle	The drv instance
[in]	csaGain	The CSA gain value

References DRV8316_ADDR_CTRL_5, DRV8316_CTRL05_MASK_CSA_GAIN, and DRV8316_updateCTRLRegs().

DRV8316_unlockRegs()

__STATIC_INLINE void DRV8316_unlockRegs

(

DRV8316_Instance *

drvHandle

)

unlock all registers

Parameters

[in]

drvHandle

The drv instance

References DRV8316_ADDR_CTRL_1, DRV8316_CTRL01_MASK_REG_LOCK, DRV8316_CTRL01_REG_UNLOCK, and DRV8316_updateCTRLRegs().

Referenced by DRV8316_enable().

DRV8316_clearfaultBit()

__STATIC_INLINE void DRV8316_clearfaultBit

(

DRV8316_Instance *

drvHandle

)

clear the status registers

Parameters

[in]

drvHandle

The drv instance

References DRV8316_ADDR_CTRL_2, DRV8316_CTRL02_CLR_FLT, DRV8316_CTRL02_MASK_CLR_FLT, and DRV8316_updateCTRLRegs().

Referenced by DRV8316_enable().

DRV8316_getcsaVref()

__STATIC_INLINE _iq20 DRV8316_getcsaVref

(

uint16_t

vRef

)

get Current reference in IQ20

Parameters

[in]

vRef

CSA reference voltage in milli volts

Returns

_iq20 CSA reference voltage in _iq20 format