Universal FOC - DRV8316 Gate Driver User Guide

This User Guide outlines the usage of DRV8316 gate driver along with the FOC Application running on MSPM0.

1. Hardware Required

  • LP-MSPM0G3507 - MSPM0G3507 Launchpad

  • LP-MSPM0G3519 - MSPM0G3519 Launchpad

  • DRV8316REVM - The DRV8316REVM provides three half-H-bridge integrated MOSFET drivers for driving a three-phase brushless DC (BLDC) motor with 8-A Peak current drive, for 12-V/24-V DC rails or battery powered applications.

  • DC Power supply that supports the required voltage and current

  • Brushless-DC Motor

  • Micro-USB cable

2. Hardware Setup

  1. Remove the PA26 jumper J18 in the LP-MSPM0G3507 as shown below.

J18 header removed in LP-MSPM0G3507

Fig. 23 J18 header removed in LP-MSPM0G3507

  1. Connect the LP-MSPM0G3507/LP-MSPM0G3519 to the DRV8316REVM in one of two ways:

    • 1 Plug the connectors J3 and J4 of the DRV8316REVM to the top of the connectors J3/J4 of the LP-MSPM0G3507/MSPM0G3519.

      • In case of LP-MSPM0G3507 an additional connection need to be made from ISENB in DRV8316REVM to the PA25.

      • In case of LP-MSPM0G3519 additional connection need to be made from ISENB to PA14 & ISENC to PA25.

    • 2 If using the jumper wires, connect as shown in the table below. Refer to the schematic of J3 and J4 connector pinout on DRV8316REVM for the location of the signals.

      Connection

      MSPM0G3507

      MSPM0G3519

      DRV8316REVM

      Phase A HS input

      PB4

      PB3

      INHA

      Phase A LS input

      PB1

      PB9

      INLA

      Phase B HS input

      PA28

      PC4

      INHB

      Phase B LS input

      PA31

      PC5

      INLB

      Phase C HS input

      PB20

      PB4

      INHC

      Phase C LS input

      PB13

      PB5

      INLC

      Serial clock input

      PB9

      PB31

      SCLK

      Serial Data/Peripheral input

      PB8

      PB8

      SDI

      Serial Data/Peripheral output

      PB7

      PB7

      SDO

      Chip Select

      PB12

      PA7

      nSCS

      Bus voltage input

      PA18

      PB25

      VSENVM

      Phase A current input

      PA24

      PB26

      ISENA

      Phase B current input 1

      PA25

      PB27

      ISENB

      Phase B current input 2

      PA17

      PA14

      ISENB

      Phase C current input

      PA16

      PA25

      ISENC

      Phase A Voltage input

      PB19

      PA27

      VSENA

      Phase B Voltage input

      PA22

      PA26

      VSENB

      Phase C Voltage input

      PB18

      PB24

      VSENC

      Fault Input

      PA27

      PB30

      nFAULT

      DRV Enable output

      PB6

      PB12

      DRVOFF

      DRV Sleep

      PB2

      PC2

      nSLEEP

      Controller Fault Output

      PB16

      PB14

      LED

      Common Ground

      GND

      GND

      GND

      UART TX

      PA26

      PA9

      TX

      UART RX

      PA13

      PA8

      RX
DRV8316REVM J3 and J4 connector pinout

Fig. 24 DRV8316REVM J3 and J4 connector pinout

Note: There are two Phase B current inputs used because we use simultaneous current sampling, Refer to ‘Enabling simultaneous current sampling’ in FOC Library Overview.

  1. Remove the black jumper connector in HAL_PWR_SEL and VREF/ILIM, and make the red color connection as below shown using a jumper wire. This connection is to make the ADC reference as 3.3V.

DRV8316EVM ADC INPUT

Fig. 25 DRV8316EVM ADC INPUT

  1. Connect the 3 phases of the BLDC motor to A/B/C of connector J6 on the DRV8316REVM.

  2. Connect the positive and negative of the power supply to VM and GND of the power connector terminal block.

  3. Set the power supply to a motor voltage between 6V to 24V within the DRV8316R specifications and a 5-A current limit.

  4. Connect a Micro-USB cable from the MSPM0G launchpad to the PC.

  5. Once all steps are completed, you can start to run the motor. Please refer to Software User Guide or FOC Tuning Guide

3. Gatedriver Register Configurations

Universal FOC application FW periodically configures the gate driver registers using SPI. The gatedriverInterface sub folder in the Hal directory provides users ability to add the custom gate driver functions.

The gatedriver register configurations defined under HV_DIE_EEPROM_INTERFACE_T in the DRV8316.h file are periodically updated using the API : gateDriverParamsUpdate() when the motor is not spinning. Below are the gate driver register settings available for user configuration.

Note: some of the register settings are not applicable for FOC Application FW and shouldn’t be altered from the default values.

gateDrvCfg1 configurations

Bit Field

Bit Definition

csaGain

Current Sense Amplifier (CSA) gain

enASR

Not Applicable for FOC FW / Not to be configured

enAAR

Not Applicable for FOC FW / Not to be configured

IlimRecir

Not Applicable for FOC FW/ Not to be configured

bemfThr

Not Applicable for FOC FW/ Not to be configured

ocpMode

OCP fault mode configuration

ocpLvl

Overcurrent Level Setting

ocpRetry

OCP Retry Time Settings

cbcDeg

Not Applicable for FOC FW/ Not to be configured

ocpCBC

Not Applicable for FOC FW/ Not to be configured

drvOff

Bit to turn off the Gate Driver

otwRep

Bit to turn on the OTW reporting

ovpEn

Overvoltage Enable Bit

ovpSel

Overvoltage Level Setting

pwm100DutySel

Not Applicable for FOC FW / Not to be configured

disRR

Not Applicable for FOC FW / Not to be configured

halfRR

Not Applicable for FOC FW / Not to be configured

clrFLT

Clears the Gate Driver Faults

pwmMode

Not Applicable for FOC FW / Not to be configured

slewRate

Not Applicable for FOC FW / Not to be configured

gateDrvCfg2 configurations

Bit Field

Bit Definition

minOnTime

Not Applicable for FOC FW / Not to be configured

buckDis

Buck Disable Bit

buckSel

Buck Voltage Selection

buckCl

Buck Current Limit Setting

buckPsDis

Buck Power Sequencing Disable Bit

buckSr

Buck Slew Rate

targetDelay

Not Applicable for FOC FW / Not to be configured

delayCompEn

Not Applicable for FOC FW / Not to be configured

Note: User would need to program the currentBase in the System parameters based on the CSA Gain configured in the gate driver.