uart_comm.h

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/*!****************************************************************************
 *  @file       uart_comm.h
 *  @brief      UART communication Module
 *
 * 
 *  @anchor uart_comm
 *  # Overview
 *
 *  APIs for UART communication module
 *
 *  <hr>
 ******************************************************************************/

#ifndef UART_COMM_H_
#define UART_COMM_H_

#include "ti_msp_dl_config.h"
#include <stdbool.h>

#ifdef __cplusplus
extern "C" {
#endif

/* FRAME STRUCTURE */
#define PREAMBLE_BYTE               (0xFE)

#define PREAMBLE_BYTE_SIZE          (0)

#define TARGET_ADDR                  (0xAD)

#define BROADCAST_ADDR              (0xFF)

/* SOF */
#define START_IDX                   (0)

#define START_BYTE_SIZE             (1)

#define FRAME_START_BYTE            (0x68)

/* Target Address */
#define TARGET_ADDR_IDX              (START_IDX + START_BYTE_SIZE)

#define TARGET_ADDR_SIZE             (1)

/* Control Byte */
#define CTRL_IDX                     (TARGET_ADDR_IDX + TARGET_ADDR_SIZE)

#define CTRL_SIZE                    (1)

#define CMD_MASK                     (0x80)

#define CRC_MASK                     (0x40)

#define LEN_MASK                     (0x1F)

#define WRITE_CMD                    (0x80)

#define READ_CMD                     (0x00)

#define HEADER_SIZE                 (START_BYTE_SIZE + TARGET_ADDR_SIZE + CTRL_SIZE)

/* Memory Address */
#define MEM_ADDR_IDX                (CTRL_IDX + CTRL_SIZE)

#define MEM_ADDR_SIZE               (4)

#define MEM_ADDR_RANGE_START        (0x0)

#define MEM_ADDR_RANGE_END          (0xFFFFFFFF)

/* Data */
#define DATA_IDX                    (MEM_ADDR_IDX + MEM_ADDR_SIZE)

#define MAX_DATA_SIZE               (32)

#define ACK_WRITE                   (0xAC)

/* OFFSET is from the end of frame */
/* CRC */
#define CRC_OFFSET                  (END_OFFSET + CRC_SIZE)

#define CRC_SIZE                    (2)

/* EOF */
#define END_OFFSET                  (1)

#define FRAME_END_BYTE              (0x16)

#define END_BYTE_SIZE               (1)


/* TRAILER */

#define TRAILER_SIZE                (END_BYTE_SIZE)

#define MAX_BUFFER_SIZE             (HEADER_SIZE + MEM_ADDR_SIZE + MAX_DATA_SIZE + CRC_SIZE + TRAILER_SIZE)

#define ERROR_OFFSET                (7)      

#define DMA_RX_TRANSFER_SIZE        (71)

typedef struct{
    _Alignas(uint32_t) uint8_t buffer[MAX_BUFFER_SIZE];
    uint8_t ptr;
    uint8_t len;
} BufferInfo;

typedef enum 
{
    UART_STATUS_IDLE = 0,
    UART_STATUS_RX_BUFFERING,
    UART_STATUS_PROCESS_FRAME,
    UART_STATUS_TX_TRANSMITTING
} UART_Status;

typedef enum
{
    ERROR_NONE          = 0x00,
    ERROR_MISMATCH_START_BYTE = 0xE1,
    ERROR_MISMATCH_END_BYTE = 0xE2,
    ERROR_ADDR_RANGE      = 0xE3,
    ERROR_MISMATCH_CRC = 0xE4,
    ERROR_MISMATCH_TARGET_ADDR = 0xE5
} ErrorType;

typedef struct
{
    BufferInfo txMsg;
    BufferInfo rxMsg;

    uint8_t dataLen;
    _Bool isCrc;

    UART_Status status;
    ErrorType error;
} UART_Instance;

extern UART_Instance *pUART;

void UART_init(UART_Instance *UART_handle);

void UART_checkForCommand(UART_Instance *UART_handle);

void UART_getFrameLength(UART_Instance *UART_handle);

void DMA_RX_init(UART_Instance *UART_handle);

#ifdef __cplusplus
}
#endif
#endif /* UART_COMM_H_ */