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MSPM0C110X Driver Library
2.05.01.00
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Modules | |
| DL_UART_INTERRUPT | |
| DL_UART_DMA_INTERRUPT_RX | |
| DL_UART_ERROR | |
Data Structures | |
| struct | DL_UART_Config |
| Configuration struct for DL_UART_init. More... | |
| struct | DL_UART_ClockConfig |
| Configuration struct for DL_UART_setClockConfig. More... | |
| struct | DL_UART_Main_backupConfig |
| Configuration structure to backup UART Main peripheral state before going to STOP/STANDBY mode. Used by DL_UART_Main_saveConfiguration and DL_UART_Main_restoreConfiguration. More... | |
| struct | DL_UART_Extend_backupConfig |
| Configuration structure to backup UART Extend peripheral state before going to STOP/STANDBY mode. Used by DL_UART_Extend_saveConfiguration and DL_UART_Extend_restoreConfiguration. More... | |
Macros | |
| #define | DL_UART_DMA_INTERRUPT_TX (UART_DMA_TRIG_TX_IMASK_TXINT_SET) |
| UART interrupt for enabling UART transmit as DMA trigger. | |
| #define | DL_UART_DMA_DONE_INTERRUPT_TX (UART_CPU_INT_IMASK_DMA_DONE_TX_SET) |
| UART interrupt indicating DMA is done with the TX. | |
| #define | DL_UART_PULSE_WIDTH_3_16_BIT_PERIOD ((uint32_t) 0x00000000U) |
| Sets the IrDA pulse width to 3/16 bit period when using the BITCLK16. | |
Enumerations | |
| enum | DL_UART_IIDX { DL_UART_IIDX_DMA_DONE_TX = UART_CPU_INT_IIDX_STAT_DMA_DONE_TX, DL_UART_IIDX_DMA_DONE_RX = UART_CPU_INT_IIDX_STAT_DMA_DONE_RX, DL_UART_IIDX_CTS_DONE = UART_CPU_INT_IIDX_STAT_CTS, DL_UART_IIDX_ADDRESS_MATCH = UART_CPU_INT_IIDX_STAT_MODE_9B, DL_UART_IIDX_EOT_DONE = UART_CPU_INT_IIDX_STAT_EOT, DL_UART_IIDX_TX = UART_CPU_INT_IIDX_STAT_TXIFG, DL_UART_IIDX_RX = UART_CPU_INT_IIDX_STAT_RXIFG, DL_UART_IIDX_LIN_COUNTER_OVERFLOW = UART_CPU_INT_IIDX_STAT_LINOVF, DL_UART_IIDX_LIN_RISING_EDGE = UART_CPU_INT_IIDX_STAT_LINC1, DL_UART_IIDX_LIN_FALLING_EDGE = UART_CPU_INT_IIDX_STAT_LINC0, DL_UART_IIDX_RXD_POS_EDGE = UART_CPU_INT_IIDX_STAT_RXPE, DL_UART_IIDX_RXD_NEG_EDGE = UART_CPU_INT_IIDX_STAT_RXNE, DL_UART_IIDX_OVERRUN_ERROR = UART_CPU_INT_IIDX_STAT_OEFG, DL_UART_IIDX_BREAK_ERROR = UART_CPU_INT_IIDX_STAT_BEFG, DL_UART_IIDX_PARITY_ERROR = UART_CPU_INT_IIDX_STAT_PEFG, DL_UART_IIDX_FRAMING_ERROR = UART_CPU_INT_IIDX_STAT_FEFG, DL_UART_IIDX_RX_TIMEOUT_ERROR = UART_CPU_INT_IIDX_STAT_RTFG, DL_UART_IIDX_NOISE_ERROR = UART_CPU_INT_IIDX_STAT_NERR_EVT, DL_UART_IIDX_NO_INTERRUPT = UART_CPU_INT_IIDX_STAT_NO_INTR } |
| enum | DL_UART_DMA_IIDX_RX { DL_UART_DMA_IIDX_RX_TRIGGER = UART_DMA_TRIG_RX_IIDX_STAT_RXIFG, DL_UART_DMA_IIDX_RX_TIMEOUT_TRIGGER = UART_DMA_TRIG_RX_IIDX_STAT_RTFG } |
| enum | DL_UART_DMA_IIDX_TX { DL_UART_DMA_IIDX_TX_TRIGGER = UART_DMA_TRIG_TX_IIDX_STAT_TXIFG } |
| enum | DL_UART_PULSE_WIDTH { DL_UART_PULSE_WIDTH_5_NS = UART_GFCTL_AGFSEL_AGLIT_5, DL_UART_PULSE_WIDTH_10_NS = UART_GFCTL_AGFSEL_AGLIT_10, DL_UART_PULSE_WIDTH_25_NS = UART_GFCTL_AGFSEL_AGLIT_25, DL_UART_PULSE_WIDTH_50_NS = UART_GFCTL_AGFSEL_AGLIT_50 } |
| enum | DL_UART_OVERSAMPLING_RATE { DL_UART_OVERSAMPLING_RATE_16X = UART_CTL0_HSE_OVS16, DL_UART_OVERSAMPLING_RATE_8X = UART_CTL0_HSE_OVS8, DL_UART_OVERSAMPLING_RATE_3X = UART_CTL0_HSE_OVS3 } |
| enum | DL_UART_PARITY { DL_UART_PARITY_EVEN = (UART_LCRH_PEN_ENABLE | UART_LCRH_EPS_EVEN), DL_UART_PARITY_ODD = (UART_LCRH_PEN_ENABLE | UART_LCRH_EPS_ODD), DL_UART_PARITY_STICK_ONE = (UART_LCRH_PEN_ENABLE | UART_LCRH_SPS_ENABLE | UART_LCRH_EPS_ODD), DL_UART_PARITY_STICK_ZERO = (UART_LCRH_PEN_ENABLE | UART_LCRH_SPS_ENABLE | UART_LCRH_EPS_EVEN), DL_UART_PARITY_NONE = UART_LCRH_PEN_DISABLE } |
| enum | DL_UART_WORD_LENGTH { DL_UART_WORD_LENGTH_5_BITS = UART_LCRH_WLEN_DATABIT5, DL_UART_WORD_LENGTH_6_BITS = UART_LCRH_WLEN_DATABIT6, DL_UART_WORD_LENGTH_7_BITS = UART_LCRH_WLEN_DATABIT7, DL_UART_WORD_LENGTH_8_BITS = UART_LCRH_WLEN_DATABIT8 } |
| enum | DL_UART_MODE { DL_UART_MODE_NORMAL = UART_CTL0_MODE_UART, DL_UART_MODE_RS485 = UART_CTL0_MODE_RS485, DL_UART_MODE_IDLE_LINE = UART_CTL0_MODE_IDLELINE, DL_UART_MODE_ADDR_9_BIT = UART_CTL0_MODE_ADDR9BIT, DL_UART_MODE_SMART_CARD = UART_CTL0_MODE_SMART, DL_UART_MODE_DALI = UART_CTL0_MODE_DALI } |
| enum | DL_UART_DIRECTION { DL_UART_DIRECTION_TX = UART_CTL0_TXE_ENABLE, DL_UART_DIRECTION_RX = UART_CTL0_RXE_ENABLE, DL_UART_DIRECTION_TX_RX = (UART_CTL0_RXE_ENABLE | UART_CTL0_TXE_ENABLE), DL_UART_DIRECTION_NONE = (UART_CTL0_RXE_DISABLE | UART_CTL0_TXE_DISABLE) } |
| enum | DL_UART_CLOCK { DL_UART_CLOCK_BUSCLK = UART_CLKSEL_BUSCLK_SEL_ENABLE, DL_UART_CLOCK_MFCLK = UART_CLKSEL_MFCLK_SEL_ENABLE, DL_UART_CLOCK_LFCLK = UART_CLKSEL_LFCLK_SEL_ENABLE } |
| enum | DL_UART_FLOW_CONTROL { DL_UART_FLOW_CONTROL_RTS = UART_CTL0_RTSEN_ENABLE, DL_UART_FLOW_CONTROL_CTS = UART_CTL0_CTSEN_ENABLE, DL_UART_FLOW_CONTROL_RTS_CTS = (UART_CTL0_RTSEN_ENABLE | UART_CTL0_CTSEN_ENABLE), DL_UART_FLOW_CONTROL_NONE = (UART_CTL0_CTSEN_DISABLE | UART_CTL0_RTSEN_DISABLE) } |
| enum | DL_UART_RTS { DL_UART_RTS_ASSERT = UART_CTL0_RTS_SET, DL_UART_RTS_DEASSERT = UART_CTL0_RTS_CLR } |
| enum | DL_UART_STOP_BITS { DL_UART_STOP_BITS_ONE = UART_LCRH_STP2_DISABLE, DL_UART_STOP_BITS_TWO = UART_LCRH_STP2_ENABLE } |
| enum | DL_UART_TXD_OUT { DL_UART_TXD_OUT_LOW = UART_CTL0_TXD_OUT_LOW, DL_UART_TXD_OUT_HIGH = UART_CTL0_TXD_OUT_HIGH } |
| enum | DL_UART_TX_FIFO_LEVEL { DL_UART_TX_FIFO_LEVEL_3_4_EMPTY = UART_IFLS_TXIFLSEL_LVL_3_4, DL_UART_TX_FIFO_LEVEL_1_2_EMPTY = UART_IFLS_TXIFLSEL_LVL_1_2, DL_UART_TX_FIFO_LEVEL_1_4_EMPTY = UART_IFLS_TXIFLSEL_LVL_1_4, DL_UART_TX_FIFO_LEVEL_EMPTY = UART_IFLS_TXIFLSEL_LVL_EMPTY, DL_UART_TX_FIFO_LEVEL_ONE_ENTRY = UART_IFLS_TXIFLSEL_LVL_1 } |
| enum | DL_UART_RX_FIFO_LEVEL { DL_UART_RX_FIFO_LEVEL_ONE_ENTRY = UART_IFLS_RXIFLSEL_LVL_1, DL_UART_RX_FIFO_LEVEL_FULL = UART_IFLS_RXIFLSEL_LVL_FULL, DL_UART_RX_FIFO_LEVEL_3_4_FULL = UART_IFLS_RXIFLSEL_LVL_3_4, DL_UART_RX_FIFO_LEVEL_1_2_FULL = UART_IFLS_RXIFLSEL_LVL_1_2, DL_UART_RX_FIFO_LEVEL_1_4_FULL = UART_IFLS_RXIFLSEL_LVL_1_4 } |
| enum | DL_UART_IRDA_CLOCK { DL_UART_IRDA_CLOCK_BAUD_RATE = UART_IRCTL_IRTXCLK_BRCLK, DL_UART_IRDA_CLOCK_FUNCTIONAL = UART_IRCTL_IRTXCLK_BITCLK } |
| enum | DL_UART_IRDA_POLARITY { DL_UART_IRDA_POLARITY_LOW = UART_IRCTL_IRRXPL_LOW, DL_UART_IRDA_POLARITY_HIGH = UART_IRCTL_IRRXPL_HIGH } |
| enum | DL_UART_CLOCK_DIVIDE_RATIO { DL_UART_CLOCK_DIVIDE_RATIO_1 = UART_CLKDIV_RATIO_DIV_BY_1, DL_UART_CLOCK_DIVIDE_RATIO_2 = UART_CLKDIV_RATIO_DIV_BY_2, DL_UART_CLOCK_DIVIDE_RATIO_3 = UART_CLKDIV_RATIO_DIV_BY_3, DL_UART_CLOCK_DIVIDE_RATIO_4 = UART_CLKDIV_RATIO_DIV_BY_4, DL_UART_CLOCK_DIVIDE_RATIO_5 = UART_CLKDIV_RATIO_DIV_BY_5, DL_UART_CLOCK_DIVIDE_RATIO_6 = UART_CLKDIV_RATIO_DIV_BY_6, DL_UART_CLOCK_DIVIDE_RATIO_7 = UART_CLKDIV_RATIO_DIV_BY_7, DL_UART_CLOCK_DIVIDE_RATIO_8 = UART_CLKDIV_RATIO_DIV_BY_8 } |
| enum | DL_UART_CLOCK_DIVIDE2_RATIO { DL_UART_CLOCK_DIVIDE2_RATIO_1 = UART_CLKDIV2_RATIO_DIV_BY_1, DL_UART_CLOCK_DIVIDE2_RATIO_2 = UART_CLKDIV2_RATIO_DIV_BY_2, DL_UART_CLOCK_DIVIDE2_RATIO_3 = UART_CLKDIV2_RATIO_DIV_BY_3, DL_UART_CLOCK_DIVIDE2_RATIO_4 = UART_CLKDIV2_RATIO_DIV_BY_4, DL_UART_CLOCK_DIVIDE2_RATIO_5 = UART_CLKDIV2_RATIO_DIV_BY_5, DL_UART_CLOCK_DIVIDE2_RATIO_6 = UART_CLKDIV2_RATIO_DIV_BY_6, DL_UART_CLOCK_DIVIDE2_RATIO_7 = UART_CLKDIV2_RATIO_DIV_BY_7, DL_UART_CLOCK_DIVIDE2_RATIO_8 = UART_CLKDIV2_RATIO_DIV_BY_8 } |
Functions | |
| void | DL_UART_init (UART_Regs *uart, const DL_UART_Config *config) |
| Initialize the UART peripheral. More... | |
| __STATIC_INLINE void | DL_UART_enablePower (UART_Regs *uart) |
| Enables the Peripheral Write Enable (PWREN) register for the UART. More... | |
| __STATIC_INLINE void | DL_UART_disablePower (UART_Regs *uart) |
| Disables the Peripheral Write Enable (PWREN) register for the UART. More... | |
| __STATIC_INLINE bool | DL_UART_isPowerEnabled (const UART_Regs *uart) |
| Returns if the Peripheral Write Enable (PWREN) register for the UART is enabled. More... | |
| __STATIC_INLINE void | DL_UART_reset (UART_Regs *uart) |
| Resets uart peripheral. More... | |
| __STATIC_INLINE bool | DL_UART_isReset (const UART_Regs *uart) |
| Returns if uart peripheral was reset. More... | |
| __STATIC_INLINE void | DL_UART_enable (UART_Regs *uart) |
| Enable the UART peripheral. More... | |
| __STATIC_INLINE bool | DL_UART_isEnabled (const UART_Regs *uart) |
| Checks if the UART peripheral is enabled. More... | |
| __STATIC_INLINE void | DL_UART_disable (UART_Regs *uart) |
| Disable the UART peripheral. More... | |
| void | DL_UART_setClockConfig (UART_Regs *uart, const DL_UART_ClockConfig *config) |
| Configure UART source clock. More... | |
| void | DL_UART_getClockConfig (const UART_Regs *uart, DL_UART_ClockConfig *config) |
| Get UART source clock configuration. More... | |
| void | DL_UART_configBaudRate (UART_Regs *uart, uint32_t clockFreq, uint32_t baudRate) |
| Configure the baud rate. More... | |
| __STATIC_INLINE void | DL_UART_setOversampling (UART_Regs *uart, DL_UART_OVERSAMPLING_RATE rate) |
| Set the oversampling rate. More... | |
| __STATIC_INLINE DL_UART_OVERSAMPLING_RATE | DL_UART_getOversampling (const UART_Regs *uart) |
| Get the oversampling rate. More... | |
| __STATIC_INLINE void | DL_UART_enableLoopbackMode (UART_Regs *uart) |
| Enable loopback mode. More... | |
| __STATIC_INLINE bool | DL_UART_isLoopbackModeEnabled (const UART_Regs *uart) |
| Check if loopback mode is enabled. More... | |
| __STATIC_INLINE void | DL_UART_disableLoopbackMode (UART_Regs *uart) |
| Disable loopback mode. More... | |
| __STATIC_INLINE void | DL_UART_setDirection (UART_Regs *uart, DL_UART_DIRECTION direction) |
| Set the direction of the UART communication. More... | |
| __STATIC_INLINE DL_UART_DIRECTION | DL_UART_getDirection (const UART_Regs *uart) |
| Get the direction of the UART communication. More... | |
| __STATIC_INLINE void | DL_UART_enableMajorityVoting (UART_Regs *uart) |
| Enable majority voting control. More... | |
| __STATIC_INLINE bool | DL_UART_isMajorityVotingEnabled (const UART_Regs *uart) |
| Check if majority voting is enabled. More... | |
| __STATIC_INLINE void | DL_UART_disableMajorityVoting (UART_Regs *uart) |
| Disable majority voting control. More... | |
| __STATIC_INLINE void | DL_UART_enableMSBFirst (UART_Regs *uart) |
| Enable most significant bit (MSB) first. More... | |
| __STATIC_INLINE bool | DL_UART_isMSBFirstEnabled (const UART_Regs *uart) |
| Check if most significant bit (MSB) first is enabled. More... | |
| __STATIC_INLINE void | DL_UART_disableMSBFirst (UART_Regs *uart) |
| Disable most significant bit (MSB) first. More... | |
| __STATIC_INLINE void | DL_UART_enableTransmitPinManualControl (UART_Regs *uart) |
| Enable control of the TXD pin. More... | |
| __STATIC_INLINE bool | DL_UART_isTransmitPinManualControlEnabled (const UART_Regs *uart) |
| Check if control of the TXD pin is enabled. More... | |
| __STATIC_INLINE void | DL_UART_disableTransmitPinManualControl (UART_Regs *uart) |
| Disable control of the TXD pin. More... | |
| __STATIC_INLINE void | DL_UART_setTransmitPinManualOutput (UART_Regs *uart, DL_UART_TXD_OUT txdOutVal) |
| Set the output of the TXD pin. More... | |
| __STATIC_INLINE DL_UART_TXD_OUT | DL_UART_getTransmitPinManualOutput (const UART_Regs *uart) |
| Get the output value of the TXD pin. More... | |
| __STATIC_INLINE void | DL_UART_enableManchesterEncoding (UART_Regs *uart) |
| Enable Manchester encoding. More... | |
| __STATIC_INLINE void | DL_UART_disableManchesterEncoding (UART_Regs *uart) |
| Disable Manchester encoding. More... | |
| __STATIC_INLINE bool | DL_UART_isManchesterEncodingEnabled (const UART_Regs *uart) |
| Check if Manchester encoding is enabled. More... | |
| __STATIC_INLINE void | DL_UART_setCommunicationMode (UART_Regs *uart, DL_UART_MODE mode) |
| Set the communication mode/protocol to use. More... | |
| __STATIC_INLINE DL_UART_MODE | DL_UART_getCommunicationMode (const UART_Regs *uart) |
| Get the communication mode/protocol being used. More... | |
| __STATIC_INLINE void | DL_UART_setFlowControl (UART_Regs *uart, DL_UART_FLOW_CONTROL config) |
| Set the flow control configuration. More... | |
| __STATIC_INLINE DL_UART_FLOW_CONTROL | DL_UART_getFlowControl (const UART_Regs *uart) |
| Check the flow control configuration. More... | |
| __STATIC_INLINE void | DL_UART_setRTSOutput (UART_Regs *uart, DL_UART_RTS val) |
| Set the request to send output signal. More... | |
| __STATIC_INLINE DL_UART_RTS | DL_UART_getRTSOutput (const UART_Regs *uart) |
| Get the request to send output signal. More... | |
| __STATIC_INLINE void | DL_UART_enableFIFOs (UART_Regs *uart) |
| Enable FIFOs. More... | |
| __STATIC_INLINE void | DL_UART_disableFIFOs (UART_Regs *uart) |
| Disable FIFOs. More... | |
| __STATIC_INLINE bool | DL_UART_isFIFOsEnabled (const UART_Regs *uart) |
| Check if FIFOs are enabled. More... | |
| __STATIC_INLINE void | DL_UART_enableLINSendBreak (UART_Regs *uart) |
| Enable send break (for LIN protocol) More... | |
| __STATIC_INLINE void | DL_UART_disableLINSendBreak (UART_Regs *uart) |
| Disable send break. More... | |
| __STATIC_INLINE bool | DL_UART_isLINSendBreakEnabled (const UART_Regs *uart) |
| Check if send break is enabled. More... | |
| __STATIC_INLINE bool | DL_UART_isParityEnabled (const UART_Regs *uart) |
| Check if parity is enabled. More... | |
| __STATIC_INLINE void | DL_UART_setParityMode (UART_Regs *uart, DL_UART_PARITY parity) |
| Set the parity mode. More... | |
| __STATIC_INLINE DL_UART_PARITY | DL_UART_getParityMode (const UART_Regs *uart) |
| Get parity mode. More... | |
| __STATIC_INLINE void | DL_UART_setStopBits (UART_Regs *uart, DL_UART_STOP_BITS numStopBits) |
| Set the number of stop bits. More... | |
| __STATIC_INLINE DL_UART_STOP_BITS | DL_UART_getStopBits (const UART_Regs *uart) |
| Get the number of stop bits. More... | |
| __STATIC_INLINE void | DL_UART_setWordLength (UART_Regs *uart, DL_UART_WORD_LENGTH wordLength) |
| Set the word length. More... | |
| __STATIC_INLINE DL_UART_WORD_LENGTH | DL_UART_getWordLength (const UART_Regs *uart) |
| Get the word length. More... | |
| __STATIC_INLINE void | DL_UART_enableSendIdlePattern (UART_Regs *uart) |
| Send idle pattern. More... | |
| __STATIC_INLINE void | DL_UART_disableSendIdlePattern (UART_Regs *uart) |
| Disable send idle pattern. More... | |
| __STATIC_INLINE bool | DL_UART_isSendIdlePatternEnabled (const UART_Regs *uart) |
| Check if send idle pattern is enabled. More... | |
| __STATIC_INLINE void | DL_UART_setExternalDriverSetup (UART_Regs *uart, uint32_t val) |
| Set external driver setup value. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getExternalDriverSetup (const UART_Regs *uart) |
| Get the external driver setup value. More... | |
| __STATIC_INLINE void | DL_UART_setExternalDriverHold (UART_Regs *uart, uint32_t val) |
| Set external driver setup hold. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getExternalDriverHold (const UART_Regs *uart) |
| Get the external driver setup hold. More... | |
| __STATIC_INLINE bool | DL_UART_isBusy (const UART_Regs *uart) |
| Checks if the UART is busy. More... | |
| __STATIC_INLINE bool | DL_UART_isRXFIFOEmpty (const UART_Regs *uart) |
| Checks if the RX FIFO is empty. More... | |
| __STATIC_INLINE bool | DL_UART_isRXFIFOFull (const UART_Regs *uart) |
| Checks if the RX FIFO is full. More... | |
| __STATIC_INLINE bool | DL_UART_isTXFIFOEmpty (const UART_Regs *uart) |
| Checks if the TX FIFO is empty. More... | |
| __STATIC_INLINE bool | DL_UART_isTXFIFOFull (const UART_Regs *uart) |
| Checks if the TX FIFO is full. More... | |
| __STATIC_INLINE bool | DL_UART_isClearToSend (const UART_Regs *uart) |
| Checks if UART is clear to send. More... | |
| __STATIC_INLINE bool | DL_UART_isIdleModeDetected (const UART_Regs *uart) |
| Checks if Idle mode has been detected. More... | |
| __STATIC_INLINE void | DL_UART_setTXFIFOThreshold (UART_Regs *uart, DL_UART_TX_FIFO_LEVEL threshold) |
| Set the TX FIFO interrupt threshold level. More... | |
| __STATIC_INLINE DL_UART_TX_FIFO_LEVEL | DL_UART_getTXFIFOThreshold (const UART_Regs *uart) |
| Get the TX FIFO interrupt threshold level. More... | |
| __STATIC_INLINE void | DL_UART_setRXFIFOThreshold (UART_Regs *uart, DL_UART_RX_FIFO_LEVEL threshold) |
| Set the RX FIFO interrupt threshold level. The interrupts are generated based on a transition through a level rather than being based on the level. That is, the interrupts are generated when the fill level progresses through the trigger level. For example, if the receive trigger level is set to the half-way mark, the interrupt is triggered when the receive FIFO becomes half full. In other words, the interrupt is triggered after the receive FIFO is filled with two or more characters. More... | |
| __STATIC_INLINE DL_UART_RX_FIFO_LEVEL | DL_UART_getRXFIFOThreshold (const UART_Regs *uart) |
| Get the RX FIFO interrupt threshold level. More... | |
| __STATIC_INLINE void | DL_UART_setRXInterruptTimeout (UART_Regs *uart, uint32_t timeout) |
| Set the RX interrupt timeout. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getRXInterruptTimeout (const UART_Regs *uart) |
| Get the RX interrupt timeout. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getIntegerBaudRateDivisor (const UART_Regs *uart) |
| Get Integer Baud-Rate Divisor. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getFractionalBaudRateDivisor (const UART_Regs *uart) |
| Get Fractional Baud-Rate Divisor. More... | |
| __STATIC_INLINE void | DL_UART_setBaudRateDivisor (UART_Regs *uart, uint32_t integerDivisor, uint32_t fractionalDivisor) |
| Set the baud rate divisor. More... | |
| __STATIC_INLINE void | DL_UART_setIrDABaudRateDivisor (UART_Regs *uart, uint32_t integerDivisor, uint32_t fractionalDivisor, DL_UART_CLOCK_DIVIDE2_RATIO clkDivisor2) |
| Set the baud rate divisor for IrDA mode. More... | |
| __STATIC_INLINE void | DL_UART_setDigitalPulseWidth (UART_Regs *uart, uint32_t pulseWidth) |
| Set the pulse width select for the digital glitch suppresion. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getDigitalPulseWidth (const UART_Regs *uart) |
| Get the pulse width select for the digital glitch suppresion. More... | |
| __STATIC_INLINE void | DL_UART_transmitData (UART_Regs *uart, uint8_t data) |
| Writes data into the TX FIFO to transmit. More... | |
| __STATIC_INLINE uint8_t | DL_UART_receiveData (const UART_Regs *uart) |
| Reads data from the RX FIFO. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getErrorStatus (const UART_Regs *uart, uint32_t errorMask) |
| Gets the status of the error flags of the received data. More... | |
| __STATIC_INLINE void | DL_UART_setLINCounterValue (UART_Regs *uart, uint16_t value) |
| Set the LIN counter value. More... | |
| __STATIC_INLINE uint16_t | DL_UART_getLINCounterValue (const UART_Regs *uart) |
| Get the LIN counter value. More... | |
| __STATIC_INLINE void | DL_UART_enableLINCounter (UART_Regs *uart) |
| Enable the LIN counter. More... | |
| __STATIC_INLINE bool | DL_UART_isLINCounterEnabled (const UART_Regs *uart) |
| Check if the LIN counter is enabled. More... | |
| __STATIC_INLINE void | DL_UART_disableLINCounter (UART_Regs *uart) |
| Disable the LIN counter. More... | |
| __STATIC_INLINE void | DL_UART_enableLINCounterClearOnFallingEdge (UART_Regs *uart) |
| Enable LIN counter clear and start counting on falling edge of RXD. More... | |
| __STATIC_INLINE bool | DL_UART_isLINCounterClearOnFallingEdge (const UART_Regs *uart) |
| Check if LIN counting on falling edge of RXD is enabled. More... | |
| __STATIC_INLINE void | DL_UART_disableLINCounterClearOnFallingEdge (UART_Regs *uart) |
| Disable LIN counting on falling edge of RXD. More... | |
| __STATIC_INLINE void | DL_UART_enableLINCountWhileLow (UART_Regs *uart) |
| Enable LIN counter incrementing while RXD signal is low. More... | |
| __STATIC_INLINE bool | DL_UART_isLINCountWhileLowEnabled (const UART_Regs *uart) |
| Check if LIN counter increments while RXD signal is low is enabled. More... | |
| __STATIC_INLINE void | DL_UART_disableLINCountWhileLow (UART_Regs *uart) |
| Disable LIN counter increments while RXD signal is low. More... | |
| __STATIC_INLINE void | DL_UART_enableLINFallingEdgeCapture (UART_Regs *uart) |
| Enable capture of the LIN counter on a falling edge. More... | |
| __STATIC_INLINE bool | DL_UART_isLINFallingEdgeCaptureEnabled (const UART_Regs *uart) |
| Check status of capture of LIN counter on a falling edge. More... | |
| __STATIC_INLINE void | DL_UART_disableLINFallingEdgeCapture (UART_Regs *uart) |
| Disable capture of LIN counter on a falling edge. More... | |
| __STATIC_INLINE void | DL_UART_enableLINRisingEdgeCapture (UART_Regs *uart) |
| Enable capture of the LIN counter on a rising edge. More... | |
| __STATIC_INLINE bool | DL_UART_isLINRisingEdgeCaptureEnabled (const UART_Regs *uart) |
| Check status of capture of LIN counter on a rising edge. More... | |
| __STATIC_INLINE void | DL_UART_disableLINRisingEdgeCapture (UART_Regs *uart) |
| Disable capture of LIN counter on a rising edge. More... | |
| __STATIC_INLINE void | DL_UART_enableLINCounterCompareMatch (UART_Regs *uart) |
| Enable LIN counter compare match mode. More... | |
| __STATIC_INLINE void | DL_UART_enableLINSyncFieldValidationCounterControl (UART_Regs *uart) |
| Setup LIN counter control for sync field validation. More... | |
| __STATIC_INLINE void | DL_UART_enableLINReceptionCountControl (UART_Regs *uart) |
| Setup LIN counter control for LIN reception. More... | |
| __STATIC_INLINE bool | DL_UART_isLINCounterCompareMatchEnabled (const UART_Regs *uart) |
| Check if LIN counter compare match mode is enabled. More... | |
| __STATIC_INLINE void | DL_UART_disableLINCounterCompareMatch (UART_Regs *uart) |
| Disable LIN counter compare match mode. More... | |
| __STATIC_INLINE void | DL_UART_setLINCounterCompareValue (UART_Regs *uart, uint16_t value) |
| Set the value to be compared to the LIN counter. More... | |
| __STATIC_INLINE uint16_t | DL_UART_getLINFallingEdgeCaptureValue (const UART_Regs *uart) |
| Get the LINC0 counter value. More... | |
| __STATIC_INLINE uint16_t | DL_UART_getLINRisingEdgeCaptureValue (const UART_Regs *uart) |
| Get the LINC1 counter value. More... | |
| __STATIC_INLINE void | DL_UART_enableIrDAMode (UART_Regs *uart) |
| Enable the IrDA encoder/decoder. More... | |
| __STATIC_INLINE bool | DL_UART_isIrDAModeEnabled (const UART_Regs *uart) |
| Check if the IrDA encoder/decoder is enabled. More... | |
| __STATIC_INLINE void | DL_UART_disableIrDAMode (UART_Regs *uart) |
| Disable the IrDA encoder/decoder. More... | |
| __STATIC_INLINE void | DL_UART_setIrDATXPulseClockSelect (UART_Regs *uart, DL_UART_IRDA_CLOCK uartClock) |
| Set the IrDA transmit pulse clock select. More... | |
| __STATIC_INLINE DL_UART_IRDA_CLOCK | DL_UART_getIrDATXPulseClockSelect (const UART_Regs *uart) |
| Get the IrDA transmit pulse clock select. More... | |
| void | DL_UART_configIrDAMode (UART_Regs *uart, DL_UART_IRDA_POLARITY polarity, uint32_t pulseLength, DL_UART_IRDA_CLOCK irdaClk) |
| Set the IrDA configurations. More... | |
| void | DL_UART_setIrDAPulseLength (UART_Regs *uart, uint32_t pulseLength, DL_UART_IRDA_CLOCK irdaClk) |
| Set the IrDA transmit pulse length. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getIrDATXPulseLength (const UART_Regs *uart) |
| Get the IrDA transmit pulse length. More... | |
| __STATIC_INLINE void | DL_UART_setIrDARXPulsePolarity (UART_Regs *uart, DL_UART_IRDA_POLARITY polarity) |
| Set the IrDA receive input UCAxRXD polarity. More... | |
| __STATIC_INLINE DL_UART_IRDA_POLARITY | DL_UART_getIrDARXPulsePolarity (const UART_Regs *uart) |
| Get the IrDA receive input UCAxRXD polarity. More... | |
| __STATIC_INLINE void | DL_UART_setAddressMask (UART_Regs *uart, uint32_t addressMask) |
| Set the address mask for DALI, 9-bit, or Idle-Line mode. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getAddressMask (const UART_Regs *uart) |
| Get the address mask being used. More... | |
| __STATIC_INLINE void | DL_UART_setAddress (UART_Regs *uart, uint32_t address) |
| Set the address. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getAddress (const UART_Regs *uart) |
| Get the address being used. More... | |
| __STATIC_INLINE void | DL_UART_enableInterrupt (UART_Regs *uart, uint32_t interruptMask) |
| Enable UART interrupts. More... | |
| __STATIC_INLINE void | DL_UART_disableInterrupt (UART_Regs *uart, uint32_t interruptMask) |
| Disable UART interrupts. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getEnabledInterrupts (const UART_Regs *uart, uint32_t interruptMask) |
| Check which UART interrupts are enabled. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getEnabledInterruptStatus (const UART_Regs *uart, uint32_t interruptMask) |
| Check interrupt flag of enabled UART interrupts. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getRawInterruptStatus (const UART_Regs *uart, uint32_t interruptMask) |
| Check interrupt flag of any UART interrupt. More... | |
| __STATIC_INLINE DL_UART_IIDX | DL_UART_getPendingInterrupt (const UART_Regs *uart) |
| Get highest priority pending UART interrupt. More... | |
| __STATIC_INLINE void | DL_UART_clearInterruptStatus (UART_Regs *uart, uint32_t interruptMask) |
| Clear pending UART interrupts. More... | |
| __STATIC_INLINE void | DL_UART_changeConfig (UART_Regs *uart) |
| Prepares the UART to change the configuration. More... | |
| __STATIC_INLINE void | DL_UART_enableAnalogGlitchFilter (UART_Regs *uart) |
| Enable the analog glitch filter on the RX input. More... | |
| __STATIC_INLINE void | DL_UART_disableAnalogGlitchFilter (UART_Regs *uart) |
| Disable the analog glitch filter on the RX input. More... | |
| __STATIC_INLINE bool | DL_UART_isAnalogGlitchFilterEnabled (const UART_Regs *uart) |
| Returns if analog glitch filter is enabled. More... | |
| __STATIC_INLINE void | DL_UART_enableGlitchFilterChaining (UART_Regs *uart) |
| Enable analog and digital noise glitch filter chaining. More... | |
| __STATIC_INLINE void | DL_UART_disableGlitchFilterChaining (UART_Regs *uart) |
| Disable analog and digital noise glitch filter chaining. More... | |
| __STATIC_INLINE bool | DL_UART_isGlitchFilterChainingEnabled (const UART_Regs *uart) |
| Returns if glitch filter chaining enabled. More... | |
| __STATIC_INLINE void | DL_UART_setAnalogPulseWidth (UART_Regs *uart, DL_UART_PULSE_WIDTH pulseWidth) |
| Set the pulse width select for the analog glitch suppresion. More... | |
| __STATIC_INLINE DL_UART_PULSE_WIDTH | DL_UART_getAnalogPulseWidth (const UART_Regs *uart) |
| Get the pulse width select for the glitch suppresion. More... | |
| void | DL_UART_transmitDataBlocking (UART_Regs *uart, uint8_t data) |
| Blocks to ensure transmit is ready before sending data. More... | |
| uint8_t | DL_UART_receiveDataBlocking (const UART_Regs *uart) |
| Blocks to ensure receive is ready before reading data. More... | |
| bool | DL_UART_transmitDataCheck (UART_Regs *uart, uint8_t data) |
| Checks the TX FIFO before trying to transmit data. More... | |
| bool | DL_UART_receiveDataCheck (const UART_Regs *uart, uint8_t *buffer) |
| Checks the RX FIFO before trying to transmit data. More... | |
| uint32_t | DL_UART_drainRXFIFO (const UART_Regs *uart, uint8_t *buffer, uint32_t maxCount) |
| Read all available data out of the RX FIFO using 8 bit access. More... | |
| uint32_t | DL_UART_fillTXFIFO (UART_Regs *uart, const uint8_t *buffer, uint32_t count) |
| Fill the TX FIFO until full using 8 bit access. More... | |
| __STATIC_INLINE void | DL_UART_enableDMAReceiveEvent (UART_Regs *uart, uint32_t interrupt) |
| Enable UART interrupt for triggering the DMA receive event. More... | |
| __STATIC_INLINE void | DL_UART_enableDMATransmitEvent (UART_Regs *uart) |
| Enable UART interrupt for triggering the DMA transmit event. More... | |
| __STATIC_INLINE void | DL_UART_disableDMAReceiveEvent (UART_Regs *uart, uint32_t interrupt) |
| Disables UART interrupt from triggering the DMA receive event. More... | |
| __STATIC_INLINE void | DL_UART_disableDMATransmitEvent (UART_Regs *uart) |
| Disables UART interrupt from triggering the DMA transmit event. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getEnabledDMAReceiveEvent (const UART_Regs *uart, uint32_t interruptMask) |
| Check which UART interrupt for DMA receive events is enabled. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getEnabledDMATransmitEvent (const UART_Regs *uart) |
| Check if UART interrupt for DMA transmit event is enabled. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getEnabledDMAReceiveEventStatus (const UART_Regs *uart, uint32_t interruptMask) |
| Check interrupt flag of enabled UART interrupt for DMA receive event. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getEnabledDMATransmitEventStatus (const UART_Regs *uart) |
| Check interrupt flag of enabled UART interrupt for DMA transmit event. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getRawDMAReceiveEventStatus (const UART_Regs *uart, uint32_t interruptMask) |
| Check interrupt flag of any UART interrupt for DMA receive event. More... | |
| __STATIC_INLINE uint32_t | DL_UART_getRawDMATransmitEventStatus (const UART_Regs *uart) |
| Check interrupt flag of any UART interrupt for DMA transmit event. More... | |
| __STATIC_INLINE DL_UART_DMA_IIDX_RX | DL_UART_getPendingDMAReceiveEvent (const UART_Regs *uart) |
| Get highest priority pending UART interrupt for DMA receive event. More... | |
| __STATIC_INLINE DL_UART_DMA_IIDX_TX | DL_UART_getPendingDMATransmitEvent (const UART_Regs *uart) |
| Get highest priority pending UART interrupt for DMA transmit event. More... | |
| __STATIC_INLINE void | DL_UART_clearDMAReceiveEventStatus (UART_Regs *uart, uint32_t interruptMask) |
| Clear pending UART interrupts for DMA receive event. More... | |
| __STATIC_INLINE void | DL_UART_clearDMATransmitEventStatus (UART_Regs *uart) |
| Clear pending UART interrupt for DMA transmit event. More... | |
| __STATIC_INLINE void | DL_UART_setClockDivider2 (UART_Regs *uart, DL_UART_CLOCK_DIVIDE2_RATIO ratio) |
| Sets the second clock divider ratio. More... | |
| __STATIC_INLINE DL_UART_CLOCK_DIVIDE2_RATIO | DL_UART_getClockDivider2 (const UART_Regs *uart) |
| Gets the value of CLKDIV2. More... | |
| bool | DL_UART_Main_saveConfiguration (const UART_Regs *uart, DL_UART_Main_backupConfig *ptr) |
| Save UART Main configuration before entering a power loss state. More... | |
| bool | DL_UART_Main_restoreConfiguration (UART_Regs *uart, DL_UART_Main_backupConfig *ptr) |
| Restore UART Main configuration after leaving a power loss state. More... | |
| bool | DL_UART_Extend_saveConfiguration (const UART_Regs *uart, DL_UART_Extend_backupConfig *ptr) |
| Save UART Extend configuration before entering a power loss state. More... | |
| bool | DL_UART_Extend_restoreConfiguration (UART_Regs *uart, DL_UART_Extend_backupConfig *ptr) |
| Restore UART Extend configuration after leaving a power loss state. More... | |
The Universal Asynchronous Receiver-Transmitter Driver Library allows full configuration of the MSPM0 UART module. This module provides common functionality for UART-Main and UART-Extend, but developers should use the corresponding dl_uart_extend or dl_uart_main APIs directly.
| enum DL_UART_IIDX |
| enum DL_UART_DMA_IIDX_RX |
| enum DL_UART_DMA_IIDX_TX |
| enum DL_UART_PULSE_WIDTH |
| enum DL_UART_PARITY |
| enum DL_UART_WORD_LENGTH |
| enum DL_UART_MODE |
| enum DL_UART_DIRECTION |
| enum DL_UART_CLOCK |
| enum DL_UART_FLOW_CONTROL |
| enum DL_UART_RTS |
| enum DL_UART_STOP_BITS |
| enum DL_UART_TXD_OUT |
| enum DL_UART_IRDA_CLOCK |
| void DL_UART_init | ( | UART_Regs * | uart, |
| const DL_UART_Config * | config | ||
| ) |
Initialize the UART peripheral.
Initializes all the common configurable options for the UART peripheral. Any other custom configuration can be done after calling this API. The UART is not enabled in this API.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | config | Configuration for UART peripheral |
| __STATIC_INLINE void DL_UART_enablePower | ( | UART_Regs * | uart | ) |
Enables the Peripheral Write Enable (PWREN) register for the UART.
Before any peripheral registers can be configured by software, the peripheral itself must be enabled by writing the ENABLE bit together with the appropriate KEY value to the peripheral's PWREN register.
| uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_disablePower | ( | UART_Regs * | uart | ) |
Disables the Peripheral Write Enable (PWREN) register for the UART.
When the PWREN.ENABLE bit is cleared, the peripheral's registers are not accessible for read/write operations.
| uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isPowerEnabled | ( | const UART_Regs * | uart | ) |
Returns if the Peripheral Write Enable (PWREN) register for the UART is enabled.
Before any peripheral registers can be configured by software, the peripheral itself must be enabled by writing the ENABLE bit together with the appropriate KEY value to the peripheral's PWREN register.
When the PWREN.ENABLE bit is cleared, the peripheral's registers are not accessible for read/write operations.
| uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_reset | ( | UART_Regs * | uart | ) |
Resets uart peripheral.
| uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isReset | ( | const UART_Regs * | uart | ) |
Returns if uart peripheral was reset.
| uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_enable | ( | UART_Regs * | uart | ) |
Enable the UART peripheral.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isEnabled | ( | const UART_Regs * | uart | ) |
Checks if the UART peripheral is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | The UART peripheral is enabled |
| false | The UART peripheral is disabled |
| __STATIC_INLINE void DL_UART_disable | ( | UART_Regs * | uart | ) |
Disable the UART peripheral.
| [in] | uart | Pointer to the register overlay for the peripheral |
References DL_UART_configBaudRate(), DL_UART_getClockConfig(), and DL_UART_setClockConfig().
Referenced by DL_UART_changeConfig().
| void DL_UART_setClockConfig | ( | UART_Regs * | uart, |
| const DL_UART_ClockConfig * | config | ||
| ) |
Configure UART source clock.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | config | Pointer to the clock configuration struct DL_UART_ClockConfig. |
Referenced by DL_UART_disable().
| void DL_UART_getClockConfig | ( | const UART_Regs * | uart, |
| DL_UART_ClockConfig * | config | ||
| ) |
Get UART source clock configuration.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | config | Pointer to the clock configuration struct DL_UART_ClockConfig. |
Referenced by DL_UART_disable().
| void DL_UART_configBaudRate | ( | UART_Regs * | uart, |
| uint32_t | clockFreq, | ||
| uint32_t | baudRate | ||
| ) |
Configure the baud rate.
Given the target baud rate and the frequency of the UART clock source, this API determines and sets the recommended oversampling setting, and then calculates and sets the required baud rate divisors.
The oversampling rate that will be set is the highest possible oversampling rate given the target baud rate and UART clock frequency.
If the user wishes to avoid having the CPU calculate the baud rate divisors or not use the recommended calculated values, the user can call DL_UART_setOversampling and DL_UART_setBaudRateDivisor directly.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | clockFreq | The clock frequency in Hz of the UART clock source |
| [in] | baudRate | The target baud rate |
Referenced by DL_UART_disable().
| __STATIC_INLINE void DL_UART_setOversampling | ( | UART_Regs * | uart, |
| DL_UART_OVERSAMPLING_RATE | rate | ||
| ) |
Set the oversampling rate.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | rate | The oversampling rate to use. One of DL_UART_OVERSAMPLING_RATE |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_OVERSAMPLING_RATE DL_UART_getOversampling | ( | const UART_Regs * | uart | ) |
Get the oversampling rate.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_OVERSAMPLING_RATE |
| __STATIC_INLINE void DL_UART_enableLoopbackMode | ( | UART_Regs * | uart | ) |
Enable loopback mode.
Enables the loopback mode. When enabled, the UARTxTXD path is fed through the UARTxRXD path.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isLoopbackModeEnabled | ( | const UART_Regs * | uart | ) |
Check if loopback mode is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | Loopback mode is enabled |
| false | Loopback mode is disabled |
| __STATIC_INLINE void DL_UART_disableLoopbackMode | ( | UART_Regs * | uart | ) |
Disable loopback mode.
Disables the loopback mode. When disabled, the UARTxTXD path is not fed through the UARTxRXD path.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_setDirection | ( | UART_Regs * | uart, |
| DL_UART_DIRECTION | direction | ||
| ) |
Set the direction of the UART communication.
If the UART is disabled in the middle of a transmit or receive, it completes the current character before stopping.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | direction | Direction to set UART communication to. One of DL_UART_DIRECTION. |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_DIRECTION DL_UART_getDirection | ( | const UART_Regs * | uart | ) |
Get the direction of the UART communication.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_DIRECTION |
| __STATIC_INLINE void DL_UART_enableMajorityVoting | ( | UART_Regs * | uart | ) |
Enable majority voting control.
When enabled, the three center bits are used to determine received sample value. The value corresponding to at least two of the three samples is considered to be the received value.In case of error (i.e. all 3 bits are not the same), noise error is detected and bits RIS.NERR and register RXDATA.NERR are set.
When enabled with oversampling of 16, samples 7, 8, and 9 are majority voted to decide the sampled bit value.
When enabled with oversampling of 8, samples 3, 4, and 5 are majority voted to decide the sampled bit value. The value corresponding to at least 2 of the 3 samples is considered to be the received value.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isMajorityVotingEnabled | ( | const UART_Regs * | uart | ) |
Check if majority voting is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | Majority voting is enabled |
| false | Majority voting is disabled |
| __STATIC_INLINE void DL_UART_disableMajorityVoting | ( | UART_Regs * | uart | ) |
Disable majority voting control.
When disabled, only a single sample of the received bit of is taken.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_enableMSBFirst | ( | UART_Regs * | uart | ) |
Enable most significant bit (MSB) first.
When enabled, the most significant bit (MSB) is sent first in the protocol packet. This bit has effect on both the way the protocol byte is transmitted and received.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isMSBFirstEnabled | ( | const UART_Regs * | uart | ) |
Check if most significant bit (MSB) first is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | MSB first is enabled |
| false | MSB first is disabled |
| __STATIC_INLINE void DL_UART_disableMSBFirst | ( | UART_Regs * | uart | ) |
Disable most significant bit (MSB) first.
When disabled, the least significant bit (LSB) is sent first in the protocol packet. This bit has effect on both the way the protocol byte is transmitted and received.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_enableTransmitPinManualControl | ( | UART_Regs * | uart | ) |
Enable control of the TXD pin.
When enabled, the TXD pin can be controlled by the TXD_OUT bit. The UART transmit section must first be disabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isTransmitPinManualControlEnabled | ( | const UART_Regs * | uart | ) |
Check if control of the TXD pin is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | Control of the TXD pin is enabled |
| false | Control of the TXD pin is disabled |
| __STATIC_INLINE void DL_UART_disableTransmitPinManualControl | ( | UART_Regs * | uart | ) |
Disable control of the TXD pin.
When disabled, the TXD pin can not be controlled by the TXD_OUT bit
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_setTransmitPinManualOutput | ( | UART_Regs * | uart, |
| DL_UART_TXD_OUT | txdOutVal | ||
| ) |
Set the output of the TXD pin.
Control the output transmit data pin only when TXD_OUT_EN is enabled and TXE is disabled.
The TXD pin is set to manual control if it hadn't been previously set.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | txdOutVal | Value to set the TXD pin output to. One of DL_UART_TXD_OUT |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_TXD_OUT DL_UART_getTransmitPinManualOutput | ( | const UART_Regs * | uart | ) |
Get the output value of the TXD pin.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_TXD_OUT |
| __STATIC_INLINE void DL_UART_enableManchesterEncoding | ( | UART_Regs * | uart | ) |
Enable Manchester encoding.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_disableManchesterEncoding | ( | UART_Regs * | uart | ) |
Disable Manchester encoding.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isManchesterEncodingEnabled | ( | const UART_Regs * | uart | ) |
Check if Manchester encoding is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | Manchester encoding is enabled |
| false | Manchester encoding is disabled |
| __STATIC_INLINE void DL_UART_setCommunicationMode | ( | UART_Regs * | uart, |
| DL_UART_MODE | mode | ||
| ) |
Set the communication mode/protocol to use.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | mode | Value to set the UART communication protocol to. One of DL_UART_MODE |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_MODE DL_UART_getCommunicationMode | ( | const UART_Regs * | uart | ) |
Get the communication mode/protocol being used.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_MODE |
| __STATIC_INLINE void DL_UART_setFlowControl | ( | UART_Regs * | uart, |
| DL_UART_FLOW_CONTROL | config | ||
| ) |
Set the flow control configuration.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | config | The flow control configuration to use. One of DL_UART_FLOW_CONTROL. |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_FLOW_CONTROL DL_UART_getFlowControl | ( | const UART_Regs * | uart | ) |
Check the flow control configuration.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_FLOW_CONTROL values |
| __STATIC_INLINE void DL_UART_setRTSOutput | ( | UART_Regs * | uart, |
| DL_UART_RTS | val | ||
| ) |
Set the request to send output signal.
The RTS output signal indicates the state of the RX FIFO, and is linked to the programmable receive FIFO threshold levels. When RTS flow control is enabled, the RTS signal is asserted (low) when the data in the RX FIFO is less than the threshold level. When the RX FIFO threshold level is reached, the RTS signal is deasserted (high). The RTS signal is reasserted (low) when data has been read out of the RX FIFO so it is less than the threshold.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | val | The RTS output signal. One of DL_UART_RTS |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_RTS DL_UART_getRTSOutput | ( | const UART_Regs * | uart | ) |
Get the request to send output signal.
The RTS output signal indicates the state of the RX FIFO, and is linked to the programmable receive FIFO threshold levels. When RTS flow control is enabled, the RTS signal is asserted (low) when the data in the RX FIFO is less than the threshold level. When the RX FIFO threshold level is reached, the RTS signal is deasserted (high). The RTS signal is reasserted (low) when data has been read out of the RX FIFO so it is less than the threshold.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_RTS |
| __STATIC_INLINE void DL_UART_enableFIFOs | ( | UART_Regs * | uart | ) |
Enable FIFOs.
Enables the transmit and receive FIFO buffers.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_disableFIFOs | ( | UART_Regs * | uart | ) |
Disable FIFOs.
Disables the transmit and receive FIFO buffers. The receiver will now only hold 1-byte of data.
| [in] | uart | Pointer to the register overlay for the peripheral |
Referenced by DL_UART_changeConfig().
| __STATIC_INLINE bool DL_UART_isFIFOsEnabled | ( | const UART_Regs * | uart | ) |
Check if FIFOs are enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | FIFOs are enabled |
| false | FIFOs are disabled |
| __STATIC_INLINE void DL_UART_enableLINSendBreak | ( | UART_Regs * | uart | ) |
Enable send break (for LIN protocol)
When enabled, a low level is continually output on the TXD signal after completing transmission of the current character. For the proper execution of the break command, software must set this bit for at least two frames (character periods).
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_disableLINSendBreak | ( | UART_Regs * | uart | ) |
Disable send break.
When disabled, a low level is not continually output on the TXD signal after completing transmission of the current character.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isLINSendBreakEnabled | ( | const UART_Regs * | uart | ) |
Check if send break is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | Send break is enabled |
| false | Send break is disabled |
| __STATIC_INLINE bool DL_UART_isParityEnabled | ( | const UART_Regs * | uart | ) |
Check if parity is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | Parity is enabled |
| false | Parity is disabled |
| __STATIC_INLINE void DL_UART_setParityMode | ( | UART_Regs * | uart, |
| DL_UART_PARITY | parity | ||
| ) |
Set the parity mode.
For 9-bit UART mode transmissions, the parity mode affects the address byte and data byte indication (9th bit). If DL_UART_PARITY_EVEN or DL_UART_PARITY_STICK_ZERO is enabled, then the transferred byte is an address byte with Parity bit '1'. If DL_UART_PARITY_EVEN or DL_UART_PARITY_STICK_ZERO is not enabled, then the transferred byte is an address byte with Parity bit '0'.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | parity | Parity mode to set UART to. One of DL_UART_PARITY |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_PARITY DL_UART_getParityMode | ( | const UART_Regs * | uart | ) |
Get parity mode.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_PARITY |
| __STATIC_INLINE void DL_UART_setStopBits | ( | UART_Regs * | uart, |
| DL_UART_STOP_BITS | numStopBits | ||
| ) |
Set the number of stop bits.
When in 7816 smart code mode (DL_UART_MODE_SMART_CARD mode), the number of stop bits is forced to 2
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | numStopBits | The number of stop bits transmitted. One of DL_UART_STOP_BITS |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_STOP_BITS DL_UART_getStopBits | ( | const UART_Regs * | uart | ) |
Get the number of stop bits.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_STOP_BITS |
| __STATIC_INLINE void DL_UART_setWordLength | ( | UART_Regs * | uart, |
| DL_UART_WORD_LENGTH | wordLength | ||
| ) |
Set the word length.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | wordLength | The number of data bits transmitted or received in a frame. One of DL_UART_WORD_LENGTH |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_WORD_LENGTH DL_UART_getWordLength | ( | const UART_Regs * | uart | ) |
Get the word length.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_WORD_LENGTH |
| __STATIC_INLINE void DL_UART_enableSendIdlePattern | ( | UART_Regs * | uart | ) |
Send idle pattern.
When enabled, a SENDIDLE period of 11 bit times will be sent on the TX line. The bit is cleared by hardware afterwards.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_disableSendIdlePattern | ( | UART_Regs * | uart | ) |
Disable send idle pattern.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isSendIdlePatternEnabled | ( | const UART_Regs * | uart | ) |
Check if send idle pattern is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | Send idle pattern is enabled |
| false | Send idle pattern is disabled |
| __STATIC_INLINE void DL_UART_setExternalDriverSetup | ( | UART_Regs * | uart, |
| uint32_t | val | ||
| ) |
Set external driver setup value.
Defines the number of UARTclk ticks the signal to control the external driver for the RS485 will be set before the START bit is sent
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | val | The number of UARTclk ticks the signal before the RS485 is setup. Value between 0 - 31. |
References DL_Common_updateReg().
| __STATIC_INLINE uint32_t DL_UART_getExternalDriverSetup | ( | const UART_Regs * | uart | ) |
Get the external driver setup value.
| [in] | uart | Pointer to the register overlay for the peripheral |
| 0 | - 31 The number of UARTclk ticks |
| __STATIC_INLINE void DL_UART_setExternalDriverHold | ( | UART_Regs * | uart, |
| uint32_t | val | ||
| ) |
Set external driver setup hold.
Defines the number of UARTclk ticks the signal to control the external driver for the RS485 will be reset after the beginning of the stop bit. If 2 STOP bits are enabled, the RS485 will be reset at the beginning of the 2nd STOP bit.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | val | The number of UARTclk ticks the signal to hold the external driver before the RS485 will be reset. Value between 0 - 31. |
References DL_Common_updateReg().
| __STATIC_INLINE uint32_t DL_UART_getExternalDriverHold | ( | const UART_Regs * | uart | ) |
Get the external driver setup hold.
| [in] | uart | Pointer to the register overlay for the peripheral |
| 0 | - 31 The number of UARTclk ticks |
| __STATIC_INLINE bool DL_UART_isBusy | ( | const UART_Regs * | uart | ) |
Checks if the UART is busy.
This bit is set as soon as the transmit FIFO or TXDATA register becomes non-empty (regardless of whether UART is enabled) or if a receive data is currently ongoing (after the start edge have been detected until a complete byte, including all stop bits, has been received by the shift register).
In IDLE Line mode the Busy signal also stays set during the idle time generation.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | The UART is busy |
| false | The UART is not busy |
Referenced by DL_UART_changeConfig().
| __STATIC_INLINE bool DL_UART_isRXFIFOEmpty | ( | const UART_Regs * | uart | ) |
Checks if the RX FIFO is empty.
The meaning of this bit depends on if the FIFOs were enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | If the FIFO is enabled, the receive FIFO is empty. If the FIFO is disabled, the receiver has no data. |
| false | The receiver is not empty |
| __STATIC_INLINE bool DL_UART_isRXFIFOFull | ( | const UART_Regs * | uart | ) |
Checks if the RX FIFO is full.
The meaning of this bit depends on if the FIFOs were enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | If the FIFO is enabled, the receive FIFO is full. If the FIFO is disabled, the receiver has 1-byte of data. |
| false | The receiver is not full |
| __STATIC_INLINE bool DL_UART_isTXFIFOEmpty | ( | const UART_Regs * | uart | ) |
Checks if the TX FIFO is empty.
The meaning of this bit depends on if the FIFOs were enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | If the FIFO is enabled, the transmit FIFO is empty. If the FIFO is disabled, the transmitter has no data. |
| false | The transmitter is not empty |
| __STATIC_INLINE bool DL_UART_isTXFIFOFull | ( | const UART_Regs * | uart | ) |
Checks if the TX FIFO is full.
The meaning of this bit depends on if the FIFOs were enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | If the FIFO is enabled, the transmit FIFO is full. If the FIFO is disabled, the transmitter has 1-byte of data. |
| false | The transmitter is not full |
| __STATIC_INLINE bool DL_UART_isClearToSend | ( | const UART_Regs * | uart | ) |
Checks if UART is clear to send.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | The CTS signal is asserted (low) |
| false | The CTS signal is not asserted (high) |
| __STATIC_INLINE bool DL_UART_isIdleModeDetected | ( | const UART_Regs * | uart | ) |
Checks if Idle mode has been detected.
Idle mode has been detected in Idleline-Multiprocessor-Mode. The IDLE bit is used as an address tag for each block of characters. In idle-line multiprocessor format, this bit is set when a received character is an address.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | Idle has been detected before last received character |
| false | Idle has not been detected before last received character |
| __STATIC_INLINE void DL_UART_setTXFIFOThreshold | ( | UART_Regs * | uart, |
| DL_UART_TX_FIFO_LEVEL | threshold | ||
| ) |
Set the TX FIFO interrupt threshold level.
Select the threshold for the transmit FIFO interrupt. The interrupts are generated based on a transition through a level rather than being based on the level. That is, the interrupts are generated when the fill level progresses through the trigger level. For example, if the transmit trigger level is set to the half-way mark, the interrupt is triggered when the transmit FIFO becomes half empty. In other words, if the transmit FIFO was filled with four characters, the interrupt would trigger once there are two or less characters after transmitting.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | threshold | One of DL_UART_TX_FIFO_LEVEL |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_TX_FIFO_LEVEL DL_UART_getTXFIFOThreshold | ( | const UART_Regs * | uart | ) |
Get the TX FIFO interrupt threshold level.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_TX_FIFO_LEVEL |
| __STATIC_INLINE void DL_UART_setRXFIFOThreshold | ( | UART_Regs * | uart, |
| DL_UART_RX_FIFO_LEVEL | threshold | ||
| ) |
Set the RX FIFO interrupt threshold level. The interrupts are generated based on a transition through a level rather than being based on the level. That is, the interrupts are generated when the fill level progresses through the trigger level. For example, if the receive trigger level is set to the half-way mark, the interrupt is triggered when the receive FIFO becomes half full. In other words, the interrupt is triggered after the receive FIFO is filled with two or more characters.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | threshold | One of DL_UART_RX_FIFO_LEVEL |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_RX_FIFO_LEVEL DL_UART_getRXFIFOThreshold | ( | const UART_Regs * | uart | ) |
Get the RX FIFO interrupt threshold level.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_RX_FIFO_LEVEL |
| __STATIC_INLINE void DL_UART_setRXInterruptTimeout | ( | UART_Regs * | uart, |
| uint32_t | timeout | ||
| ) |
Set the RX interrupt timeout.
When an additional character has not been received within the set timeout, a RX interrupt will still trigger even if the FIFO level has not been reached. A value of 0 disables this function.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | timeout | Timeout to set the RX interrupt to. Value between 0 - 15 |
References DL_Common_updateReg().
| __STATIC_INLINE uint32_t DL_UART_getRXInterruptTimeout | ( | const UART_Regs * | uart | ) |
Get the RX interrupt timeout.
| [in] | uart | Pointer to the register overlay for the peripheral |
| 0 | - 15 The RX interrupt timeout value |
| __STATIC_INLINE uint32_t DL_UART_getIntegerBaudRateDivisor | ( | const UART_Regs * | uart | ) |
Get Integer Baud-Rate Divisor.
| [in] | uart | Pointer to the register overlay for the peripheral |
| 0 | - 65535 The integer baud date divisor |
| __STATIC_INLINE uint32_t DL_UART_getFractionalBaudRateDivisor | ( | const UART_Regs * | uart | ) |
Get Fractional Baud-Rate Divisor.
| [in] | uart | Pointer to the register overlay for the peripheral |
| 0 | - 63 The fractional baud date divisor |
| __STATIC_INLINE void DL_UART_setBaudRateDivisor | ( | UART_Regs * | uart, |
| uint32_t | integerDivisor, | ||
| uint32_t | fractionalDivisor | ||
| ) |
Set the baud rate divisor.
Set the integer baud rate divisor and fractional baud rate divisor components of the baud rate divisor
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | integerDivisor | The integer component of the baud rate divisor |
| [in] | fractionalDivisor | The fractional component of the baud rate divisor |
References DL_Common_updateReg().
| __STATIC_INLINE void DL_UART_setIrDABaudRateDivisor | ( | UART_Regs * | uart, |
| uint32_t | integerDivisor, | ||
| uint32_t | fractionalDivisor, | ||
| DL_UART_CLOCK_DIVIDE2_RATIO | clkDivisor2 | ||
| ) |
Set the baud rate divisor for IrDA mode.
Set the integer baud rate divisor and fractional baud rate divisor components of the baud rate divisor Divide integerDivisor by clkDivisor2 + 1 as a way of reducing the UART clock frequency, which in turn reduces the baud rate divisor further in accordance to IrDA standards
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | integerDivisor | The integer component of the baud rate divisor |
| [in] | fractionalDivisor | The fractional component of the baud rate divisor |
| [in] | clkDivisor2 | The additional factor to divide the clock, One of DL_UART_CLOCK_DIVIDE2_RATIO |
References DL_Common_updateReg().
| __STATIC_INLINE void DL_UART_setDigitalPulseWidth | ( | UART_Regs * | uart, |
| uint32_t | pulseWidth | ||
| ) |
Set the pulse width select for the digital glitch suppresion.
Controls the pulse width select for glitch suppression on the RX line. The glitch suppression values are in terms of functional clocks.
In IrDA mode, this sets the receive filter length. The minimum pulse length for receive is given by: t(MIN) = (DGFSEL) / f(IRTXCLK)
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | pulseWidth | Pulse width select for the glitch suppresion. Value between 0 - 63. |
References DL_Common_updateReg().
| __STATIC_INLINE uint32_t DL_UART_getDigitalPulseWidth | ( | const UART_Regs * | uart | ) |
Get the pulse width select for the digital glitch suppresion.
Gets the pulse width select for glitch suppression on the RX line. The glitch suppression values are in terms of functional clocks.
| [in] | uart | Pointer to the register overlay for the peripheral |
| 0 | indicating digital glitch suppression is disabled |
| 1 | - 63 the digital glitch suppression pulse width |
| __STATIC_INLINE void DL_UART_transmitData | ( | UART_Regs * | uart, |
| uint8_t | data | ||
| ) |
Writes data into the TX FIFO to transmit.
Puts the data into the TX FIFO without checking it's status. Use if already sure the TX FIFO has space for the write. See related APIs for additional transmit options.
For transmitted data, if the FIFO is enabled, data written to this location is pushed onto the transmit FIFO. If the FIFO is disabled, data is stored in the 1-byte deep transmitter.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | data | The data to transmit |
| __STATIC_INLINE uint8_t DL_UART_receiveData | ( | const UART_Regs * | uart | ) |
Reads data from the RX FIFO.
Reads the data from the RX FIFO without checking its status. Use if already sure the RX FIFO has data available. See related APIs for additional receive options.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE uint32_t DL_UART_getErrorStatus | ( | const UART_Regs * | uart, |
| uint32_t | errorMask | ||
| ) |
Gets the status of the error flags of the received data.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | errorMask | Bit mask of error flags to check. Bitwise OR of DL_UART_ERROR. |
| Bitwise | OR of DL_UART_ERROR values |
| __STATIC_INLINE void DL_UART_setLINCounterValue | ( | UART_Regs * | uart, |
| uint16_t | value | ||
| ) |
Set the LIN counter value.
The LIN counter is a 16 bit up counter clocked by the functional clock of the UART
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | value | Pulse width select for the glitch suppresion. |
References DL_Common_updateReg().
| __STATIC_INLINE uint16_t DL_UART_getLINCounterValue | ( | const UART_Regs * | uart | ) |
Get the LIN counter value.
The LIN counter is a 16 bit up counter clocked by the module clock of the UART
| [in] | uart | Pointer to the register overlay for the peripheral |
| 0 | - 65535 The clock counter value |
| __STATIC_INLINE void DL_UART_enableLINCounter | ( | UART_Regs * | uart | ) |
Enable the LIN counter.
The LIN counter will only count when enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isLINCounterEnabled | ( | const UART_Regs * | uart | ) |
Check if the LIN counter is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | LIN counter is enabled |
| false | LIN counter is disabled |
| __STATIC_INLINE void DL_UART_disableLINCounter | ( | UART_Regs * | uart | ) |
Disable the LIN counter.
LIN counter will only count when enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_enableLINCounterClearOnFallingEdge | ( | UART_Regs * | uart | ) |
Enable LIN counter clear and start counting on falling edge of RXD.
When enabled, the counter is set to 0 and starts counting on the LIN counter on a falling edge of RXD.
The LIN counter will only count when it is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isLINCounterClearOnFallingEdge | ( | const UART_Regs * | uart | ) |
Check if LIN counting on falling edge of RXD is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | Counting on falling edge is enabled |
| false | Counting on falling edge is disabled |
| __STATIC_INLINE void DL_UART_disableLINCounterClearOnFallingEdge | ( | UART_Regs * | uart | ) |
Disable LIN counting on falling edge of RXD.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_enableLINCountWhileLow | ( | UART_Regs * | uart | ) |
Enable LIN counter incrementing while RXD signal is low.
When LIN counter is enabled and the signal on RXD is low, the counter increments
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isLINCountWhileLowEnabled | ( | const UART_Regs * | uart | ) |
Check if LIN counter increments while RXD signal is low is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | Counter increments while RXD signal is low is enabled |
| false | Counter increments while RXD signal is low is disabled |
| __STATIC_INLINE void DL_UART_disableLINCountWhileLow | ( | UART_Regs * | uart | ) |
Disable LIN counter increments while RXD signal is low.
LIN counter will not increment while the RXD signal is low
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_enableLINFallingEdgeCapture | ( | UART_Regs * | uart | ) |
Enable capture of the LIN counter on a falling edge.
When enabled, the LIN counter value is captured to the LINC0 register on each falling RXD edge. A LINC0 interrupt is triggered when enabled. Disables counter compare match mode if enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
References DL_Common_updateReg().
| __STATIC_INLINE bool DL_UART_isLINFallingEdgeCaptureEnabled | ( | const UART_Regs * | uart | ) |
Check status of capture of LIN counter on a falling edge.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | Capture to LINC0 on falling RXD edge is enabled |
| false | Capture to LINC0 on falling RXD edge is disabled |
| __STATIC_INLINE void DL_UART_disableLINFallingEdgeCapture | ( | UART_Regs * | uart | ) |
Disable capture of LIN counter on a falling edge.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_enableLINRisingEdgeCapture | ( | UART_Regs * | uart | ) |
Enable capture of the LIN counter on a rising edge.
When enabled the LIN counter value is captured to LINC1 register on each rising RXD edge. A LINC1 interrupt is triggered when enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isLINRisingEdgeCaptureEnabled | ( | const UART_Regs * | uart | ) |
Check status of capture of LIN counter on a rising edge.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | Capture to LINC1 on rising RXD edge is enabled |
| false | Capture to LINC1 on rising RXD edge is disabled |
| __STATIC_INLINE void DL_UART_disableLINRisingEdgeCapture | ( | UART_Regs * | uart | ) |
Disable capture of LIN counter on a rising edge.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_enableLINCounterCompareMatch | ( | UART_Regs * | uart | ) |
Enable LIN counter compare match mode.
When enabled, a match between a value in LINC0 and the LIN counter can trigger a LINC0 interrupt. Disables capture on falling edge if enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
References DL_Common_updateReg().
| __STATIC_INLINE void DL_UART_enableLINSyncFieldValidationCounterControl | ( | UART_Regs * | uart | ) |
Setup LIN counter control for sync field validation.
Enable LIN counter capture on rising RX edge. Enable LIN counter capture on falling RX edge. Enable LIN counter clearing on RX falling edge. Enable LIN counter.
| [in] | uart | Pointer to the register overlay for the peripheral |
References DL_Common_updateReg().
| __STATIC_INLINE void DL_UART_enableLINReceptionCountControl | ( | UART_Regs * | uart | ) |
Setup LIN counter control for LIN reception.
Enable count while low signal on RXD. Enable LIN counter clearing on RXD falling edge. Enable LIN counter.
| [in] | uart | Pointer to the register overlay for the peripheral |
References DL_Common_updateReg().
| __STATIC_INLINE bool DL_UART_isLINCounterCompareMatchEnabled | ( | const UART_Regs * | uart | ) |
Check if LIN counter compare match mode is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | LIN counter compare match mode is enabled |
| false | LIN counter compare match mode is disabled |
| __STATIC_INLINE void DL_UART_disableLINCounterCompareMatch | ( | UART_Regs * | uart | ) |
Disable LIN counter compare match mode.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_setLINCounterCompareValue | ( | UART_Regs * | uart, |
| uint16_t | value | ||
| ) |
Set the value to be compared to the LIN counter.
Sets the value of LINC0 to be used to compare to the LIN counter. For use when LIN counter compare match mode is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | value | Value to be compared to the LIN counter for matching. Value between 0 - 65535. |
References DL_Common_updateReg().
| __STATIC_INLINE uint16_t DL_UART_getLINFallingEdgeCaptureValue | ( | const UART_Regs * | uart | ) |
Get the LINC0 counter value.
Captures current LINCTR value on RXD falling edge.
If capture is enabled with DL_UART_enableLINFallingEdgeCapture, a capture can generate a LINC0 interrupt. If compare mode is enabled with DL_UART_enableLINCounterCompareMatch, a counter match can generate a LINC0 interrupt.
| [in] | uart | Pointer to the register overlay for the peripheral |
| 0 | - 65535 The LINC0 counter value |
| __STATIC_INLINE uint16_t DL_UART_getLINRisingEdgeCaptureValue | ( | const UART_Regs * | uart | ) |
Get the LINC1 counter value.
Captures current LINCTR value on RXD rising edge. For use when LIN rising edge capture is enabled. It can generate a LINC1 interrupt on capture.
| [in] | uart | Pointer to the register overlay for the peripheral |
| 0 | - 65535 The LINC1 counter value |
| __STATIC_INLINE void DL_UART_enableIrDAMode | ( | UART_Regs * | uart | ) |
Enable the IrDA encoder/decoder.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isIrDAModeEnabled | ( | const UART_Regs * | uart | ) |
Check if the IrDA encoder/decoder is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| true | IrDA mode is enabled |
| false | IrDA mode is disabled |
| __STATIC_INLINE void DL_UART_disableIrDAMode | ( | UART_Regs * | uart | ) |
Disable the IrDA encoder/decoder.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_setIrDATXPulseClockSelect | ( | UART_Regs * | uart, |
| DL_UART_IRDA_CLOCK | uartClock | ||
| ) |
Set the IrDA transmit pulse clock select.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | uartClock | The clock select for the IrDA pulse data to be based on. One of DL_UART_IRDA_CLOCK |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_IRDA_CLOCK DL_UART_getIrDATXPulseClockSelect | ( | const UART_Regs * | uart | ) |
Get the IrDA transmit pulse clock select.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_IRDA_CLOCK |
References DL_UART_configIrDAMode(), and DL_UART_setIrDAPulseLength().
| void DL_UART_configIrDAMode | ( | UART_Regs * | uart, |
| DL_UART_IRDA_POLARITY | polarity, | ||
| uint32_t | pulseLength, | ||
| DL_UART_IRDA_CLOCK | irdaClk | ||
| ) |
Set the IrDA configurations.
Calculates the baud rate divisor given the clock output of the UART clock source and the target baud rate. This API also enables IrDA mode.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | polarity | The receive input polarity. One of DL_UART_IRDA_POLARITY. |
| [in] | pulseLength | The length of the IrDA transmit pulse. |
| [in] | irdaClk | The clock used for the transmit pulse. One of DL_UART_IRDA_CLOCK. |
Referenced by DL_UART_getIrDATXPulseClockSelect().
| void DL_UART_setIrDAPulseLength | ( | UART_Regs * | uart, |
| uint32_t | pulseLength, | ||
| DL_UART_IRDA_CLOCK | irdaClk | ||
| ) |
Set the IrDA transmit pulse length.
The pulse length can be calculated with the following equation: IRTXPLx = pulseLength * 2 * irdaClk - 1 (IRTXCLK = functional clock of the UART)
To set the pulse time of 3/16 bit period required by the IrDA period, 16-bit oversampling is selected with HSE = 0, the baud rate clock is selected with IRTXCLK = 1, and the pulse length is set to six one-half clock cycles with IRTXPLx = 6 - 1 - 5.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | pulseLength | The length of the IrDA transmit pulse. |
| [in] | irdaClk | The clock used for the transmit pulse. One of DL_UART_IRDA_CLOCK. |
Referenced by DL_UART_getIrDATXPulseClockSelect().
| __STATIC_INLINE uint32_t DL_UART_getIrDATXPulseLength | ( | const UART_Regs * | uart | ) |
Get the IrDA transmit pulse length.
| [in] | uart | Pointer to the register overlay for the peripheral |
| 0 | - 63 The IrDA transmit pulse length |
| __STATIC_INLINE void DL_UART_setIrDARXPulsePolarity | ( | UART_Regs * | uart, |
| DL_UART_IRDA_POLARITY | polarity | ||
| ) |
Set the IrDA receive input UCAxRXD polarity.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | polarity | The value to set the IrDA RX pulse polarity to. One of DL_UART_IRDA_POLARITY |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_IRDA_POLARITY DL_UART_getIrDARXPulsePolarity | ( | const UART_Regs * | uart | ) |
Get the IrDA receive input UCAxRXD polarity.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_IRDA_POLARITY |
| __STATIC_INLINE void DL_UART_setAddressMask | ( | UART_Regs * | uart, |
| uint32_t | addressMask | ||
| ) |
Set the address mask for DALI, 9-bit, or Idle-Line mode.
The address bits are masked to create a set of addresses to be matched with the received address byte.
A 0 bit in the MSK bitfield configures that the corresponding bit in the ADDR bitfield of the ADDR register is don't care. A 1 bit in the MSK bitfield configures, that the corresponding bit in the ADDR bitfield of the ADDR register must match.
Used in DALI, UART 9-Bit or Idle-Line mode.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | addressMask | The address mask to set |
References DL_Common_updateReg().
| __STATIC_INLINE uint32_t DL_UART_getAddressMask | ( | const UART_Regs * | uart | ) |
Get the address mask being used.
The address bits are masked to create a set of addresses to be matched with the received address byte.
A 0 bit in the MSK bitfield configures that the corresponding bit in the ADDR bitfield of the ADDR register is don't care. A 1 bit in the MSK bitfield configures, that the corresponding bit in the ADDR bitfield of the ADDR register must match.
Used in DALI, UART 9-Bit or Idle-Line mode.
| [in] | uart | Pointer to the register overlay for the peripheral |
| 0-255 | The address mask |
| __STATIC_INLINE void DL_UART_setAddress | ( | UART_Regs * | uart, |
| uint32_t | address | ||
| ) |
Set the address.
Used to write the specific address that should be matched with the receiving byte when the Address Mask (AMASK) is set to FFh. This register is used in conjunction with AMASK to form a match for address-byte received.
Used in DALI, UART 9-Bit or Idle-Line mode.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | address | The address to set |
References DL_Common_updateReg().
| __STATIC_INLINE uint32_t DL_UART_getAddress | ( | const UART_Regs * | uart | ) |
Get the address being used.
Used to write the specific address that should be matched with the receiving byte when the Address Mask (AMASK) is set to FFh. This register is used in conjunction with AMASK to form a match for address-byte received.
Used in DALI, UART 9-Bit or Idle-Line mode.
| [in] | uart | Pointer to the register overlay for the peripheral |
| 0-255 | The address being used |
| __STATIC_INLINE void DL_UART_enableInterrupt | ( | UART_Regs * | uart, |
| uint32_t | interruptMask | ||
| ) |
Enable UART interrupts.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | interruptMask | Bit mask of interrupts to enable. Bitwise OR of DL_UART_INTERRUPT. |
| __STATIC_INLINE void DL_UART_disableInterrupt | ( | UART_Regs * | uart, |
| uint32_t | interruptMask | ||
| ) |
Disable UART interrupts.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | interruptMask | Bit mask of interrupts to disable. Bitwise OR of DL_UART_INTERRUPT. |
| __STATIC_INLINE uint32_t DL_UART_getEnabledInterrupts | ( | const UART_Regs * | uart, |
| uint32_t | interruptMask | ||
| ) |
Check which UART interrupts are enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | interruptMask | Bit mask of interrupts to check. Bitwise OR of DL_UART_INTERRUPT. |
| Bitwise | OR of DL_UART_INTERRUPT values |
| __STATIC_INLINE uint32_t DL_UART_getEnabledInterruptStatus | ( | const UART_Regs * | uart, |
| uint32_t | interruptMask | ||
| ) |
Check interrupt flag of enabled UART interrupts.
Checks if any of the UART interrupts that were previously enabled are pending.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | interruptMask | Bit mask of interrupts to check. Bitwise OR of DL_UART_INTERRUPT. |
| Bitwise | OR of DL_UART_INTERRUPT values |
| __STATIC_INLINE uint32_t DL_UART_getRawInterruptStatus | ( | const UART_Regs * | uart, |
| uint32_t | interruptMask | ||
| ) |
Check interrupt flag of any UART interrupt.
Checks if any of the UART interrupts are pending. Interrupts do not have to be previously enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | interruptMask | Bit mask of interrupts to check. Bitwise OR of DL_UART_INTERRUPT. |
| Bitwise | OR of DL_UART_INTERRUPT values |
| __STATIC_INLINE DL_UART_IIDX DL_UART_getPendingInterrupt | ( | const UART_Regs * | uart | ) |
Get highest priority pending UART interrupt.
Checks if any of the UART interrupts are pending. Interrupts do not have to be previously enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| TBD |
| __STATIC_INLINE void DL_UART_clearInterruptStatus | ( | UART_Regs * | uart, |
| uint32_t | interruptMask | ||
| ) |
Clear pending UART interrupts.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | interruptMask | Bit mask of interrupts to clear. Bitwise OR of DL_UART_INTERRUPT. |
| __STATIC_INLINE void DL_UART_changeConfig | ( | UART_Regs * | uart | ) |
Prepares the UART to change the configuration.
If the UART has already been enabled, then it is recommended to call this function before calling other APIs that make changes to the CTL0 register. If changes are made to the CTL0 register without disabling the UART, then results are unpredictable. This API performs the following:
| [in] | uart | Pointer to the register overlay for the peripheral |
References DL_UART_disable(), DL_UART_disableFIFOs(), and DL_UART_isBusy().
| __STATIC_INLINE void DL_UART_enableAnalogGlitchFilter | ( | UART_Regs * | uart | ) |
Enable the analog glitch filter on the RX input.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_disableAnalogGlitchFilter | ( | UART_Regs * | uart | ) |
Disable the analog glitch filter on the RX input.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isAnalogGlitchFilterEnabled | ( | const UART_Regs * | uart | ) |
Returns if analog glitch filter is enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_enableGlitchFilterChaining | ( | UART_Regs * | uart | ) |
Enable analog and digital noise glitch filter chaining.
When enabled, analog and digital glitch filters are chained and the output of the combination is made available to the IP logic for sampling.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_disableGlitchFilterChaining | ( | UART_Regs * | uart | ) |
Disable analog and digital noise glitch filter chaining.
When disabled, only digital filter output is available to the IP logic for sampling.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE bool DL_UART_isGlitchFilterChainingEnabled | ( | const UART_Regs * | uart | ) |
Returns if glitch filter chaining enabled.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_setAnalogPulseWidth | ( | UART_Regs * | uart, |
| DL_UART_PULSE_WIDTH | pulseWidth | ||
| ) |
Set the pulse width select for the analog glitch suppresion.
Sets the pulse width select for the analog glitch suppression on the RX line. See device datasheet for exact values.
This only applies to Power Domain 0 (PD0).
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | pulseWidth | Pulse width select for the glitch suppresion. One of DL_UART_PULSE_WIDTH |
References DL_Common_updateReg().
| __STATIC_INLINE DL_UART_PULSE_WIDTH DL_UART_getAnalogPulseWidth | ( | const UART_Regs * | uart | ) |
Get the pulse width select for the glitch suppresion.
Gets the pulse width select for the analog glitch suppression on the RX line. See device datasheet for exact values.
This only applies to Power Domain 0 (PD0).
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_PULSE_WIDTH |
References DL_UART_drainRXFIFO(), DL_UART_fillTXFIFO(), DL_UART_receiveDataBlocking(), DL_UART_receiveDataCheck(), DL_UART_transmitDataBlocking(), and DL_UART_transmitDataCheck().
| void DL_UART_transmitDataBlocking | ( | UART_Regs * | uart, |
| uint8_t | data | ||
| ) |
Blocks to ensure transmit is ready before sending data.
Puts the data into the TX FIFO after blocking to ensure the TX FIFO is not full. Will wait indefintely until there is space in the TX FIFO. See related APIs for additional transmit options.
Can be used for any data transfers that are less than or equal to 8 bits.
| [in] | uart | pointer to the register overlay for the peripheral |
| [in] | data | data to send |
Referenced by DL_UART_getAnalogPulseWidth().
| uint8_t DL_UART_receiveDataBlocking | ( | const UART_Regs * | uart | ) |
Blocks to ensure receive is ready before reading data.
Reads the data from the RX FIFO after blocking to ensure the RX FIFO is not empty. Will wait indefintely until there is data in the RX FIFO. See related APIs for additional receive options.
Can be used for any data transfers that are less than or equal to 8 bits.
| [in] | uart | pointer to the register overlay for the peripheral |
Referenced by DL_UART_getAnalogPulseWidth().
| bool DL_UART_transmitDataCheck | ( | UART_Regs * | uart, |
| uint8_t | data | ||
| ) |
Checks the TX FIFO before trying to transmit data.
Checks if the TX FIFO is already full before trying to add new data to the FIFO. Exits immediately if full rather than trying to block. See related APIs for additional transmit options.
Can be used for any data transfers that are less than or equal to 8 bits.
| [in] | uart | pointer to the register overlay for the peripheral |
| [in] | data | data to send |
| true | if data was added to the TX FIFO |
| false | if the TX FIFO was full and data was not added |
Referenced by DL_UART_getAnalogPulseWidth().
| bool DL_UART_receiveDataCheck | ( | const UART_Regs * | uart, |
| uint8_t * | buffer | ||
| ) |
Checks the RX FIFO before trying to transmit data.
Checks if the RX FIFO is already empty before trying to read new data from the FIFO. Exits immediately if empty rather than trying to block. See related APIs for additional receive options.
Can be used for any data transfers that are less than or equal to 8 bits.
| [in] | uart | pointer to the register overlay for the peripheral |
| [in] | buffer | a buffer to write the received data into |
| true | if data was read from the RX FIFO |
| false | if the RX FIFO was empty and data was not read |
Referenced by DL_UART_getAnalogPulseWidth().
| uint32_t DL_UART_drainRXFIFO | ( | const UART_Regs * | uart, |
| uint8_t * | buffer, | ||
| uint32_t | maxCount | ||
| ) |
Read all available data out of the RX FIFO using 8 bit access.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [out] | buffer | Buffer to write received data into |
| [in] | maxCount | Max number of bytes to read from the RX FIFO |
Referenced by DL_UART_getAnalogPulseWidth().
| uint32_t DL_UART_fillTXFIFO | ( | UART_Regs * | uart, |
| const uint8_t * | buffer, | ||
| uint32_t | count | ||
| ) |
Fill the TX FIFO until full using 8 bit access.
Continuously write data into the TX FIFO until it is filled up or count has been reached.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | buffer | Buffer of data to write to the TX FIFO |
| [in] | count | Max number of bytes to write to the TX FIFO |
Referenced by DL_UART_getAnalogPulseWidth().
| __STATIC_INLINE void DL_UART_enableDMAReceiveEvent | ( | UART_Regs * | uart, |
| uint32_t | interrupt | ||
| ) |
Enable UART interrupt for triggering the DMA receive event.
Enables the UART interrupt to be used as the condition to generate an event to directly trigger the DMA. This API configures the DMA_TRIG_RX register, which is the event publisher used for triggering the DMA to do a receive data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | interrupt | Interrupt to enable as the trigger condition for the DMA. One of DL_UART_DMA_INTERRUPT_RX. |
| __STATIC_INLINE void DL_UART_enableDMATransmitEvent | ( | UART_Regs * | uart | ) |
Enable UART interrupt for triggering the DMA transmit event.
Enables the UART interrupt to be used as the condition to generate an event to directly trigger the DMA. This API configures the DMA_TRIG_TX register, which is the event publisher used for triggering the DMA to do a transmit data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_disableDMAReceiveEvent | ( | UART_Regs * | uart, |
| uint32_t | interrupt | ||
| ) |
Disables UART interrupt from triggering the DMA receive event.
Disables the UART interrupt as the condition to generate an event to directly trigger the DMA. This API configures the DMA_TRIG_RX register, which is the event publisher used for triggering the DMA to do a receive data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | interrupt | Interrupt to disable as the trigger condition for the DMA. One of DL_UART_DMA_INTERRUPT_RX. |
| __STATIC_INLINE void DL_UART_disableDMATransmitEvent | ( | UART_Regs * | uart | ) |
Disables UART interrupt from triggering the DMA transmit event.
Disables the UART interrupt as the condition to generate an event to directly trigger the DMA. This API configures the DMA_TRIG_TX register, which is the event publisher used for triggering the DMA to do a transmit data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE uint32_t DL_UART_getEnabledDMAReceiveEvent | ( | const UART_Regs * | uart, |
| uint32_t | interruptMask | ||
| ) |
Check which UART interrupt for DMA receive events is enabled.
This API checks the DMA_TRIG_RX register, which is the event publisher used for triggering the DMA to do a receive data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | interruptMask | Bit mask of interrupts to check Bitwise OR of DL_UART_DMA_INTERRUPT_RX. |
| One | of DL_UART_DMA_INTERRUPT_RX |
| __STATIC_INLINE uint32_t DL_UART_getEnabledDMATransmitEvent | ( | const UART_Regs * | uart | ) |
Check if UART interrupt for DMA transmit event is enabled.
This API checks the DMA_TRIG_TX register, which is the event publisher used for triggering the DMA to do a transmit data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| DL_UART_DMA_INTERRUPT_TX | if enabled, 0 if not enabled |
| __STATIC_INLINE uint32_t DL_UART_getEnabledDMAReceiveEventStatus | ( | const UART_Regs * | uart, |
| uint32_t | interruptMask | ||
| ) |
Check interrupt flag of enabled UART interrupt for DMA receive event.
Checks if any of the UART interrupts for the DMA receive event that were previously enabled are pending. This API checks the DMA_TRIG_RX register, which is the event publisher used for triggering the DMA to do a receive data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | interruptMask | Bit mask of interrupts to check. Bitwise OR of DL_UART_DMA_INTERRUPT_RX. |
| One | of DL_UART_DMA_INTERRUPT_RX |
| __STATIC_INLINE uint32_t DL_UART_getEnabledDMATransmitEventStatus | ( | const UART_Regs * | uart | ) |
Check interrupt flag of enabled UART interrupt for DMA transmit event.
Checks if the UART interrupt for the DMA transmit event that was previously enabled is pending. This API checks the DMA_TRIG_TX register, which is the event publisher used for triggering the DMA to do a transmit data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| DL_UART_DMA_INTERRUPT_TX | if enabled, 0 if not enabled |
| __STATIC_INLINE uint32_t DL_UART_getRawDMAReceiveEventStatus | ( | const UART_Regs * | uart, |
| uint32_t | interruptMask | ||
| ) |
Check interrupt flag of any UART interrupt for DMA receive event.
Checks if any of the UART interrupts for DMA receive event are pending. Interrupts do not have to be previously enabled. This API checks the DMA_TRIG_RX register, which is the event publisher used for triggering the DMA to do a receive data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | interruptMask | Bit mask of interrupts to check. Bitwise OR of DL_UART_DMA_INTERRUPT_RX. |
| Bitwise | OR of DL_UART_DMA_INTERRUPT_RX values |
| __STATIC_INLINE uint32_t DL_UART_getRawDMATransmitEventStatus | ( | const UART_Regs * | uart | ) |
Check interrupt flag of any UART interrupt for DMA transmit event.
Checks if any of the UART interrupts for DMA transmit event are pending. Interrupts do not have to be previously enabled. This API checks the DMA_TRIG_TX register, which is the event publisher used for triggering the DMA to do a transmit data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| DL_UART_DMA_INTERRUPT_TX | if enabled, 0 if not enabled |
| __STATIC_INLINE DL_UART_DMA_IIDX_RX DL_UART_getPendingDMAReceiveEvent | ( | const UART_Regs * | uart | ) |
Get highest priority pending UART interrupt for DMA receive event.
Checks if any of the UART interrupts for DMA receive event are pending. Interrupts do not have to be previously enabled. This API checks the DMA_TRIG_RX register, which is the event publisher used for triggering the DMA to do a receive data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| One | of DL_UART_DMA_IIDX_RX |
| __STATIC_INLINE DL_UART_DMA_IIDX_TX DL_UART_getPendingDMATransmitEvent | ( | const UART_Regs * | uart | ) |
Get highest priority pending UART interrupt for DMA transmit event.
Checks if the UART interrupt for DMA transmit event is pending. Interrupts do not have to be previously enabled. This API checks the DMA_TRIG_TX register, which is the event publisher used for triggering the DMA to do a transmit data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| DL_UART_DMA_IIDX_TX | if pending, 0 if not pending |
| __STATIC_INLINE void DL_UART_clearDMAReceiveEventStatus | ( | UART_Regs * | uart, |
| uint32_t | interruptMask | ||
| ) |
Clear pending UART interrupts for DMA receive event.
This API checks the DMA_TRIG_RX register, which is the event publisher used for triggering the DMA to do a receive data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | interruptMask | Bit mask of interrupts to clear. Bitwise OR of DL_UART_DMA_INTERRUPT_RX. |
| __STATIC_INLINE void DL_UART_clearDMATransmitEventStatus | ( | UART_Regs * | uart | ) |
Clear pending UART interrupt for DMA transmit event.
This API checks the DMA_TRIG_TX register, which is the event publisher used for triggering the DMA to do a transmit data transfer.
| [in] | uart | Pointer to the register overlay for the peripheral |
| __STATIC_INLINE void DL_UART_setClockDivider2 | ( | UART_Regs * | uart, |
| DL_UART_CLOCK_DIVIDE2_RATIO | ratio | ||
| ) |
Sets the second clock divider ratio.
This API sets the CLKDIV2 register, which stores the clock divider ratio used to further divide the UART function clock in IrDA UART mode
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | ratio | The CLKDIV2 value. One of DL_UART_CLOCK_DIVIDE_RATIO |
| __STATIC_INLINE DL_UART_CLOCK_DIVIDE2_RATIO DL_UART_getClockDivider2 | ( | const UART_Regs * | uart | ) |
Gets the value of CLKDIV2.
This API gets the value stored in the CLKDIV2 register, which stores the clock divider ratio to further divide the UART function clock in IrDA Mode
| [in] | uart | Pointer to the register overlay for the peripheral |
| The | CLKDIV2 value. One of DL_UART_CLOCK_DIVIDE2_RATIO |
References DL_UART_Extend_restoreConfiguration(), DL_UART_Extend_saveConfiguration(), DL_UART_Main_restoreConfiguration(), and DL_UART_Main_saveConfiguration().
| bool DL_UART_Main_saveConfiguration | ( | const UART_Regs * | uart, |
| DL_UART_Main_backupConfig * | ptr | ||
| ) |
Save UART Main configuration before entering a power loss state.
Some MSPM0G peripherals residing in PD1 domain do not retain register contents when entering STOP or STANDBY modes. Please refer to the datasheet for the full list of peripheral instances that exhibit this behavior.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | ptr | Configuration backup setup structure. See DL_UART_Main_backupConfig. |
| FALSE | if a configuration already exists in ptr (will not be overwritten). TRUE if a configuration was successfully saved |
Referenced by DL_UART_getClockDivider2().
| bool DL_UART_Main_restoreConfiguration | ( | UART_Regs * | uart, |
| DL_UART_Main_backupConfig * | ptr | ||
| ) |
Restore UART Main configuration after leaving a power loss state.
Some MSPM0G peripherals residing in PD1 domain do not retain register contents when entering STOP or STANDBY modes. Please refer to the datasheet for the full list of peripheral instances that exhibit this behavior.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | ptr | Configuration backup setup structure. See DL_UART_Main_backupConfig. |
| FALSE | if a configuration does not exist in ptr (will not be loaded). TRUE if a configuration successfully loaded |
Referenced by DL_UART_getClockDivider2().
| bool DL_UART_Extend_saveConfiguration | ( | const UART_Regs * | uart, |
| DL_UART_Extend_backupConfig * | ptr | ||
| ) |
Save UART Extend configuration before entering a power loss state.
Some MSPM0G peripherals residing in PD1 domain do not retain register contents when entering STOP or STANDBY modes. Please refer to the datasheet for the full list of peripheral instances that exhibit this behavior.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | ptr | Configuration backup setup structure. See DL_UART_Extend_backupConfig. |
| FALSE | if a configuration already exists in ptr (will not be overwritten). TRUE if a configuration was successfully saved |
Referenced by DL_UART_getClockDivider2().
| bool DL_UART_Extend_restoreConfiguration | ( | UART_Regs * | uart, |
| DL_UART_Extend_backupConfig * | ptr | ||
| ) |
Restore UART Extend configuration after leaving a power loss state.
Some MSPM0G peripherals residing in PD1 domain do not retain register contents when entering STOP or STANDBY modes. Please refer to the datasheet for the full list of peripheral instances that exhibit this behavior.
| [in] | uart | Pointer to the register overlay for the peripheral |
| [in] | ptr | Configuration backup setup structure. See DL_UART_Extend_backupConfig. |
| FALSE | if a configuration does not exist in ptr (will not be loaded). TRUE if a configuration successfully loaded |
Referenced by DL_UART_getClockDivider2().