Mcu_Cfg.h

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  /****************************************************************************
    Project         : AM62Dx_Demo
    Date            : 2024-12-16 16:34:53
    SW Ver          : 10.0.0
    Module Rele Ver : AUTOSAR 4.3.1
 
    This file is generated by EB Tresos
    Do not modify this file,otherwise the software may behave in unexpected way.
 
 ******************************************************************************/
 
#ifndef MCU_CFG_H
#define MCU_CFG_H
 
/*********************************************************************************************************************
 * Standard Header Files
 *********************************************************************************************************************/
 
/*********************************************************************************************************************
 * Other Header Files
 *********************************************************************************************************************/
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define MCU_VARIANT_POST_BUILD  (STD_ON)
 
/**********************************************************************************************************************
 * Version Check
 *********************************************************************************************************************/
#define MCU_CFG_ID                      (0x1U)
 
 
 
/* Requirements: SWS_Mcu_00129 */
#define MCU_CFG_MAJOR_VERSION   (10U)
#define MCU_CFG_MINOR_VERSION   (1U)
#define MCU_CFG_PATCH_VERSION   (3U)
/* @} */
 
/*********************************************************************************************************************
 * Exported enums
 *********************************************************************************************************************/
 
 
/*********************************************************************************************************************
 * Exported Preprocessor #define Constants
 *********************************************************************************************************************/
#define MCU_DEV_ERROR_DETECT       (STD_ON)
#define MCU_GET_RAM_STATE_API      (STD_OFF)
#define MCU_INIT_CLOCK_API         (STD_ON)
#define MCU_PERFORM_RESET_API      (STD_ON)
#define MCU_GET_VERSION_INFO_API   (STD_ON)
#define MCU_INIT_RAM_API           (STD_OFF)
#define MCU_NO_PLL                 (STD_OFF)
#define MCU_REGISTER_READBACK_API (STD_OFF)
 
 
#define DemConf_DemEventParameter_MCU_DEM_NO_EVENT (0xFFFFU)
#define MCU_DEM_NO_EVENT DemConf_DemEventParameter_MCU_DEM_NO_EVENT
 
#define ARRAYSIZE(array)             ((sizeof (array) / \
                                         sizeof ((array)[0])))
                                         
 
 
/*
 * The following defines shall be used as input
 * parameter for: Mcu_SetMode(),
 *                Mcu_InitClock()
 *                Mcu_InitRamSection()
 */
 
/*<MCU_CFG_MODEUSERCONFIG_LIST>*/
 
#define McuConf_McuModeSettingConf_McuModeSettingConf_0 (0U)
/*</MCU_CFG_MODEUSERCONFIG_LIST>*/
 
/*
* Clock configuration
*/
/* The nomenclature is as per AUTOSAR_TPS_ECUConfiguration.pdf
*/
#define McuConf_McuClockSettingConfig_MCU_MCAN0 (0U)
#define McuConf_McuClockSettingConfig_MCU_MCAN1 (1U)
#define McuConf_McuClockSettingConfig_MCAN0 (2U)
#define McuConf_McuClockSettingConfig_MCU_MCSPI0 (3U)
#define McuConf_McuClockSettingConfig_MCU_MCSPI1 (4U)
#define McuConf_McuClockSettingConfig_MCSPI0 (5U)
#define McuConf_McuClockSettingConfig_MCSPI1 (6U)
#define McuConf_McuClockSettingConfig_MCSPI2 (7U)
#define McuConf_McuClockSettingConfig_MCU_GPT0 (8U)
#define McuConf_McuClockSettingConfig_MCU_GPT1 (9U)
#define McuConf_McuClockSettingConfig_MCU_GPT2 (10U)
#define McuConf_McuClockSettingConfig_MCU_GPT3 (11U)
#define McuConf_McuClockSettingConfig_GPT0 (12U)
#define McuConf_McuClockSettingConfig_GPT1 (13U)
#define McuConf_McuClockSettingConfig_GPT2 (14U)
#define McuConf_McuClockSettingConfig_GPT3 (15U)
#define McuConf_McuClockSettingConfig_GPT4 (16U)
#define McuConf_McuClockSettingConfig_GPT5 (17U)
#define McuConf_McuClockSettingConfig_GPT6 (18U)
#define McuConf_McuClockSettingConfig_GPT7 (19U)
#define McuConf_McuClockSettingConfig_WKUP_GPT0 (20U)
#define McuConf_McuClockSettingConfig_WKUP_GPT1 (21U)
#define McuConf_McuClockSettingConfig_RTI0 (22U)
#define McuConf_McuClockSettingConfig_MCU_UART0 (23U)
#define McuConf_McuClockSettingConfig_UART0 (24U)
#define McuConf_McuClockSettingConfig_UART1 (25U)
#define McuConf_McuClockSettingConfig_UART2 (26U)
#define McuConf_McuClockSettingConfig_UART3 (27U)
#define McuConf_McuClockSettingConfig_UART4 (28U)
#define McuConf_McuClockSettingConfig_UART5 (29U)
#define McuConf_McuClockSettingConfig_UART6 (30U)
#define McuConf_McuClockSettingConfig_WKUPUART0 (31U)
#define McuConf_McuClockSettingConfig_ETH0 (32U)
#define McuConf_McuClockSettingConfig_EPWM0 (33U)
#define McuConf_McuClockSettingConfig_EPWM1 (34U)
#define McuConf_McuClockSettingConfig_EPWM2 (35U)
#define McuConf_McuClockSettingConfig_ECAP0 (36U)
#define McuConf_McuClockSettingConfig_ECAP1 (37U)
#define McuConf_McuClockSettingConfig_ECAP2 (38U)
#define McuConf_McuClockSettingConfig_OSPI0 (39U)
 
/*</MCU_CFG_CLOCKUSERCONFIG_LIST>*/
 
/*
Reset Reason Config
*/
/*<MCU_CFG_RESETREASONUSERCONFIG_LIST>*/
#define McuConf_McuResetReasonConf_MCU_POWER_ON_RESET (0U)
#define McuConf_McuResetReasonConf_MCU_WATCHDOG_RESET (1U)
#define McuConf_McuResetReasonConf_MCU_SW_RESET (2U)
#define McuConf_McuResetReasonConf_MCU_RESET_UNDEFINED (3U)
 
/*</MCU_CFG_RESETREASONUSERCONFIG_LIST>*/
 
 
/*********************************************************************************************************************
 * Exported Preprocessor #define Macros
 *********************************************************************************************************************/
 
/*********************************************************************************************************************
 * Exported Type Declarations
 *********************************************************************************************************************/
#define MCU_PERFORM_RESET_MASK                  ((uint32)0x60U)
#define DM_WDT_RST                              ((uint32)0x400000U)
#define SRC_DEBUG_RST                           ((uint32)0x100U)
#define SW_MAIN_POR_FROM_MAIN_DOMAIN            ((uint32)0x2003000U)
#define SW_MAIN_POR_FROM_MCU_DOMAIN             ((uint32)0x1003000U)
#define SW_MAIN_WARMRST_FROM_MAIN_DOMAIN        ((uint32)0x200000U)
#define SW_MAIN_WARMRST_FROM_MCU_DOMAIN         ((uint32)0x10000U)
 
#define MCU_PERFORM_RESET_VAL                   ((uint32)0x6U)
 
#define rstaddr                                 ((LLD_wkup_ctrl_mmr_cfg0Regs*)0x43000000U)
#define RSTADDR_MCU_CTRL_MMR                    ((LLD_mcu_ctrl_mmr_cfg0Regs*)0x04500000U)
 
#define MCU_ERRORRST_MASK                       ((Mcu_RawResetType)0xFFFF0000U)
 
#define MCU_UTILS_ARRAYSIZE(array)             ((sizeof (array) / \
                                                 sizeof ((array)[0])))
                                                 
#define MCU_RESET_STATUS_NUMBER                          ((uint8)0x7)                                                
 
/* Requirements: SWS_Mcu_00252,SWS_Mcu_00234 */
typedef enum
{
    /* Requirements: SWS_Mcu_00134 */
    MCU_POWER_ON_RESET_MAIN_DOMAIN = 0,   
    MCU_POWER_ON_RESET_MCU_DOMAIN,        
    MCU_WATCHDOG_RESET,                   
    MCU_DEBUG_RESET,                      
    MCU_MAIN_WARM_RESET_MAIN_DOMAIN,      
    MCU_MAIN_WARM_RESET_MCU_DOMAIN,       
    MCU_RESET_UNDEFINED,                  
    MCU_RESET_CLEAR                       
} Mcu_ResetType;
 
 
 
typedef enum
{
    MCU,
    MAIN,
    WKUP
} Mcu_DomainType;
 
 
typedef enum
{
    Mcan,
    Mcspi,
    Gpt,
    Gpio,
    Rti,
    I2c,
    Uart,
    Eth,
    Ospi,
    Epwm,
    Ecap,
} Mcu_ModuleName;
 
typedef enum
{
    MCU_CLKSRC_MODULE_ID_MCU_MCAN0 = 188,        /* MCU_MCAN clock*/
    MCU_CLKSRC_MODULE_ID_MCU_MCAN1 = 189,         /* MCU_MCAN clock */
    MCU_CLKSRC_MODULE_ID_MCAN0 = 98,             /* MCU_MCAN clock */
    MCU_CLKSRC_MODULE_ID_MCU_MCSPI0 = 147,       /* MCU_SPI clock */
    MCU_CLKSRC_MODULE_ID_MCU_MCSPI1 = 148,       /* MCU_SPI clock */
    MCU_CLKSRC_MODULE_ID_MCSPI0 = 141,          /* SPI clock */
    MCU_CLKSRC_MODULE_ID_MCSPI1 = 142,          /* SPI clock */
    MCU_CLKSRC_MODULE_ID_MCSPI2 = 143,          /* SPI clock */
    MCU_CLKSRC_MODULE_ID_MCU_GPT0 = 35,         /* GPT clock */
    MCU_CLKSRC_MODULE_ID_MCU_GPT1 = 48,         /* GPT clock */
    MCU_CLKSRC_MODULE_ID_MCU_GPT2 = 49,         /* GPT clock */
    MCU_CLKSRC_MODULE_ID_MCU_GPT3 = 50,         /* GPT clock */
    MCU_CLKSRC_MODULE_ID_GPT0 = 36,             /* GPT clock */
    MCU_CLKSRC_MODULE_ID_GPT1 = 37,             /* GPT clock */
    MCU_CLKSRC_MODULE_ID_GPT2 = 38,             /* GPT clock */
    MCU_CLKSRC_MODULE_ID_GPT3 = 39,             /* GPT clock */
    MCU_CLKSRC_MODULE_ID_GPT4 = 40,             /* GPT clock */
    MCU_CLKSRC_MODULE_ID_GPT5 = 41,             /* GPT clock */
    MCU_CLKSRC_MODULE_ID_GPT6 = 42,             /* GPT clock */
    MCU_CLKSRC_MODULE_ID_GPT7 = 43,             /* GPT clock */
    MCU_CLKSRC_MODULE_ID_WKUP_GPT0 = 110,        /* GPT clock */
    MCU_CLKSRC_MODULE_ID_WKUP_GPT1 = 111,        /* GPT clock */
    MCU_CLKSRC_MODULE_ID_MCU_GPIO0 = 79,        /* WKUP GPIO clock */
    MCU_CLKSRC_MODULE_ID_MCU_RTI0 = 131,        /* RTI clock */
    MCU_CLKSRC_MODULE_ID_MCU_I2C0 = 106,        /* I2C clock */
    MCU_CLKSRC_MODULE_ID_MCU_UART0 = 149,       /* UART clock */
    MCU_CLKSRC_MODULE_ID_UART0 = 146,           /* UART clock */
    MCU_CLKSRC_MODULE_ID_UART1 = 152,           /* UART clock */
    MCU_CLKSRC_MODULE_ID_UART2 = 153,           /* UART clock */
    MCU_CLKSRC_MODULE_ID_UART3 = 154,           /* UART clock */
    MCU_CLKSRC_MODULE_ID_UART4 = 155,           /* UART clock */
    MCU_CLKSRC_MODULE_ID_UART5 = 156,           /* UART clock */
    MCU_CLKSRC_MODULE_ID_UART6 = 158,           /* UART clock */
    MCU_CLKSRC_MODULE_ID_WKUP_UART0 = 114,      /* UART clock */
    MCU_CLKSRC_MODULE_ID_OSPI0 = 75,           /* OSPI clock */
    MCU_CLKSRC_MODULE_ID_ETH0 = 13,             /* ETH clock */
    MCU_CLKSRC_MODULE_ID_EPWM0 = 86,            /*EPWM clock*/
    MCU_CLKSRC_MODULE_ID_EPWM1 = 87,            /*EPWM clock*/
    MCU_CLKSRC_MODULE_ID_EPWM2 = 88,            /*EPWM clock*/
    MCU_CLKSRC_MODULE_ID_ECAP0 = 51,            /*ECAP clock*/
    MCU_CLKSRC_MODULE_ID_ECAP1 = 52,            /*ECAP clock*/
    MCU_CLKSRC_MODULE_ID_ECAP2 = 53,            /*ECAP clock*/
    MCU_CLKSRC_MODULE_ID_MAX = 190            /*MCU_CLKSRC_MODULE_ID_MCU_MCAN1 + 1*/
 
} Mcu_ClkModuleIdType;
 
typedef enum
{
    MCU_CLKSRC_0 = 0,
    MCU_CLKSRC_1,
    MCU_CLKSRC_2,
    MCU_CLKSRC_3,
    MCU_CLKSRC_4,
    MCU_CLKSRC_5,
    MCU_CLKSRC_6,
    MCU_CLKSRC_7,
    MCU_CLKSRC_MAX
}Mcu_ClkSourceIdType;
 
/* Requirements: SWS_Mcu_00250,SWS_Mcu_00231 */
typedef enum
{
    MCU_PLL_LOCKED = 0,
    MCU_PLL_UNLOCKED,
    MCU_PLL_STATUS_UNDEFINED
} Mcu_PllStatusType;
 
typedef enum
{
    MCU_CLKSRC_DPLL = 0,
    MCU_CLKSRC_APLL
} Mcu_PllSourceIdType;
 
typedef struct
{
    uint16  N;
    uint16  M2;
    uint16  FracM;
    uint16  sdDiv;
    uint64  MCU_PLL_CLKOUT;
    uint64  MCU_PLL_HSDIV0;
    uint64  MCU_PLL_HSDIV1;
    uint64  MCU_PLL_HSDIV2;
    uint64  MCU_PLL_HSDIV3;
} Mcu_PllClkDivType;
 
typedef struct
{
    Mcu_PllClkDivType Mcu_PllClk1;
    Mcu_PllClkDivType Mcu_PllClk2;
    Mcu_PllClkDivType Mcu_PllClk3;
} Mcu_PllConfigType;
 
/* Requirements : SWS_Mcu_00256 */
typedef enum
{
    MCU_RAMSTATE_INVALID,
    MCU_RAMSTATE_VALID
} Mcu_RamStateType;
 
/* Requirements: SWS_Mcu_00030 */
typedef struct
{
    P2VAR(uint8, AUTOMATIC, MCU_RAM_COPY) Mcu_RamSectionBaseAddress;
    uint8  Mcu_RamDefaultValue;
    uint32 Mcu_RamSectionBytes;
} Mcu_RamSectionConfigType;
 
typedef P2CONST (Mcu_RamSectionConfigType, AUTOMATIC, MCU_CONFIG_DATA)
Mcu_RamConfigPtrType;
 
typedef P2CONST (Mcu_PllConfigType, AUTOMATIC, MCU_CONFIG_DATA)
Mcu_PllConfigPtrType;
 
typedef P2FUNC (Std_ReturnType, AUTOMATIC, Mcu_CBKFunctionPtrType)
                               (uint32 moduleId, uint32 clkId, uint64 ParentId);
 
typedef struct
{
    uint32         rawresetval;
    Mcu_ResetType resetReason;
} Mcu_ResetStatusMap;
 
 
typedef struct
{
    uint8   numFields;
    const   Mcu_ResetStatusMap *resetMap;
} Mcu_ResetInfo;
 
extern CONST(Mcu_ResetStatusMap,
             MCU_CONST) Mcu_ResetStatusMapTbl[MCU_RESET_STATUS_NUMBER];
             
extern CONST(Mcu_ResetInfo, MCU_CONST) Mcu_ResetInfoTbl ;
 
extern const struct Mcu_ConfigType_s McuModuleConfiguration;
 
#ifdef __cplusplus
}
#endif
 
#endif /* #ifndef MCU_CFG_H */
/**********************************************************************************************************************
 *  End of File: Mcu_Cfg.h
 *********************************************************************************************************************/