AM64x MCU+ SDK  12.01.00
tisci_boardcfg.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2018-2026 Texas Instruments Incorporated
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  *
8  * Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  *
11  * Redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in the
13  * documentation and/or other materials provided with the
14  * distribution.
15  *
16  * Neither the name of Texas Instruments Incorporated nor the names of
17  * its contributors may be used to endorse or promote products derived
18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  *
32  */
54 #ifndef TISCI_BOARD_CFG_H
55 #define TISCI_BOARD_CFG_H
56 
57 #ifdef __cplusplus
58 extern "C"
59 {
60 #endif
61 
62 
63 
64 
65 #define TISCI_BOARDCFG_ABI_MAJ_VALUE 0x00
66 #define TISCI_BOARDCFG_ABI_MIN_VALUE 0x01
67 
68 #define TISCI_BOARDCFG_SEC_ABI_MAJ_VALUE 0x00
69 #define TISCI_BOARDCFG_SEC_ABI_MIN_VALUE 0x01
70 
71 #ifdef CONFIG_SMS_LITE_COPROCESSOR
72 /* Size of reserved 0 substructure in sms-lite secure boardconfig */
73 #define TISCI_BOARDCFG_SEC_RESV0_SIZE (8U)
74 /* Size of reserved 1 substructure in sms-lite secure baordconfig */
75 #define TISCI_BOARDCFG_SEC_RESV1_SIZE (10U)
76 #endif
77 
88  uint16_t magic;
89  uint16_t size;
90 } __attribute__((__packed__));
91 
101 } __attribute__((__packed__));
102 
118 } __attribute__((__packed__));
119 
140  uint8_t scaling_factor;
143 } __attribute__((__packed__));
144 
157 } __attribute__((__packed__));
158 
159 /* \brief How many masters that are permitted in proc acl for access */
160 #define PROCESSOR_ACL_SECONDARY_MASTERS_MAX (3U)
161 
170  uint8_t processor_id;
173 } __attribute__((__packed__));
174 
175 /* \brief How many access control list entries for processors */
176 #define PROCESSOR_ACL_ENTRIES (32U)
177 
187 } __attribute__((__packed__));
188 
197  uint8_t host_id;
199 } __attribute__((__packed__));
200 
202 #define HOST_HIERARCHY_ENTRIES (32U)
203 
213 } __attribute__((__packed__));
214 
225  uint8_t host_id;
226  uint8_t host_perms;
227 } __attribute__((__packed__));
228 
232 #define MAX_NUM_EXT_OTP_MMRS (32U)
233 
243  uint8_t write_host_id;
244 } __attribute__((__packed__));
245 
246 
247 #define MAX_NUM_DKEK_ALLOWED_HOSTS (4U)
248 
249 #ifdef CONFIG_ENABLE_FWL_DEVGRP_REINIT
250 
259 struct tisci_boardcfg_dkek {
262  uint8_t allow_dkek_export_tisci;
263  uint8_t fwl_reinit_devgrp_opt;
264  uint8_t rsvd[2];
265 } __attribute__((__packed__));
266 #else
267 
278  uint8_t rsvd[3];
279 } __attribute__((__packed__));
280 #endif
281 
298  uint8_t safety_host;
299 };
300 
301 
331  uint8_t rsvd;
332  uint32_t min_cert_rev;
334 } __attribute__((__packed__));
335 
350  uint8_t rsvd[4];
351 };
352 
353 #ifdef CONFIG_SMS_LITE_COPROCESSOR
354 
358 struct tisci_boardcfg_sec_resv0 {
359  uint8_t resv[TISCI_BOARDCFG_SEC_RESV0_SIZE];
360 };
361 
365 struct tisci_boardcfg_sec_resv1 {
366  uint8_t resv[TISCI_BOARDCFG_SEC_RESV1_SIZE];
367 };
368 
381 struct tisci_boardcfg_sec {
387  struct tisci_boardcfg_sec_resv0 resv0;
389  struct tisci_boardcfg_sec_resv1 resv1;
390 } __attribute__((__packed__));
391 
392 #else
393 
415 } __attribute__((__packed__));
416 
417 #endif
418 
429 #define TISCI_BOARDCFG_TRACE_DST_UART0 TISCI_BIT(0)
430 #define TISCI_BOARDCFG_TRACE_DST_ITM TISCI_BIT(2)
431 #define TISCI_BOARDCFG_TRACE_DST_MEM TISCI_BIT(3)
432 
455 #define TISCI_BOARDCFG_TRACE_SRC_PM TISCI_BIT(0)
456 #define TISCI_BOARDCFG_TRACE_SRC_RM TISCI_BIT(1)
457 #define TISCI_BOARDCFG_TRACE_SRC_SEC TISCI_BIT(2)
458 #define TISCI_BOARDCFG_TRACE_SRC_BASE TISCI_BIT(3)
459 #define TISCI_BOARDCFG_TRACE_SRC_USER TISCI_BIT(4)
460 #define TISCI_BOARDCFG_TRACE_SRC_SUPR TISCI_BIT(5)
461 #define TISCI_BOARDCFG_TRACE_SRC_LPM TISCI_BIT(6)
462 
474 } __attribute__((__packed__));
475 
476 #ifdef CONFIG_SMS_LITE_COPROCESSOR
477 
484 struct tisci_boardcfg_boot_mode_cfg {
486  uint8_t allowed_host;
487 };
488 
492 struct tisci_boardcfg_resv {
493  uint8_t resv[7];
494 } __attribute__((__packed__));
495 
505 struct tisci_boardcfg {
508  struct tisci_boardcfg_boot_mode_cfg bm_writer_cfg;
509  struct tisci_boardcfg_resv resv;
511 } __attribute__((__packed__));
512 
513 #else
514 
528  struct tisci_boardcfg_msmc msmc;
530 } __attribute__((__packed__));
531 
532 #endif
533 
556  uint8_t sec_bcfg_ver;
559 };
560 
561 #ifdef __cplusplus
562 }
563 #endif
564 
565 #endif /* TISCI_BOARD_CFG_H */
566 
PROCESSOR_ACL_ENTRIES
#define PROCESSOR_ACL_ENTRIES
Definition: tisci_boardcfg.h:176
tisci_boardcfg_secproxy
Secure proxy configuration.
Definition: tisci_boardcfg.h:138
PROCESSOR_ACL_SECONDARY_MASTERS_MAX
#define PROCESSOR_ACL_SECONDARY_MASTERS_MAX
Definition: tisci_boardcfg.h:160
tisci_boardcfg_hashes_data::hashes_received
uint8_t hashes_received
Definition: tisci_boardcfg.h:558
tisci_boardcfg_sec_handover
Configuration of security handover.
Definition: tisci_boardcfg.h:346
tisci_boardcfg_sec_handover::handover_to_host_id
uint8_t handover_to_host_id
Definition: tisci_boardcfg.h:349
tisci_boardcfg_hashes_data::core_bcfg_hash
uint8_t core_bcfg_hash[TISCI_BOARDCFG_HASH_LEN_BYTES]
Definition: tisci_boardcfg.h:553
tisci_boardcfg_extended_otp_entry::host_perms
uint8_t host_perms
Definition: tisci_boardcfg.h:226
TISCI_BOARDCFG_HASH_LEN_BYTES
#define TISCI_BOARDCFG_HASH_LEN_BYTES
This file contains:
Definition: tisci_boardcfg_macros.h:63
tisci_boardcfg::rev
struct tisci_boardcfg_abi_rev rev
Definition: tisci_boardcfg.h:525
TISCI_BOARDCFG_SEC_IV_LEN
#define TISCI_BOARDCFG_SEC_IV_LEN
Definition: tisci_boardcfg_macros.h:66
tisci_boardcfg::debug_cfg
struct tisci_boardcfg_dbg_cfg debug_cfg
Definition: tisci_boardcfg.h:529
tisci_boardcfg_sa2ul_cfg::enable_saul_psil_global_config_writes
uint8_t enable_saul_psil_global_config_writes
Definition: tisci_boardcfg.h:296
tisci_boardcfg_dbg_cfg
Debug console configuration.
Definition: tisci_boardcfg.h:470
tisci_boardcfg_secproxy::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:139
tisci_boardcfg_secure_debug_config::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:327
tisci_boardcfg_extended_otp_entry
access configuration for one OTP MMR. Each MMR is 32 bit wide.
Definition: tisci_boardcfg.h:224
tisci_boardcfg_hashes_data::rm_bcfg_hash
uint8_t rm_bcfg_hash[TISCI_BOARDCFG_HASH_LEN_BYTES]
Definition: tisci_boardcfg.h:551
tisci_boardcfg_proc_acl::proc_acl_entries
struct tisci_boardcfg_proc_acl_entry proc_acl_entries[PROCESSOR_ACL_ENTRIES]
Definition: tisci_boardcfg.h:185
tisci_boardcfg_sec::rev
struct tisci_boardcfg_abi_rev rev
Definition: tisci_boardcfg.h:407
tisci_boardcfg_hashes_data::sec_bcfg_iv
uint8_t sec_bcfg_iv[TISCI_BOARDCFG_SEC_IV_LEN]
Definition: tisci_boardcfg.h:554
tisci_boardcfg_hashes_data::pm_bcfg_hash
uint8_t pm_bcfg_hash[TISCI_BOARDCFG_HASH_LEN_BYTES]
Definition: tisci_boardcfg.h:552
tisci_boardcfg_proc_acl_entry
A single entry of Processor Access Control List.
Definition: tisci_boardcfg.h:169
tisci_boardcfg_sec::sec_handover_cfg
struct tisci_boardcfg_sec_handover sec_handover_cfg
Definition: tisci_boardcfg.h:414
tisci_boardcfg_sec::sec_dbg_config
struct tisci_boardcfg_secure_debug_config sec_dbg_config
Definition: tisci_boardcfg.h:413
tisci_boardcfg_dbg_cfg::trace_src_enables
uint16_t trace_src_enables
Definition: tisci_boardcfg.h:473
tisci_boardcfg_sec::sa2ul_auth_cfg
struct tisci_boardcfg_sa2ul_cfg sa2ul_auth_cfg
Definition: tisci_boardcfg.h:412
tisci_boardcfg_sec_handover::rsvd
uint8_t rsvd[4]
Definition: tisci_boardcfg.h:350
tisci_boardcfg_msmc
Cache configuration so that MSMC can be used for main secure proxy backing memory and ring memory.
Definition: tisci_boardcfg.h:154
tisci_boardcfg_secure_debug_config::allow_jtag_unlock
uint8_t allow_jtag_unlock
Definition: tisci_boardcfg.h:328
tisci_boardcfg_sa2ul_cfg::safety_host_present
uint8_t safety_host_present
Definition: tisci_boardcfg.h:297
TISCI_BOARDCFG_SEC_MAX_NUM_JTAG_UNLOCK_HOSTS
#define TISCI_BOARDCFG_SEC_MAX_NUM_JTAG_UNLOCK_HOSTS
Definition: tisci_boardcfg_macros.h:72
tisci_boardcfg_sa2ul_cfg::auth_resource_owner
uint8_t auth_resource_owner
Definition: tisci_boardcfg.h:295
tisci_boardcfg_sec::otp_config
struct tisci_boardcfg_extended_otp otp_config
Definition: tisci_boardcfg.h:410
tisci_boardcfg_extended_otp::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:241
tisci_boardcfg_dkek::rsvd
uint8_t rsvd[3]
Definition: tisci_boardcfg.h:278
tisci_boardcfg_control::main_isolation_enable
uint8_t main_isolation_enable
Definition: tisci_boardcfg.h:116
tisci_boardcfg_sec_handover::handover_msg_sender
uint8_t handover_msg_sender
Definition: tisci_boardcfg.h:348
tisci_boardcfg_control
Used to enable/disable features in DMSC based on usecase.
Definition: tisci_boardcfg.h:114
tisci_boardcfg_dbg_cfg::trace_dst_enables
uint16_t trace_dst_enables
Definition: tisci_boardcfg.h:472
tisci_boardcfg_hashes_data
structure to hold the board configuration hashes received via X509 certificate
Definition: tisci_boardcfg.h:549
tisci_boardcfg_extended_otp
Access configuration for each OTP row.
Definition: tisci_boardcfg.h:240
tisci_boardcfg_hashes_data::sec_bcfg_hash
uint8_t sec_bcfg_hash[TISCI_BOARDCFG_HASH_LEN_BYTES]
Definition: tisci_boardcfg.h:550
tisci_boardcfg_dkek::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:275
tisci_boardcfg
Format of the complete board configuration.
Definition: tisci_boardcfg.h:524
tisci_boardcfg_msmc::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:155
tisci_boardcfg_dkek::allow_dkek_export_tisci
uint8_t allow_dkek_export_tisci
Definition: tisci_boardcfg.h:277
tisci_boardcfg_proc_acl::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:184
tisci_boardcfg::secproxy
struct tisci_boardcfg_secproxy secproxy
Definition: tisci_boardcfg.h:527
tisci_boardcfg_proc_acl_entry::proc_access_master
uint8_t proc_access_master
Definition: tisci_boardcfg.h:171
tisci_boardcfg_host_hierarchy_entry::host_id
uint8_t host_id
Definition: tisci_boardcfg.h:197
tisci_boardcfg_msmc::msmc_cache_size
uint8_t msmc_cache_size
Definition: tisci_boardcfg.h:156
tisci_boardcfg_secure_debug_config::allowed_debug_level_rsvd
uint8_t allowed_debug_level_rsvd
Definition: tisci_boardcfg.h:330
tisci_boardcfg_control::main_isolation_hostid
uint16_t main_isolation_hostid
Definition: tisci_boardcfg.h:117
tisci_boardcfg_secproxy::scaling_profile
uint8_t scaling_profile
Definition: tisci_boardcfg.h:141
tisci_boardcfg_proc_acl_entry::processor_id
uint8_t processor_id
Definition: tisci_boardcfg.h:170
tisci_boardcfg_sec_handover::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:347
tisci_boardcfg_secure_debug_config::min_cert_rev
uint32_t min_cert_rev
Definition: tisci_boardcfg.h:332
tisci_boardcfg_host_hierarchy_entry
A single entry of Host hierarchy List.
Definition: tisci_boardcfg.h:196
tisci_boardcfg_sec::host_hierarchy
struct tisci_boardcfg_host_hierarchy host_hierarchy
Definition: tisci_boardcfg.h:409
MAX_NUM_DKEK_ALLOWED_HOSTS
#define MAX_NUM_DKEK_ALLOWED_HOSTS
Definition: tisci_boardcfg.h:247
tisci_boardcfg_substructure_header::magic
uint16_t magic
Definition: tisci_boardcfg.h:88
resv
uint8_t resv[3]
Definition: tisci_boot_mode.h:2
tisci_boardcfg_sec
Format of the complete board configuration.
Definition: tisci_boardcfg.h:406
tisci_boardcfg_host_hierarchy
List of SoC hosts and their supervising hosts.
Definition: tisci_boardcfg.h:210
tisci_boardcfg_secure_debug_config::rsvd
uint8_t rsvd
Definition: tisci_boardcfg.h:331
tisci_boardcfg_sec::dkek_config
struct tisci_boardcfg_dkek dkek_config
Definition: tisci_boardcfg.h:411
tisci_boardcfg_control::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:115
tisci_boardcfg_sa2ul_cfg
Configuration of SA2UL resources.
Definition: tisci_boardcfg.h:293
tisci_boardcfg_sa2ul_cfg::safety_host
uint8_t safety_host
Definition: tisci_boardcfg.h:298
MAX_NUM_EXT_OTP_MMRS
#define MAX_NUM_EXT_OTP_MMRS
Maximum number of OTP rows allowed by design.
Definition: tisci_boardcfg.h:232
tisci_boardcfg_proc_acl_entry::proc_access_secondary
uint8_t proc_access_secondary[PROCESSOR_ACL_SECONDARY_MASTERS_MAX]
Definition: tisci_boardcfg.h:172
tisci_boardcfg_abi_rev::tisci_boardcfg_abi_maj
uint8_t tisci_boardcfg_abi_maj
Definition: tisci_boardcfg.h:99
tisci_boardcfg_host_hierarchy::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:211
tisci_boardcfg_hashes_data::sec_bcfg_ver
uint8_t sec_bcfg_ver
Definition: tisci_boardcfg.h:556
tisci_boardcfg_abi_rev::tisci_boardcfg_abi_min
uint8_t tisci_boardcfg_abi_min
Definition: tisci_boardcfg.h:100
__attribute__
struct tisci_boardcfg_sa2ul_cfg __attribute__
tisci_boardcfg_hashes_data::sec_bcfg_rs
uint8_t sec_bcfg_rs[TISCI_BOARDCFG_SEC_RS_LEN]
Definition: tisci_boardcfg.h:555
tisci_boardcfg_substructure_header::size
uint16_t size
Definition: tisci_boardcfg.h:89
tisci_boardcfg_dbg_cfg::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:471
TISCI_BOARDCFG_SEC_RS_LEN
#define TISCI_BOARDCFG_SEC_RS_LEN
Definition: tisci_boardcfg_macros.h:69
tisci_boardcfg_host_hierarchy_entry::supervisor_host_id
uint8_t supervisor_host_id
Definition: tisci_boardcfg.h:198
subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:0
tisci_boardcfg_proc_acl
Control list for which hosts can control which processors.
Definition: tisci_boardcfg.h:183
HOST_HIERARCHY_ENTRIES
#define HOST_HIERARCHY_ENTRIES
How many host hierarchy list entries for hosts.
Definition: tisci_boardcfg.h:202
tisci_boardcfg_extended_otp_entry::host_id
uint8_t host_id
Definition: tisci_boardcfg.h:225
tisci_boardcfg_extended_otp::write_host_id
uint8_t write_host_id
Definition: tisci_boardcfg.h:243
tisci_boardcfg_hashes_data::sec_bcfg_num_iter
uint8_t sec_bcfg_num_iter
Definition: tisci_boardcfg.h:557
tisci_boardcfg_sa2ul_cfg::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:294
tisci_boardcfg_substructure_header
Contains a unique magic number for each substructure and the size of the associated superstructure fo...
Definition: tisci_boardcfg.h:87
tisci_boardcfg::msmc
struct tisci_boardcfg_msmc msmc
Definition: tisci_boardcfg.h:528
tisci_boardcfg_dkek
Access configuration for DKEK.
Definition: tisci_boardcfg.h:274
tisci_boardcfg_secproxy::disable_main_nav_secure_proxy
uint8_t disable_main_nav_secure_proxy
Definition: tisci_boardcfg.h:142
tisci_boardcfg_dkek::allowed_hosts
uint8_t allowed_hosts[MAX_NUM_DKEK_ALLOWED_HOSTS]
Definition: tisci_boardcfg.h:276
tisci_boardcfg_abi_rev
Board Config data ABI version.
Definition: tisci_boardcfg.h:98
tisci_boardcfg_sec::processor_acl_list
struct tisci_boardcfg_proc_acl processor_acl_list
Definition: tisci_boardcfg.h:408
tisci_boardcfg_secure_debug_config::jtag_unlock_hosts
uint8_t jtag_unlock_hosts[TISCI_BOARDCFG_SEC_MAX_NUM_JTAG_UNLOCK_HOSTS]
Definition: tisci_boardcfg.h:333
tisci_boardcfg_extended_otp::otp_entry
struct tisci_boardcfg_extended_otp_entry otp_entry[MAX_NUM_EXT_OTP_MMRS]
Definition: tisci_boardcfg.h:242
tisci_boardcfg_host_hierarchy::host_hierarchy_entries
struct tisci_boardcfg_host_hierarchy_entry host_hierarchy_entries[HOST_HIERARCHY_ENTRIES]
Definition: tisci_boardcfg.h:212
tisci_boardcfg_secure_debug_config
Secure debug control.
Definition: tisci_boardcfg.h:326
tisci_boardcfg_secure_debug_config::allow_wildcard_unlock
uint8_t allow_wildcard_unlock
Definition: tisci_boardcfg.h:329
tisci_boardcfg_secproxy::scaling_factor
uint8_t scaling_factor
Definition: tisci_boardcfg.h:140
tisci_boardcfg::control
struct tisci_boardcfg_control control
Definition: tisci_boardcfg.h:526