AM64x MCU+ SDK  10.00.00
tisci_boardcfg.h
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54 #ifndef TISCI_BOARD_CFG_H
55 #define TISCI_BOARD_CFG_H
56 
57 #ifdef __cplusplus
58 extern "C"
59 {
60 #endif
61 
62 
63 
64 
65 #define TISCI_BOARDCFG_ABI_MAJ_VALUE 0x00
66 #define TISCI_BOARDCFG_ABI_MIN_VALUE 0x01
67 
68 #define TISCI_BOARDCFG_SEC_ABI_MAJ_VALUE 0x00
69 #define TISCI_BOARDCFG_SEC_ABI_MIN_VALUE 0x01
70 
81  uint16_t magic;
82  uint16_t size;
83 } __attribute__((__packed__));
84 
94 } __attribute__((__packed__));
95 
111 } __attribute__((__packed__));
112 
133  uint8_t scaling_factor;
136 } __attribute__((__packed__));
137 
150 } __attribute__((__packed__));
151 
152 /* \brief How many masters that are permitted in proc acl for access */
153 #define PROCESSOR_ACL_SECONDARY_MASTERS_MAX (3U)
154 
163  uint8_t processor_id;
166 } __attribute__((__packed__));
167 
168 /* \brief How many access control list entries for processors */
169 #define PROCESSOR_ACL_ENTRIES (32U)
170 
180 } __attribute__((__packed__));
181 
190  uint8_t host_id;
192 } __attribute__((__packed__));
193 
195 #define HOST_HIERARCHY_ENTRIES (32U)
196 
206 } __attribute__((__packed__));
207 
218  uint8_t host_id;
219  uint8_t host_perms;
220 } __attribute__((__packed__));
221 
225 #define MAX_NUM_EXT_OTP_MMRS (32U)
226 
236  uint8_t write_host_id;
237 } __attribute__((__packed__));
238 
239 
240 #define MAX_NUM_DKEK_ALLOWED_HOSTS (4U)
241 
253  uint8_t rsvd[3];
254 } __attribute__((__packed__));
255 
271  uint8_t safety_host;
272 };
273 
274 
304  uint8_t rsvd;
305  uint32_t min_cert_rev;
307 } __attribute__((__packed__));
308 
323  uint8_t rsvd[4];
324 };
325 
347 } __attribute__((__packed__));
348 
359 #define TISCI_BOARDCFG_TRACE_DST_UART0 TISCI_BIT(0)
360 #define TISCI_BOARDCFG_TRACE_DST_ITM TISCI_BIT(2)
361 #define TISCI_BOARDCFG_TRACE_DST_MEM TISCI_BIT(3)
362 
382 #define TISCI_BOARDCFG_TRACE_SRC_PM TISCI_BIT(0)
383 #define TISCI_BOARDCFG_TRACE_SRC_RM TISCI_BIT(1)
384 #define TISCI_BOARDCFG_TRACE_SRC_SEC TISCI_BIT(2)
385 #define TISCI_BOARDCFG_TRACE_SRC_BASE TISCI_BIT(3)
386 #define TISCI_BOARDCFG_TRACE_SRC_USER TISCI_BIT(4)
387 #define TISCI_BOARDCFG_TRACE_SRC_SUPR TISCI_BIT(5)
388 
400 } __attribute__((__packed__));
401 
415  struct tisci_boardcfg_msmc msmc;
417 } __attribute__((__packed__));
418 
419 
442  uint8_t sec_bcfg_ver;
445 };
446 
447 #ifdef __cplusplus
448 }
449 #endif
450 
451 #endif /* TISCI_BOARD_CFG_H */
452 
PROCESSOR_ACL_ENTRIES
#define PROCESSOR_ACL_ENTRIES
Definition: tisci_boardcfg.h:169
tisci_boardcfg_secproxy
Secure proxy configuration.
Definition: tisci_boardcfg.h:131
PROCESSOR_ACL_SECONDARY_MASTERS_MAX
#define PROCESSOR_ACL_SECONDARY_MASTERS_MAX
Definition: tisci_boardcfg.h:153
tisci_boardcfg_hashes_data::hashes_received
uint8_t hashes_received
Definition: tisci_boardcfg.h:444
tisci_boardcfg_sec_handover
Configuration of security handover.
Definition: tisci_boardcfg.h:319
tisci_boardcfg_sec_handover::handover_to_host_id
uint8_t handover_to_host_id
Definition: tisci_boardcfg.h:322
tisci_boardcfg_hashes_data::core_bcfg_hash
uint8_t core_bcfg_hash[TISCI_BOARDCFG_HASH_LEN_BYTES]
Definition: tisci_boardcfg.h:439
tisci_boardcfg_extended_otp_entry::host_perms
uint8_t host_perms
Definition: tisci_boardcfg.h:219
TISCI_BOARDCFG_HASH_LEN_BYTES
#define TISCI_BOARDCFG_HASH_LEN_BYTES
This file contains:
Definition: tisci_boardcfg_macros.h:63
tisci_boardcfg::rev
struct tisci_boardcfg_abi_rev rev
Definition: tisci_boardcfg.h:412
TISCI_BOARDCFG_SEC_IV_LEN
#define TISCI_BOARDCFG_SEC_IV_LEN
Definition: tisci_boardcfg_macros.h:66
tisci_boardcfg::debug_cfg
struct tisci_boardcfg_dbg_cfg debug_cfg
Definition: tisci_boardcfg.h:416
tisci_boardcfg_sa2ul_cfg::enable_saul_psil_global_config_writes
uint8_t enable_saul_psil_global_config_writes
Definition: tisci_boardcfg.h:269
tisci_boardcfg_dbg_cfg
Debug console configuration.
Definition: tisci_boardcfg.h:396
tisci_boardcfg_secproxy::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:132
tisci_boardcfg_secure_debug_config::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:300
tisci_boardcfg_extended_otp_entry
access configuration for one OTP MMR. Each MMR is 32 bit wide.
Definition: tisci_boardcfg.h:217
tisci_boardcfg_hashes_data::rm_bcfg_hash
uint8_t rm_bcfg_hash[TISCI_BOARDCFG_HASH_LEN_BYTES]
Definition: tisci_boardcfg.h:437
tisci_boardcfg_proc_acl::proc_acl_entries
struct tisci_boardcfg_proc_acl_entry proc_acl_entries[PROCESSOR_ACL_ENTRIES]
Definition: tisci_boardcfg.h:178
tisci_boardcfg_sec::rev
struct tisci_boardcfg_abi_rev rev
Definition: tisci_boardcfg.h:339
tisci_boardcfg_hashes_data::sec_bcfg_iv
uint8_t sec_bcfg_iv[TISCI_BOARDCFG_SEC_IV_LEN]
Definition: tisci_boardcfg.h:440
tisci_boardcfg_hashes_data::pm_bcfg_hash
uint8_t pm_bcfg_hash[TISCI_BOARDCFG_HASH_LEN_BYTES]
Definition: tisci_boardcfg.h:438
tisci_boardcfg_proc_acl_entry
A single entry of Processor Access Control List.
Definition: tisci_boardcfg.h:162
tisci_boardcfg_sec::sec_handover_cfg
struct tisci_boardcfg_sec_handover sec_handover_cfg
Definition: tisci_boardcfg.h:346
tisci_boardcfg_sec::sec_dbg_config
struct tisci_boardcfg_secure_debug_config sec_dbg_config
Definition: tisci_boardcfg.h:345
tisci_boardcfg_dbg_cfg::trace_src_enables
uint16_t trace_src_enables
Definition: tisci_boardcfg.h:399
tisci_boardcfg_sec::sa2ul_auth_cfg
struct tisci_boardcfg_sa2ul_cfg sa2ul_auth_cfg
Definition: tisci_boardcfg.h:344
tisci_boardcfg_sec_handover::rsvd
uint8_t rsvd[4]
Definition: tisci_boardcfg.h:323
tisci_boardcfg_msmc
Cache configuration so that MSMC can be used for main secure proxy backing memory and ring memory.
Definition: tisci_boardcfg.h:147
tisci_boardcfg_secure_debug_config::allow_jtag_unlock
uint8_t allow_jtag_unlock
Definition: tisci_boardcfg.h:301
tisci_boardcfg_sa2ul_cfg::safety_host_present
uint8_t safety_host_present
Definition: tisci_boardcfg.h:270
TISCI_BOARDCFG_SEC_MAX_NUM_JTAG_UNLOCK_HOSTS
#define TISCI_BOARDCFG_SEC_MAX_NUM_JTAG_UNLOCK_HOSTS
Definition: tisci_boardcfg_macros.h:72
tisci_boardcfg_sa2ul_cfg::auth_resource_owner
uint8_t auth_resource_owner
Definition: tisci_boardcfg.h:268
tisci_boardcfg_sec::otp_config
struct tisci_boardcfg_extended_otp otp_config
Definition: tisci_boardcfg.h:342
tisci_boardcfg_extended_otp::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:234
tisci_boardcfg_dkek::rsvd
uint8_t rsvd[3]
Definition: tisci_boardcfg.h:253
tisci_boardcfg_control::main_isolation_enable
uint8_t main_isolation_enable
Definition: tisci_boardcfg.h:109
tisci_boardcfg_sec_handover::handover_msg_sender
uint8_t handover_msg_sender
Definition: tisci_boardcfg.h:321
tisci_boardcfg_control
Used to enable/disable features in DMSC based on usecase.
Definition: tisci_boardcfg.h:107
tisci_boardcfg_dbg_cfg::trace_dst_enables
uint16_t trace_dst_enables
Definition: tisci_boardcfg.h:398
tisci_boardcfg_hashes_data
structure to hold the board configuration hashes received via X509 certificate
Definition: tisci_boardcfg.h:435
tisci_boardcfg_extended_otp
Access configuration for each OTP row.
Definition: tisci_boardcfg.h:233
tisci_boardcfg_hashes_data::sec_bcfg_hash
uint8_t sec_bcfg_hash[TISCI_BOARDCFG_HASH_LEN_BYTES]
Definition: tisci_boardcfg.h:436
tisci_boardcfg_dkek::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:250
tisci_boardcfg
Format of the complete board configuration.
Definition: tisci_boardcfg.h:411
tisci_boardcfg_msmc::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:148
tisci_boardcfg_dkek::allow_dkek_export_tisci
uint8_t allow_dkek_export_tisci
Definition: tisci_boardcfg.h:252
tisci_boardcfg_proc_acl::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:177
tisci_boardcfg::secproxy
struct tisci_boardcfg_secproxy secproxy
Definition: tisci_boardcfg.h:414
tisci_boardcfg_proc_acl_entry::proc_access_master
uint8_t proc_access_master
Definition: tisci_boardcfg.h:164
tisci_boardcfg_host_hierarchy_entry::host_id
uint8_t host_id
Definition: tisci_boardcfg.h:190
tisci_boardcfg_msmc::msmc_cache_size
uint8_t msmc_cache_size
Definition: tisci_boardcfg.h:149
tisci_boardcfg_secure_debug_config::allowed_debug_level_rsvd
uint8_t allowed_debug_level_rsvd
Definition: tisci_boardcfg.h:303
tisci_boardcfg_control::main_isolation_hostid
uint16_t main_isolation_hostid
Definition: tisci_boardcfg.h:110
tisci_boardcfg_secproxy::scaling_profile
uint8_t scaling_profile
Definition: tisci_boardcfg.h:134
tisci_boardcfg_proc_acl_entry::processor_id
uint8_t processor_id
Definition: tisci_boardcfg.h:163
tisci_boardcfg_sec_handover::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:320
tisci_boardcfg_secure_debug_config::min_cert_rev
uint32_t min_cert_rev
Definition: tisci_boardcfg.h:305
tisci_boardcfg_host_hierarchy_entry
A single entry of Host hierarchy List.
Definition: tisci_boardcfg.h:189
tisci_boardcfg_sec::host_hierarchy
struct tisci_boardcfg_host_hierarchy host_hierarchy
Definition: tisci_boardcfg.h:341
MAX_NUM_DKEK_ALLOWED_HOSTS
#define MAX_NUM_DKEK_ALLOWED_HOSTS
Definition: tisci_boardcfg.h:240
tisci_boardcfg_substructure_header::magic
uint16_t magic
Definition: tisci_boardcfg.h:81
tisci_boardcfg_sec
Format of the complete board configuration.
Definition: tisci_boardcfg.h:338
tisci_boardcfg_host_hierarchy
List of SoC hosts and their supervising hosts.
Definition: tisci_boardcfg.h:203
tisci_boardcfg_secure_debug_config::rsvd
uint8_t rsvd
Definition: tisci_boardcfg.h:304
__attribute__
struct tisci_boardcfg_sa2ul_cfg __attribute__
UInteger224 (802.1AS, 10.3.4 time-synchronization spanning tree priority vectors )
tisci_boardcfg_sec::dkek_config
struct tisci_boardcfg_dkek dkek_config
Definition: tisci_boardcfg.h:343
tisci_boardcfg_control::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:108
tisci_boardcfg_sa2ul_cfg
Configuration of SA2UL resources.
Definition: tisci_boardcfg.h:266
tisci_boardcfg_sa2ul_cfg::safety_host
uint8_t safety_host
Definition: tisci_boardcfg.h:271
MAX_NUM_EXT_OTP_MMRS
#define MAX_NUM_EXT_OTP_MMRS
Maximum number of OTP rows allowed by design.
Definition: tisci_boardcfg.h:225
tisci_boardcfg_proc_acl_entry::proc_access_secondary
uint8_t proc_access_secondary[PROCESSOR_ACL_SECONDARY_MASTERS_MAX]
Definition: tisci_boardcfg.h:165
tisci_boardcfg_abi_rev::tisci_boardcfg_abi_maj
uint8_t tisci_boardcfg_abi_maj
Definition: tisci_boardcfg.h:92
tisci_boardcfg_host_hierarchy::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:204
tisci_boardcfg_hashes_data::sec_bcfg_ver
uint8_t sec_bcfg_ver
Definition: tisci_boardcfg.h:442
tisci_boardcfg_abi_rev::tisci_boardcfg_abi_min
uint8_t tisci_boardcfg_abi_min
Definition: tisci_boardcfg.h:93
tisci_boardcfg_hashes_data::sec_bcfg_rs
uint8_t sec_bcfg_rs[TISCI_BOARDCFG_SEC_RS_LEN]
Definition: tisci_boardcfg.h:441
tisci_boardcfg_substructure_header::size
uint16_t size
Definition: tisci_boardcfg.h:82
tisci_boardcfg_dbg_cfg::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:397
TISCI_BOARDCFG_SEC_RS_LEN
#define TISCI_BOARDCFG_SEC_RS_LEN
Definition: tisci_boardcfg_macros.h:69
tisci_boardcfg_host_hierarchy_entry::supervisor_host_id
uint8_t supervisor_host_id
Definition: tisci_boardcfg.h:191
tisci_boardcfg_proc_acl
Control list for which hosts can control which processors.
Definition: tisci_boardcfg.h:176
HOST_HIERARCHY_ENTRIES
#define HOST_HIERARCHY_ENTRIES
How many host hierarchy list entries for hosts.
Definition: tisci_boardcfg.h:195
tisci_boardcfg_extended_otp_entry::host_id
uint8_t host_id
Definition: tisci_boardcfg.h:218
tisci_boardcfg_extended_otp::write_host_id
uint8_t write_host_id
Definition: tisci_boardcfg.h:236
tisci_boardcfg_hashes_data::sec_bcfg_num_iter
uint8_t sec_bcfg_num_iter
Definition: tisci_boardcfg.h:443
tisci_boardcfg_sa2ul_cfg::subhdr
struct tisci_boardcfg_substructure_header subhdr
Definition: tisci_boardcfg.h:267
tisci_boardcfg_substructure_header
Contains a unique magic number for each substructure and the size of the associated superstructure fo...
Definition: tisci_boardcfg.h:80
tisci_boardcfg::msmc
struct tisci_boardcfg_msmc msmc
Definition: tisci_boardcfg.h:415
tisci_boardcfg_dkek
Access configuration for DKEK.
Definition: tisci_boardcfg.h:249
tisci_boardcfg_secproxy::disable_main_nav_secure_proxy
uint8_t disable_main_nav_secure_proxy
Definition: tisci_boardcfg.h:135
tisci_boardcfg_dkek::allowed_hosts
uint8_t allowed_hosts[MAX_NUM_DKEK_ALLOWED_HOSTS]
Definition: tisci_boardcfg.h:251
tisci_boardcfg_abi_rev
Board Config data ABI version.
Definition: tisci_boardcfg.h:91
tisci_boardcfg_sec::processor_acl_list
struct tisci_boardcfg_proc_acl processor_acl_list
Definition: tisci_boardcfg.h:340
tisci_boardcfg_secure_debug_config::jtag_unlock_hosts
uint8_t jtag_unlock_hosts[TISCI_BOARDCFG_SEC_MAX_NUM_JTAG_UNLOCK_HOSTS]
Definition: tisci_boardcfg.h:306
tisci_boardcfg_extended_otp::otp_entry
struct tisci_boardcfg_extended_otp_entry otp_entry[MAX_NUM_EXT_OTP_MMRS]
Definition: tisci_boardcfg.h:235
tisci_boardcfg_host_hierarchy::host_hierarchy_entries
struct tisci_boardcfg_host_hierarchy_entry host_hierarchy_entries[HOST_HIERARCHY_ENTRIES]
Definition: tisci_boardcfg.h:205
tisci_boardcfg_secure_debug_config
Secure debug control.
Definition: tisci_boardcfg.h:299
tisci_boardcfg_secure_debug_config::allow_wildcard_unlock
uint8_t allow_wildcard_unlock
Definition: tisci_boardcfg.h:302
tisci_boardcfg_secproxy::scaling_factor
uint8_t scaling_factor
Definition: tisci_boardcfg.h:133
tisci_boardcfg::control
struct tisci_boardcfg_control control
Definition: tisci_boardcfg.h:413