UDMA RX channel parameters.
Data Fields | |
uint8_t | pauseOnError |
uint8_t | addrType |
uint8_t | chanType |
uint16_t | fetchWordSize |
uint8_t | busPriority |
uint8_t | busQos |
uint8_t | busOrderId |
uint8_t | dmaPriority |
uint16_t | flowIdFwRangeStart |
uint16_t | flowIdFwRangeCnt |
uint8_t | flowEInfoPresent |
uint8_t | flowPsInfoPresent |
uint8_t | flowErrorHandling |
uint8_t | flowSopOffset |
uint8_t | ignoreShortPkts |
uint8_t | ignoreLongPkts |
uint32_t | configDefaultFlow |
uint8_t | burstSize |
uint8_t Udma_ChRxPrms::pauseOnError |
[IN] Bool: When set (TRUE), pause channel on error
uint8_t Udma_ChRxPrms::addrType |
[IN] Address type for this channel. Refer tisci_msg_rm_udmap_rx_ch_cfg_req::rx_atype
uint8_t Udma_ChRxPrms::chanType |
[IN] Channel type. Refer tisci_msg_rm_udmap_rx_ch_cfg_req::rx_chan_type
uint16_t Udma_ChRxPrms::fetchWordSize |
[IN] Descriptor/TR Size in 32-bit words
uint8_t Udma_ChRxPrms::busPriority |
[IN] 3-bit priority value (0=highest, 7=lowest)
uint8_t Udma_ChRxPrms::busQos |
[IN] 3-bit qos value (0=highest, 7=lowest)
uint8_t Udma_ChRxPrms::busOrderId |
[IN] 4-bit orderid value
uint8_t Udma_ChRxPrms::dmaPriority |
[IN] This field selects which scheduling bin the channel will be placed in for bandwidth allocation of the Tx DMA units. Refer tisci_msg_rm_udmap_rx_ch_cfg_req::rx_sched_priority
uint16_t Udma_ChRxPrms::flowIdFwRangeStart |
[IN] Starting flow ID value for firewall check
uint16_t Udma_ChRxPrms::flowIdFwRangeCnt |
[IN] Number of valid flow ID's starting from flowIdFwRangeStart for firewall check
uint8_t Udma_ChRxPrms::flowEInfoPresent |
[IN] default flow config parameter for EPIB Refer tisci_msg_rm_udmap_flow_cfg_req::rx_einfo_present
uint8_t Udma_ChRxPrms::flowPsInfoPresent |
[IN] default flow config parameter for psInfo Refer tisci_msg_rm_udmap_flow_cfg_req::rx_psinfo_present
uint8_t Udma_ChRxPrms::flowErrorHandling |
[IN] default flow config parameter for Error Handling Refer tisci_msg_rm_udmap_flow_cfg_req::rx_error_handling
uint8_t Udma_ChRxPrms::flowSopOffset |
[IN] default flow config parameter for SOP offset Refer tisci_msg_rm_udmap_flow_cfg_req::rx_sop_offset
uint8_t Udma_ChRxPrms::ignoreShortPkts |
[IN] Bool: This field controls whether or not short packets will be treated as exceptions (FALSE) or ignored (TRUE) for the channel. This field is only used when the channel is in split UTC mode.
uint8_t Udma_ChRxPrms::ignoreLongPkts |
[IN] Bool: This field controls whether or not long packets will be treated as exceptions (FALSE) or ignored (TRUE) for the channel. This field is only used when the channel is in split UTC mode.
uint32_t Udma_ChRxPrms::configDefaultFlow |
[IN] Bool: This field controls whether or not to program the default flow. TRUE - Configures the default flow equal to the RX channel number FALSE - Doesn't configure the default flow of channel. The caller can allocate and use other generic flows or get the default flow handle and configure the flow using Udma_flowConfig API at a later point of time
uint8_t Udma_ChRxPrms::burstSize |
[IN] Specifies the nominal burst size and alignment for data transfers on this channel. Refer tisci_msg_rm_udmap_rx_ch_cfg_req::rx_burst_size. Note1: This parameter should be set less than or equal to the FIFO depth parameter set for UTC channel i.e. fifoDepth >= burstSize Note2: In case of packet mode TX channels, the Tx fifoDepth must be at least 2 PSI-L data phases (32 bytes) larger than the burst size given in this field in order to hold the packet info and extended packet info header which is placed at the front of the data packet in addition to the payload i.e. fifoDepth >= (burstSize + 32 bytes)
Below are the supported burst sizes for various channel types Normal Capacity Channel - 64 bytes High Capacity Channel - 64, 128 or 256 bytes Ultra High Capacity Channel - 64, 128 or 256 bytes