AM64x MCU+ SDK  10.00.00

Detailed Description

MCSPI channel object.

Data Fields

MCSPI_ChConfigchCfg
 
uint32_t dmaChConfigNum
 
uint32_t isOpen
 
uint32_t csDisable
 
uint32_t csEnable
 
uint8_t * curTxBufPtr
 
uint8_t * curRxBufPtr
 
uint32_t curTxWords
 
uint32_t curRxWords
 
uint8_t bufWidthShift
 
uint32_t dataWidthBitMask
 
uint32_t effTxFifoDepth
 
uint32_t effRxFifoDepth
 
uint32_t intrMask
 
MCSPI_DmaChConfig dmaChCfg
 
uint32_t chConfRegVal
 
uint32_t chCtrlRegVal
 
uint32_t systRegVal
 

Field Documentation

◆ chCfg

MCSPI_ChConfig* MCSPI_ChObject::chCfg

Channel configuration as provided by user

◆ dmaChConfigNum

uint32_t MCSPI_ChObject::dmaChConfigNum

Index of dmaChConfig in DMA Config Array

◆ isOpen

uint32_t MCSPI_ChObject::isOpen

Flag to indicate whether the instance is opened already

◆ csDisable

uint32_t MCSPI_ChObject::csDisable

Flag to indicate disable chip select

◆ csEnable

uint32_t MCSPI_ChObject::csEnable

Flag to indicate enable chip select

◆ curTxBufPtr

uint8_t* MCSPI_ChObject::curTxBufPtr

Current TX buffer pointer

◆ curRxBufPtr

uint8_t* MCSPI_ChObject::curRxBufPtr

Current RX buffer pointer

◆ curTxWords

uint32_t MCSPI_ChObject::curTxWords

Number of words transmitted. We need seperate counters for TX/RX because when FIFO in enabled, TX writes happen in advance where as RX will happen on actual received data.

◆ curRxWords

uint32_t MCSPI_ChObject::curRxWords

Number of words received

◆ bufWidthShift

uint8_t MCSPI_ChObject::bufWidthShift

Width of buffer in bytes - used for accessing the TX/RX buffer. When dataWidth <= 8, bufWidth = uint8_t (1 byte - 0 shift) When dataWidth > 8 && <= 16, bufWidth = uint16_t (2 bytes - 1 shift) When dataWidth > 16 && <= 32, bufWidth = uint32_t (4 bytes - 2 shift)

◆ dataWidthBitMask

uint32_t MCSPI_ChObject::dataWidthBitMask

Data width mask depending on SPI word size

◆ effTxFifoDepth

uint32_t MCSPI_ChObject::effTxFifoDepth

Effective TX FIFO depth in words - depends on dataWidth

◆ effRxFifoDepth

uint32_t MCSPI_ChObject::effRxFifoDepth

Effective RX FIFO depth in words - depends on dataWidth

◆ intrMask

uint32_t MCSPI_ChObject::intrMask

Interrupt mask to be used for enabling / checking interrupts.

◆ dmaChCfg

MCSPI_DmaChConfig MCSPI_ChObject::dmaChCfg

DMA Configuration for each channel.

◆ chConfRegVal

uint32_t MCSPI_ChObject::chConfRegVal

Channel Control Register Value.

◆ chCtrlRegVal

uint32_t MCSPI_ChObject::chCtrlRegVal

SYST Register Value.

◆ systRegVal

uint32_t MCSPI_ChObject::systRegVal