AM64x MCU+ SDK  12.01.00

Detailed Description

ICSSG Packet Accelerator (PA) statistics counters.

The statistics counters reported by PRU-ICSSG. This structure type must be used by application to retrieve ICSSG statistics via ENET_STATS_IOCTL_GET_HOSTPORT_STATS.

Data Fields

uint64_t hostRxByteCnt
 
uint64_t hostTxByteCnt
 
uint64_t hostRxByteCntMacSlice0
 
uint64_t hostRxByteCntMacSlice1
 
uint64_t hostTxByteCntMacSlice0
 
uint64_t hostTxByteCntMacSlice1
 
uint32_t hostRxPktCnt
 
uint32_t hostTxPktCnt
 
uint32_t hostRxPktCntMacSlice0
 
uint32_t hostRxPktCntMacSlice1
 
uint32_t hostTxPktCntMacSlice0
 
uint32_t hostTxPktCntMacSlice1
 
uint32_t rtu0PktDroppedSlice0
 
uint32_t rtu0PktDroppedSlice1
 
uint32_t port1Q0Overflow
 
uint32_t port1Q1Overflow
 
uint32_t port1Q2Overflow
 
uint32_t port1Q3Overflow
 
uint32_t port1Q4Overflow
 
uint32_t port1Q5Overflow
 
uint32_t port1Q6Overflow
 
uint32_t port1Q7Overflow
 
uint32_t port2Q0Overflow
 
uint32_t port2Q1Overflow
 
uint32_t port2Q2Overflow
 
uint32_t port2Q3Overflow
 
uint32_t port2Q4Overflow
 
uint32_t port2Q5Overflow
 
uint32_t port2Q6Overflow
 
uint32_t port2Q7Overflow
 
uint32_t hostQ0Overflow
 
uint32_t hostQ1Overflow
 
uint32_t hostQ2Overflow
 
uint32_t hostQ3Overflow
 
uint32_t hostQ4Overflow
 
uint32_t hostQ5Overflow
 
uint32_t hostQ6Overflow
 
uint32_t hostQ7Overflow
 
uint32_t hostEgressQPreOverflow
 
uint32_t droppedPktSlice0
 
uint32_t droppedPktSlice1
 
uint32_t rxErrorSlice0
 
uint32_t rxErrorSlice1
 
uint32_t rxEofRtuDsInvalidSlice0
 
uint32_t rxEofRtuDsInvalidSlice1
 
uint32_t txPort1DroppedPkt
 
uint32_t txPort2DroppedPkt
 
uint32_t txPort1TsDroppedPkt
 
uint32_t txPort2TsDroppedPkt
 
uint32_t infPortDisabledSlice0
 
uint32_t infPortDisabledSlice1
 
uint32_t infSavSlice0
 
uint32_t infSavSlice1
 
uint32_t infSaBlSlice0
 
uint32_t infSaBlSlice1
 
uint32_t infPortBlockedSlice0
 
uint32_t infPortBlockedSlice1
 
uint32_t infAftDropTaggedSlice0
 
uint32_t infAftDropTaggedSlice1
 
uint32_t infAftDropPrioTaggedSlice0
 
uint32_t infAftDropPrioTaggedSlice1
 
uint32_t infAftDropNoTagSlice0
 
uint32_t infAftDropNoTagSlice1
 
uint32_t infAftDropNotMemberSlice0
 
uint32_t infAftDropNotMemberSlice1
 
uint32_t fdbNoSpaceToLearn
 
uint32_t preemptBadFragSlice0
 
uint32_t preemptBadFragSlice1
 
uint32_t preemptAsmErrSlice0
 
uint32_t preemptAsmErrSlice1
 
uint32_t preemptFragCntTxSlice0
 
uint32_t preemptFragCntTxSlice1
 
uint32_t preemptAsmOkSlice0
 
uint32_t preemptAsmOkSlice1
 
uint32_t preemptFragCntRxSlice0
 
uint32_t preemptFragCntRxSlice1
 
uint32_t rxEofShortFrameErrSlice0
 
uint32_t rxEofShortFrameErrSlice1
 
uint32_t rxB0DropEarlyEoFSlice0
 
uint32_t rxB0DropEarlyEoFSlice1
 
uint32_t txJumboFrameCutoffSlice0
 
uint32_t txJumboFrameCutoffSlice1
 
uint32_t rxExpFragQDropSlice0
 
uint32_t rxExpFragQDropSlice1
 
uint32_t rxFifoOverRunSlice0
 
uint32_t rxFifoOverRunSlice1
 
uint32_t hostEgrsQPreOvrFloMacSlice0
 
uint32_t hostEgrsQPreOvrFloMacSlice1
 
uint32_t hostEgrsQExpOvrFloMacSlice0
 
uint32_t hostEgrsQExpOvrFloMacSlice1
 
uint32_t cutThroughPacketSlice0
 
uint32_t cutThroughPacketSlice1
 

Field Documentation

◆ hostRxByteCnt

uint64_t IcssgStats_Pa::hostRxByteCnt

Number of valid bytes sent by RX PRU to host via PSI. Valid in Switch mode only.

◆ hostTxByteCnt

uint64_t IcssgStats_Pa::hostTxByteCnt

Number of valid bytes copied by RTU to TX queues. Valid in Switch mode only.

◆ hostRxByteCntMacSlice0

uint64_t IcssgStats_Pa::hostRxByteCntMacSlice0

Number of valid bytes sent by RX PRU to host via PSI. Valid in DualMAC mode only. Port 0.

◆ hostRxByteCntMacSlice1

uint64_t IcssgStats_Pa::hostRxByteCntMacSlice1

Number of valid bytes sent by RX PRU to host via PSI. Valid in DualMAC mode only. Port 1.

◆ hostTxByteCntMacSlice0

uint64_t IcssgStats_Pa::hostTxByteCntMacSlice0

Number of valid bytes sent by TX PRU to host via PSI. Valid in DualMAC mode only. Port 0.

◆ hostTxByteCntMacSlice1

uint64_t IcssgStats_Pa::hostTxByteCntMacSlice1

Number of valid bytes sent by TX PRU to host via PSI. Valid in DualMAC mode only. Port 1.

◆ hostRxPktCnt

uint32_t IcssgStats_Pa::hostRxPktCnt

Number of valid packets sent by RX PRU to host via PSI. Valid in Switch mode only.

◆ hostTxPktCnt

uint32_t IcssgStats_Pa::hostTxPktCnt

Number of valid packets copied by RTU to TX queues. Valid in Switch mode only.

◆ hostRxPktCntMacSlice0

uint32_t IcssgStats_Pa::hostRxPktCntMacSlice0

Number of valid packets sent by RX PRU to host via PSI. Valid in DualMAC mode only. Port 0.

◆ hostRxPktCntMacSlice1

uint32_t IcssgStats_Pa::hostRxPktCntMacSlice1

Number of valid packets sent by RX PRU to host via PSI. Valid in DualMAC mode only. Port 1.

◆ hostTxPktCntMacSlice0

uint32_t IcssgStats_Pa::hostTxPktCntMacSlice0

Number of valid packets copied by RTU to TX queues. Valid in DualMAC mode only. Port 0.

◆ hostTxPktCntMacSlice1

uint32_t IcssgStats_Pa::hostTxPktCntMacSlice1

Number of valid packets copied by RTU to TX queues. Valid in DualMAC mode only. Port 1.

◆ rtu0PktDroppedSlice0

uint32_t IcssgStats_Pa::rtu0PktDroppedSlice0

Diagnostic error counter — increments when RTU drops a locally injected packet due to port being disabled or a rule violation. Port 0.

◆ rtu0PktDroppedSlice1

uint32_t IcssgStats_Pa::rtu0PktDroppedSlice1

Diagnostic error counter — increments when RTU drops a locally injected packet due to port being disabled or a rule violation. Port 1.

◆ port1Q0Overflow

uint32_t IcssgStats_Pa::port1Q0Overflow

TX queue 0 overflow counter for Port 1. Valid in Switch mode only.

◆ port1Q1Overflow

uint32_t IcssgStats_Pa::port1Q1Overflow

TX queue 1 overflow counter for Port 1. Valid in Switch mode only.

◆ port1Q2Overflow

uint32_t IcssgStats_Pa::port1Q2Overflow

TX queue 2 overflow counter for Port 1. Valid in Switch mode only.

◆ port1Q3Overflow

uint32_t IcssgStats_Pa::port1Q3Overflow

TX queue 3 overflow counter for Port 1. Valid in Switch mode only.

◆ port1Q4Overflow

uint32_t IcssgStats_Pa::port1Q4Overflow

TX queue 4 overflow counter for Port 1. Valid in Switch mode only.

◆ port1Q5Overflow

uint32_t IcssgStats_Pa::port1Q5Overflow

TX queue 5 overflow counter for Port 1. Valid in Switch mode only.

◆ port1Q6Overflow

uint32_t IcssgStats_Pa::port1Q6Overflow

TX queue 6 overflow counter for Port 1. Valid in Switch mode only.

◆ port1Q7Overflow

uint32_t IcssgStats_Pa::port1Q7Overflow

TX queue 7 overflow counter for Port 1. Valid in Switch mode only.

◆ port2Q0Overflow

uint32_t IcssgStats_Pa::port2Q0Overflow

TX queue 0 overflow counter for Port 2. Valid in Switch mode only.

◆ port2Q1Overflow

uint32_t IcssgStats_Pa::port2Q1Overflow

TX queue 1 overflow counter for Port 2. Valid in Switch mode only.

◆ port2Q2Overflow

uint32_t IcssgStats_Pa::port2Q2Overflow

TX queue 2 overflow counter for Port 2. Valid in Switch mode only.

◆ port2Q3Overflow

uint32_t IcssgStats_Pa::port2Q3Overflow

TX queue 3 overflow counter for Port 2. Valid in Switch mode only.

◆ port2Q4Overflow

uint32_t IcssgStats_Pa::port2Q4Overflow

TX queue 4 overflow counter for Port 2. Valid in Switch mode only.

◆ port2Q5Overflow

uint32_t IcssgStats_Pa::port2Q5Overflow

TX queue 5 overflow counter for Port 2. Valid in Switch mode only.

◆ port2Q6Overflow

uint32_t IcssgStats_Pa::port2Q6Overflow

TX queue 6 overflow counter for Port 2. Valid in Switch mode only.

◆ port2Q7Overflow

uint32_t IcssgStats_Pa::port2Q7Overflow

TX queue 7 overflow counter for Port 2. Valid in Switch mode only.

◆ hostQ0Overflow

uint32_t IcssgStats_Pa::hostQ0Overflow

Host egress queue 0 overflow counter. Reserved, not currently used.

◆ hostQ1Overflow

uint32_t IcssgStats_Pa::hostQ1Overflow

Host egress queue 1 overflow counter. Reserved, not currently used.

◆ hostQ2Overflow

uint32_t IcssgStats_Pa::hostQ2Overflow

Host egress queue 2 overflow counter. Reserved, not currently used.

◆ hostQ3Overflow

uint32_t IcssgStats_Pa::hostQ3Overflow

Host egress queue 3 overflow counter. Reserved, not currently used.

◆ hostQ4Overflow

uint32_t IcssgStats_Pa::hostQ4Overflow

Host egress queue 4 overflow counter. Reserved, not currently used.

◆ hostQ5Overflow

uint32_t IcssgStats_Pa::hostQ5Overflow

Host egress queue 5 overflow counter. Reserved, not currently used.

◆ hostQ6Overflow

uint32_t IcssgStats_Pa::hostQ6Overflow

Host egress queue 6 overflow counter. Reserved, not currently used.

◆ hostQ7Overflow

uint32_t IcssgStats_Pa::hostQ7Overflow

Host egress queue 7 overflow counter. Reserved, not currently used.

◆ hostEgressQPreOverflow

uint32_t IcssgStats_Pa::hostEgressQPreOverflow

Host RX pre-emptible egress queue overflow counter. Valid in Switch mode only.

◆ droppedPktSlice0

uint32_t IcssgStats_Pa::droppedPktSlice0

Increments when a packet is dropped at PRU due to a rule violation. Port 0.

◆ droppedPktSlice1

uint32_t IcssgStats_Pa::droppedPktSlice1

Increments when a packet is dropped at PRU due to a rule violation. Port 1.

◆ rxErrorSlice0

uint32_t IcssgStats_Pa::rxErrorSlice0

Increments when a CRC error or Min/Max frame size error is detected. Port 0.

◆ rxErrorSlice1

uint32_t IcssgStats_Pa::rxErrorSlice1

Increments when a CRC error or Min/Max frame size error is detected. Port 1.

◆ rxEofRtuDsInvalidSlice0

uint32_t IcssgStats_Pa::rxEofRtuDsInvalidSlice0

RTU diagnostic counter — increments when RTU detects a Data Status invalid condition. Port 0.

◆ rxEofRtuDsInvalidSlice1

uint32_t IcssgStats_Pa::rxEofRtuDsInvalidSlice1

RTU diagnostic counter — increments when RTU detects a Data Status invalid condition. Port 1.

◆ txPort1DroppedPkt

uint32_t IcssgStats_Pa::txPort1DroppedPkt

Counter for packets dropped via NRT TX Port1

◆ txPort2DroppedPkt

uint32_t IcssgStats_Pa::txPort2DroppedPkt

Counter for packets dropped via NRT TX Port2

◆ txPort1TsDroppedPkt

uint32_t IcssgStats_Pa::txPort1TsDroppedPkt

Counter for packets with TS flag dropped via NRT TX Port1

◆ txPort2TsDroppedPkt

uint32_t IcssgStats_Pa::txPort2TsDroppedPkt

Counter for packets with TS flag dropped via NRT TX Port2

◆ infPortDisabledSlice0

uint32_t IcssgStats_Pa::infPortDisabledSlice0

Port 0 diagnostic error counter which increments when RX frame is dropped due to port is disabled

◆ infPortDisabledSlice1

uint32_t IcssgStats_Pa::infPortDisabledSlice1

Port 1 diagnostic error counter which increments when RX frame is dropped due to port is disabled

◆ infSavSlice0

uint32_t IcssgStats_Pa::infSavSlice0

Port 0 diagnostic error counter which increments when RX frame is dropped due to SA violation

◆ infSavSlice1

uint32_t IcssgStats_Pa::infSavSlice1

Port 1 diagnostic error counter which increments when RX frame is dropped due to SA violation

◆ infSaBlSlice0

uint32_t IcssgStats_Pa::infSaBlSlice0

Port 0 diagnostic error counter which increments when RX frame is dropped due to SA black listed

◆ infSaBlSlice1

uint32_t IcssgStats_Pa::infSaBlSlice1

Port 1 diagnostic error counter which increments when RX frame is dropped due to SA black listed

◆ infPortBlockedSlice0

uint32_t IcssgStats_Pa::infPortBlockedSlice0

Port 0 diagnostic error counter which increments when RX frame is dropped due to port blocked and not a special frame

◆ infPortBlockedSlice1

uint32_t IcssgStats_Pa::infPortBlockedSlice1

Port 1 diagnostic error counter which increments when RX frame is dropped due to port blocked and not a special frame

◆ infAftDropTaggedSlice0

uint32_t IcssgStats_Pa::infAftDropTaggedSlice0

Port 0 diagnostic error counter which increments when RX frame is dropped due to tagged

◆ infAftDropTaggedSlice1

uint32_t IcssgStats_Pa::infAftDropTaggedSlice1

Port 1 diagnostic error counter which increments when RX frame is dropped due to tagged

◆ infAftDropPrioTaggedSlice0

uint32_t IcssgStats_Pa::infAftDropPrioTaggedSlice0

Port 0 diagnostic error counter which increments when RX frame is dropped due to priority tagged

◆ infAftDropPrioTaggedSlice1

uint32_t IcssgStats_Pa::infAftDropPrioTaggedSlice1

Port 1 diagnostic error counter which increments when RX frame is dropped due to priority tagged

◆ infAftDropNoTagSlice0

uint32_t IcssgStats_Pa::infAftDropNoTagSlice0

Port 0 diagnostic error counter which increments when RX frame is dropped due to untagged

◆ infAftDropNoTagSlice1

uint32_t IcssgStats_Pa::infAftDropNoTagSlice1

Port 1 diagnostic error counter which increments when RX frame is dropped due to untagged

◆ infAftDropNotMemberSlice0

uint32_t IcssgStats_Pa::infAftDropNotMemberSlice0

Port 0 diagnostic error counter which increments when RX frame is dropped due to port not member of VLAN

◆ infAftDropNotMemberSlice1

uint32_t IcssgStats_Pa::infAftDropNotMemberSlice1

Port 1 diagnostic error counter which increments when RX frame is dropped due to port not member of VLAN

◆ fdbNoSpaceToLearn

uint32_t IcssgStats_Pa::fdbNoSpaceToLearn

PRU diagnostic error counter which increments when an entry couldn't be learned

◆ preemptBadFragSlice0

uint32_t IcssgStats_Pa::preemptBadFragSlice0

Port 0 bad fragment error counter

◆ preemptBadFragSlice1

uint32_t IcssgStats_Pa::preemptBadFragSlice1

Port 1 bad fragment error counter

◆ preemptAsmErrSlice0

uint32_t IcssgStats_Pa::preemptAsmErrSlice0

Port 0 fragment assembly error counter

◆ preemptAsmErrSlice1

uint32_t IcssgStats_Pa::preemptAsmErrSlice1

Port 1 fragment assembly error counter

◆ preemptFragCntTxSlice0

uint32_t IcssgStats_Pa::preemptFragCntTxSlice0

Port 0 fragment count in TX

◆ preemptFragCntTxSlice1

uint32_t IcssgStats_Pa::preemptFragCntTxSlice1

Port 1 fragment count in TX

◆ preemptAsmOkSlice0

uint32_t IcssgStats_Pa::preemptAsmOkSlice0

Port 0 assembly completed

◆ preemptAsmOkSlice1

uint32_t IcssgStats_Pa::preemptAsmOkSlice1

Port 1 assembly completed

◆ preemptFragCntRxSlice0

uint32_t IcssgStats_Pa::preemptFragCntRxSlice0

Port 0 fragments received

◆ preemptFragCntRxSlice1

uint32_t IcssgStats_Pa::preemptFragCntRxSlice1

Port 1 fragments received

◆ rxEofShortFrameErrSlice0

uint32_t IcssgStats_Pa::rxEofShortFrameErrSlice0

PRU diagnostic error counter — increments if EOF task is scheduled without receiving RX_B1. Port 0.

◆ rxEofShortFrameErrSlice1

uint32_t IcssgStats_Pa::rxEofShortFrameErrSlice1

PRU diagnostic error counter — increments if EOF task is scheduled without receiving RX_B1. Port 1.

◆ rxB0DropEarlyEoFSlice0

uint32_t IcssgStats_Pa::rxB0DropEarlyEoFSlice0

Diagnostic counter — increments when a frame is dropped due to early EOF received in the B0 buffer. Port 0.

◆ rxB0DropEarlyEoFSlice1

uint32_t IcssgStats_Pa::rxB0DropEarlyEoFSlice1

Diagnostic counter — increments when a frame is dropped due to early EOF received in the B0 buffer. Port 1.

◆ txJumboFrameCutoffSlice0

uint32_t IcssgStats_Pa::txJumboFrameCutoffSlice0

TX diagnostic counter — increments when a frame is cut off to prevent packet size exceeding 2000 bytes. Port 0.

◆ txJumboFrameCutoffSlice1

uint32_t IcssgStats_Pa::txJumboFrameCutoffSlice1

TX diagnostic counter — increments when a frame is cut off to prevent packet size exceeding 2000 bytes. Port 1.

◆ rxExpFragQDropSlice0

uint32_t IcssgStats_Pa::rxExpFragQDropSlice0

Diagnostic counter — increments when an express frame is received in the same queue as a previous fragment. Port 0.

◆ rxExpFragQDropSlice1

uint32_t IcssgStats_Pa::rxExpFragQDropSlice1

Diagnostic counter — increments when an express frame is received in the same queue as a previous fragment. Port 1.

◆ rxFifoOverRunSlice0

uint32_t IcssgStats_Pa::rxFifoOverRunSlice0

RX FIFO overrun — increments when the L1 receive FIFO is full because firmware cannot process frames fast enough; the arriving frame is dropped. Port 0.

◆ rxFifoOverRunSlice1

uint32_t IcssgStats_Pa::rxFifoOverRunSlice1

RX FIFO overrun — increments when the L1 receive FIFO is full because firmware cannot process frames fast enough; the arriving frame is dropped. Port 1.

◆ hostEgrsQPreOvrFloMacSlice0

uint32_t IcssgStats_Pa::hostEgrsQPreOvrFloMacSlice0

Host RX pre-emptible egress queue overflow counter — DualMAC mode only Port 0

◆ hostEgrsQPreOvrFloMacSlice1

uint32_t IcssgStats_Pa::hostEgrsQPreOvrFloMacSlice1

Host RX pre-emptible egress queue overflow counter — DualMAC mode only Port 1

◆ hostEgrsQExpOvrFloMacSlice0

uint32_t IcssgStats_Pa::hostEgrsQExpOvrFloMacSlice0

Host RX express egress queue overflow counter — DualMAC mode only Port 0

◆ hostEgrsQExpOvrFloMacSlice1

uint32_t IcssgStats_Pa::hostEgrsQExpOvrFloMacSlice1

Host RX express egress queue overflow counter — DualMAC mode only Port 1

◆ cutThroughPacketSlice0

uint32_t IcssgStats_Pa::cutThroughPacketSlice0

Cut-through packet counter for port 0

◆ cutThroughPacketSlice1

uint32_t IcssgStats_Pa::cutThroughPacketSlice1

Cut-through packet counter for port 1