DDR Inline ECC region The structure specifies the DDR inline ECC region start and End address.
Data Fields | |
uint32_t | ddrEccStart0 |
uint32_t | ddrEccEnd0 |
uint32_t | ddrEccStart1 |
uint32_t | ddrEccEnd1 |
uint32_t | ddrEccStart2 |
uint32_t | ddrEccEnd2 |
uint32_t DDR_EccRegion::ddrEccStart0 |
DDR inline ECC region-0 start address
uint32_t DDR_EccRegion::ddrEccEnd0 |
DDR inline ECC region-0 end address
uint32_t DDR_EccRegion::ddrEccStart1 |
DDR inline ECC region-1 start address
uint32_t DDR_EccRegion::ddrEccEnd1 |
DDR inline ECC region-1 end address
uint32_t DDR_EccRegion::ddrEccStart2 |
DDR inline ECC region-2 start address
uint32_t DDR_EccRegion::ddrEccEnd2 |
DDR inline ECC region-2 end address