| OS | Supported CPUs | SysConfig Support | Key features tested | Key features not tested / NOT supported |
| FreeRTOS Kernel | R5F, M4F, A53 | NA | Task, Task notification, interrupts, semaphores, mutexes, timers, event groups. ROV views in CCS IDE, Task load measurement using FreeRTOS run time statistics APIs. | Only single core A53 FreeRTOS is supported. Second core is NOT used. |
| FreeRTOS SMP Kernel | A53 | NA | Task, Task notification, interrupts, semaphores, mutexes, timers, event groups. ROV views in CCS IDE, Task load measurement using FreeRTOS run time statistics APIs. | - |
| FreeRTOS POSIX | R5F, M4F, A53 | NA | pthread, mqueue, semaphore, clock | - |
| NO RTOS | R5F, M4F, A53 | NA | See Driver Porting Layer (DPL) below | Only single core A53 NORTOS is supported. Second core is NOT used. |
| Module | Supported CPUs | SysConfig Support | OS support | Key features tested | Key features not tested / NOT supported |
| Address Translate | M4F | YES | FreeRTOS, NORTOS | Use RAT to allow M4F access to peripheral address space | - |
| Cache | R5F, A53 | YES | FreeRTOS, NORTOS | Cache write back, invalidate, enable/disable | - |
| Clock | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Tick timer at user specified resolution, timeouts and delays | - |
| CpuId | R5F | NA | FreeRTOS, NORTOS | Verify Core ID and Cluster ID that application is running | - |
| CycleCounter | R5F, M4F, A53 | NA | FreeRTOS, NORTOS | Measure CPU cycles using CPU specific internal counters | - |
| Debug | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Logging and assert to any combo of: UART, CCS, shared memory | - |
| Heap | R5F, M4F, A53 | NA | FreeRTOS, NORTOS | Create arbitrary heaps in user defined memory segments | - |
| Hwi | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Interrupt register, enable/disable/restore | - |
| MPU | R5F, M4F | YES | FreeRTOS, NORTOS | Setup MPU and control access to address space | - |
| MMU | A53 | YES | NORTOS | Setup MMU and control access to address space | - |
| Semaphore | R5F, M4F, A53 | NA | FreeRTOS, NORTOS | Binary, Counting Semaphore, recursive mutexs with timeout | - |
| Task | R5F, M4F, A53 | NA | FreeRTOS | Create, delete tasks | - |
| Timer | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Configure arbitrary timers | - |
| Event | R5F, M4F | YES | FreeRTOS | Setting, getting, clearing, and waiting of Event bits | - |
| Peripheral | Supported CPUs | SysConfig Support | DMA Supported | Key features tested | Key features not tested / NOT supported |
| ADC | R5F, A53 | YES | Yes | Single conversion (one-shot mode), interrupt mode, DMA mode | Continuous conversion not tested |
| CRC | R5F | YES | No | CRC in full CPU mode | - |
| DDR | R5F | YES | No | Tested LPDDR4 at 400MHz frequency. | - |
| ECAP | R5F, A53 | YES | No | Frequency, Duty cycle, interrupt mode | - |
| EPWM | R5F, A53 | YES | No | Different Frequency, Duty cycle, interrupt mode, Deadband and chopper module | Tripzone module not tested |
| EQEP | R5F, A53 | YES | No | Signal Frequency and Direction, interrupt mode | - |
| FSI (RX/TX) | R5F | YES | No | RX, TX, polling, interrupt mode, single/dual lanes | - |
| GPIO | R5F, M4F, A53 | YES | No | Basic input/output, GPIO as interrupt | - |
| GTC | R5F, A53 | NA | No | Enable GTC, setting FID (Frequency indicator) | - |
| I2C | R5F, M4F, A53 | YES | No | Controller mode, basic read/write, polling and interrupt mode | Target mode not supported. M4F not tested due to EVM limitation |
| IPC Notify | R5F, M4F, A53 | YES | No | Low latency IPC between RTOS/NORTOS CPUs | - |
| IPC Rpmsg | R5F, M4F, A53 | YES | No | RPMessage protocol based IPC for all R5F, M4F, A53 running NORTOS/FreeRTOS/Linux | - |
| MCAN | R5F, A53 | YES | No | RX, TX, interrupt and polling mode | - |
| MCSPI | R5F, M4F, A53 | YES | Yes | Controller/Peripheral mode, basic read/write, polling, interrupt and DMA mode | - |
| MDIO | R5F | NA | No | Register read/write, link status and link interrupt enable API | - |
| MMCSD | R5F, A53 | YES | Yes | Raw read/write and file I/O on MMCSD0 eMMC, and MMCSD1 SD. eMMC tested till HS SDR mode (8-bit data, 52 MHz), SD tested till SD HS mode (4-bit, 25 MHz) | Interrupt mode not tested |
| OSPI | R5F, A53 | YES | Yes | Read direct, Write indirect, Read/Write commands, DMA for read, PHY Mode | Interrupt mode not supported |
| PCIe | R5F | YES | No | Buffer Transfer between EP and RC modes. Legacy interrupt | MSI and MSIx capability |
| Pinmux | R5F, M4F, A53 | YES | No | Tested with multiple peripheral pinmuxes | - |
| PRUICSS | R5F | YES | No | Tested with Ethercat, EtherNet/IP, IO-Link, ICSS-EMAC, HDSL, EnDat | - |
| SOC | R5F, M4F, A53 | YES | No | lock/unlock MMRs, get CPU clock, CPU name, clock enable, set frequency, SW Warm/POR Reset, Address Translation | - |
| Sciclient | R5F, M4F, A53 | YES | No | Tested with clock setup, module on/off | - |
| SPINLOCK | R5F, M4F, A53 | NA | No | Lock, unlock HW spinlocks | - |
| UART | R5F, M4F, A53 | YES | Yes | Basic read/write, polling, interrupt mode, | HW flow control not tested. DMA mode not supported |
| UDMA | R5F, A53 | YES | Yes | Basic memory copy, SW trigger, Chaining | - |
| WDT | R5F, A53 | YES | No | Interrupt after watchdog expiry | Reset not supported |
| Module | Supported CPUs | SysConfig Support | OS Support | Key features tested | Key features not tested |
| TSN | R5F | NO | FreeRTOS | gPTP IEEE 802.1 AS-2020 compliant gPTP stack, End Nodes and Bridge mode support, YANG data model configuration | Multi-Clock Domain |
| A53 | NO | FreeRTOS |
| LwIP | R5F | YES | FreeRTOS, NORTOS | TCP/UDP IP networking stack with and without checksum offload enabled, TCP/UDP IP networking stack with server and client functionality, basic Socket APIs, netconn APIs and raw APIs, DHCP, ping, TCP iperf, scatter-gather, DSCP priority mapping, LwIP bridge, shared memory driver | Other LwIP features |
| A53 | YES | FreeRTOS |
| Ethernet driver (ENET) | R5F | YES | FreeRTOS, NORTOS | Ethernet as port using CPSW, MAC loopback and PHY loopback, Layer 2 MAC, Packet Timestamping, CPSW Switch, Policer and Classifier, MDIO Manual Mode, CBS (IEEE 802.1Qav) on CPSW, IET (IEEE 802.1Qbu) on CPSW, Strapped PHY (Early Ethernet), cut through switch on CPSW | RMII mode |
| A53 | YES | FreeRTOS |
| Mbed-TLS | R5F | NO | FreeRTOS | Tested software cryptography after porting, used mbedTLS with LwIP to implement HTTPS server | Hardware offloaded cryptography |
| ID | Head Line | Module | Applicable Releases | Applicable Devices | Workaround |
| EXT_SITMPUSW-22 | Pcie_benchmark, Pcie_buf_transfer, Pcie_legacy_irq, Pcie_msi_irq, Pcie_msix_irq and sbl_pcie are broken on 9.2.1 release | PCIE | 9.2.1 onwards | AM64x, AM243x | None. |
| EXT_SITMPUSW-21 | DMA not working with ADC FIFO 1 | ADC | 7.3.0 onwards | AM64x, AM243x | Use ADC FIFO 0
|
| EXT_SITMPUSW-23 | [Docs] Sysfw RM/PM documentation doesn't specify AM243x | Docs | 8.0.0 onwards | AM243x | - |
| EXT_SITMPUSW-24 | PKA ECDSA sign verify is not working for P-521 and BrainPool P-512R1 curves | SECURITY | 8.2.0 onwards | AM64x, AM243x | - |
| EXT_SITMPUSW-25 | Last 512KB of memory is not accessible in dev boot mode flow | SBL | 8.4.0 | AM64x, AM243x | Use other boot modes |
| EXT_SITMPUSW-26 | PCIe MSI error when connected to Linux Root Complex | PCIe | 8.6.0 | AM64x, AM243x | - |
| EXT_SITMPUSW-73 | OSPI_readDirect and OSPI_isPhyEnable do not correctly check if the PHY is enabled | OSPI | 10.1.0 onwards | AM64x, AM243x | None. |
| EXT_SITMPUSW-81 | MCU+ SDK: EPWM_tbTimebaseClkCfg does not choose the optimal pre-scaler combination | EPWM | 7.3.0 onwards | AM64x, AM243x | None |
| EXT_SITMPUSW-82 | AM64/AM243: M4F core getting hangs when doing IPC with Linux | IPC | 7.3.0 onwards | AM64x, AM243x | None |
| EXT_SITMPUSW-83 | DPL - configure HwiP_MAX_INTERRUPTS based on SOC supported values | DPL | 7.3.0 onwards | AM64x, AM243x | None |
| EXT_SITMPUSW-86 | The configurations of GPIO interrupt routers are based on banks rather than individual pins. | GPIO | 7.3.0 onwards | AM64x, AM243x | None |
| EXT_SITMPUSW-109 | Wrong comments on HwiP_inISR() API | DPL | 7.3.0 onwards | AM64x, AM243x | None |
| EXT_SITMPUSW-111 | UART DMA LLD Build issue | UART | 7.3.0 onwards | AM64x, AM243x | None |
| EXT_SITMPUSW-116 | AM64X : Application gets stuck with Multiple UARTS with DMA enabled | UART | 7.3.0 onwards | AM64x, AM243x | None |
| EXT_SITMPUSW-117 | Linux Kernel IPC Examples are broken | IPC | 7.3.0 onwards | AM64x, AM243x | None |
| EXT_SITMPUSW-118 | OSPI tuning algorithm finds points in noisy region on rare scenarios | OSPI | 7.3.0 onwards | AM64x, AM243x | Adjust the tuning window to not cover the noisy region |
| EXT_SITMPUSW-119 | UART LLD SysConfig fails to generate the correct files | UART | 7.3.0 onwards | AM64x, AM243x | None |
| EXT_SITMPUSW-121 | FORCE bit not book keeped properly for MCSPI DMA mode of operation | MCSPI | 7.3.0 onwards | AM64x, AM243x | None |
| EXT_EP-12719 | Throughput drops to 95.5% with bidirectional mixed traffic | Ethernet (ICSSG) | 11.01.00 onwards | AM64x, AM243x | None |
| EXT_SITMPUSW-131 | AM64X/AM243X: ENET: TCP/IP bidirectional throughput drops during iperf testing | Ethernet (ICSSG) | 11.01.00 onwards | AM64x, AM243x | - |
| EXT_SITMPUSW-132 | AM64X/AM243X: ENET: Enet VLAN ICSSG Example throws assert during channel open | Ethernet (ICSSG) | 11.01.00 onwards | AM64x, AM243x | - |
| ID | Head Line | Module | SDK Status |
| i2278 | MCAN: Message Transmit order not guaranteed from dedicated Tx Buffers configured with same Message ID | MCAN | Open |
| i2279 | MCAN: Specification Update for dedicated Tx Buffers and Tx Queues configured with same Message ID | MCAN | Open |
| i2310 | USART: Erroneous clear/trigger of timeout interrupt | UART | Implemented |
| i2311 | USART: Spurious DMA Interrupts | UART | Implemented |
| i2312 | MMCSD: HS200 and SDR104 Command Timeout Window Too Small | MMCSD | Open |
| i2313 | GPMC: Sub-32-bit read issue with NAND and FPGA/FIFO | GPMC | Implemented |
| i2326 | PCIe: MAIN_PLLx operating in fractional mode, which is required for enabling SSC, is not compliant with PCIe Refclk jitter limits | PCIe | Open |
| i2329 | MDIO interface corruption, | CPSW, ICSSG | Open |
| i2331 | CPSW: Device lockup when reading CPSW registers | CPSW, SBL | Implemented |
| i2345 | CPSW: Ethernet Packet corruption occurs if CPDMA fetches a packet which spans across memory banks | CPSW | Implemented |
| i2401 | CPSW: Host Timestamps Cause CPSW Port to Lock up | CPSW | Open |
| i2402 | CPSW: Ethernet to Host Checksum Offload does not work | CPSW | Open |
This section lists changes which could affect user applications developed using older SDK versions. Read this carefully to see if you need to do any changes in your existing application when migrating to this SDK version relative to previous SDK version. Also refer to older SDK version release notes to see changes in earlier SDKs.
The below table captures the list of migration document sections when migrating from one version to another. The migration for a partcluar module will be applicable, if you are migrating from older version listed to newer version listed on the table below.
1.8.20