AM64x MCU+ SDK  08.04.00

Introduction

This module contains APIs to program and use the FSI TX module.

Files

file  fsi_tx.h
 Header file containing various enumerations, structure definitions and function declarations for the FSI TX IP.
 

Functions

int32_t FSI_sendTxFlush (uint32_t base)
 This API sends FLUSH pattern. More...
 
int32_t FSI_stopTxFlush (uint32_t base)
 This API stops FLUSH pattern transmission. More...
 
int32_t FSI_selectTxPLLClock (uint32_t base, FSI_TxClkSel clkSel)
 This API selects PLL clock as source for clock dividers. More...
 
int32_t FSI_enableTxClock (uint32_t base, uint16_t preScaleValue)
 This API sets clock division prescalar and enables the transmit clock. More...
 
int32_t FSI_disableTxClock (uint32_t base)
 This API disables transmit clock. More...
 
int32_t FSI_setTxDataWidth (uint32_t base, FSI_DataWidth dataWidth)
 This API sets Data width for transmission. More...
 
int32_t FSI_enableTxSPIMode (uint32_t base)
 This API enables SPI compatible mode. More...
 
int32_t FSI_disableTxSPIMode (uint32_t base)
 This API disables SPI compatible mode. More...
 
int32_t FSI_setTxStartMode (uint32_t base, FSI_TxStartMode txStartMode)
 This API sets start mode for any frame transmission. More...
 
int32_t FSI_setTxPingTimeoutMode (uint32_t base, FSI_PingTimeoutMode pingTimeoutMode)
 This API sets HW/SW initiated TX ping timeout mode. More...
 
int32_t FSI_setTxExtFrameTrigger (uint32_t base, uint16_t extInputNum)
 This API sets a particular external input to trigger transmission. More...
 
int32_t FSI_enableTxCRCForceError (uint32_t base)
 This API enables CRC value of a data frame to be forced to zero. More...
 
int32_t FSI_disableTxCRCForceError (uint32_t base)
 This API disables forcing of CRC value of a data frame to zero. More...
 
int32_t FSI_setTxECCComputeWidth (uint32_t base, FSI_ECCComputeWidth eccComputeWidth)
 This API select between 16-bit and 32-bit ECC computation for FSI TX. More...
 
int32_t FSI_setTxFrameType (uint32_t base, FSI_FrameType frameType)
 This API sets frame type for transmission. More...
 
int32_t FSI_setTxSoftwareFrameSize (uint32_t base, uint16_t nWords)
 This API sets the frame size if frame type is user/software defined frame. More...
 
int32_t FSI_startTxTransmit (uint32_t base)
 This API starts transmitting frames. More...
 
int32_t FSI_setTxFrameTag (uint32_t base, FSI_FrameTag frameTag)
 This API sets frame tag for transmission. More...
 
int32_t FSI_setTxUserDefinedData (uint32_t base, uint16_t userDefData)
 This API sets user defined data for transmission It is an extra data field (8 bit) apart from regular data. More...
 
int32_t FSI_setTxBufferPtr (uint32_t base, uint16_t bufPtrOff)
 This API sets the value for transmit buffer pointer at desired location. More...
 
int32_t FSI_getTxBufferPtr (uint32_t base, uint16_t *pBufPtrLoc)
 This API gets current buffer pointer locationn. More...
 
int32_t FSI_getTxWordCount (uint32_t base, uint16_t *pWordCnt)
 This API gets valid number of data words present in buffer which have not been transmitted yet. More...
 
int32_t FSI_enableTxPingTimer (uint32_t base, uint32_t refValue, FSI_FrameTag pingFrameTag)
 This API enables ping timer logic and once set time elapses it sends signal to transmitter to send ping frame. More...
 
int32_t FSI_setTxPingTag (uint32_t base, FSI_FrameTag frameTag)
 This API sets the ping tag value, used by either timeout counter initiated PING frame transfer or by external ping trigger input. More...
 
int32_t FSI_disableTxPingTimer (uint32_t base)
 This API disables ping timer logic. More...
 
int32_t FSI_enableTxExtPingTrigger (uint32_t base, uint16_t extTrigSel)
 This API enables external trigger to transmit a ping frame. More...
 
int32_t FSI_disableTxExtPingTrigger (uint32_t base)
 This API disables external trigger logic. More...
 
int32_t FSI_getTxCurrentPingTimeoutCounter (uint32_t base, uint32_t *pPingToCnt)
 This API gets current value of ping timeout logic counter. More...
 
int32_t FSI_lockTxCtrl (uint32_t base)
 This API locks the control of all transmit control registers, once locked further writes will not take effect until system reset occurs. More...
 
int32_t FSI_getTxEventStatus (uint32_t base, uint16_t *pEvtFlags)
 This API gets current status of all the error flags. More...
 
int32_t FSI_forceTxEvents (uint32_t base, uint16_t evtFlags)
 This API enables user to set TX error flags. More...
 
int32_t FSI_clearTxEvents (uint32_t base, uint16_t evtFlags)
 This API enables user to clear TX error flags. More...
 
int32_t FSI_enableTxUserCRC (uint32_t base, uint16_t userCRCValue)
 This API sets the CRC value to be picked transmission if transmission is configured to use user defined SW CRC. More...
 
int32_t FSI_disableTxUserCRC (uint32_t base)
 This API disables user defined CRC value, the transmitted CRC value is computed by hardware. More...
 
int32_t FSI_setTxECCdata (uint32_t base, uint32_t data)
 This API sets data for ECC logic computaion. More...
 
int32_t FSI_getTxECCValue (uint32_t base, uint16_t *pEccVal)
 This API gets ECC value evaluated for 16/32 bit data. More...
 
int32_t FSI_enableTxInterrupt (uint32_t base, FSI_InterruptNum intNum, uint16_t intFlags)
 This API enables user to generate interrupt on occurrence of FSI_TxEventList events. More...
 
int32_t FSI_disableTxInterrupt (uint32_t base, FSI_InterruptNum intNum, uint16_t intFlags)
 This API enables user to disable generation interrupt on occurrence of FSI TX events. More...
 
int32_t FSI_getTxBufferAddress (uint32_t base, uint32_t *pBufAddr)
 This API gets address of TX data buffer. More...
 
int32_t FSI_resetTxModule (uint32_t base, FSI_TxSubmoduleInReset submodule)
 This API resets clock or ping timeout counter or entire TX module. More...
 
int32_t FSI_clearTxModuleReset (uint32_t base, FSI_TxSubmoduleInReset submodule)
 This API clears reset on clock or ping timeout counter or entire TX module. More...
 
int32_t FSI_writeTxBuffer (uint32_t base, const uint16_t *pArray, uint16_t length, uint16_t bufOffset)
 This API writes data in FSI TX buffer. More...
 
int32_t FSI_performTxInitialization (uint32_t base, uint16_t prescalar)
 This API initializes FSI TX module. More...
 
int32_t FSI_executeTxFlushSequence (uint32_t base, uint16_t prescalar)
 This API sends Flush pattern sequence. More...
 

FSI TX Enum type

typedef uint32_t FSI_TxEnumType
 This enumerator defines the types of possible FSI TX events. More...
 
#define FSI_TX_EVT_FRAME_DONE   ((uint16_t)0x1U)
 
#define FSI_TX_EVT_BUF_UNDERRUN   ((uint16_t)0x2U)
 
#define FSI_TX_EVT_BUF_OVERRUN   ((uint16_t)0x4U)
 
#define FSI_TX_EVT_PING_TIMEOUT   ((uint16_t)0x8U)
 
#define FSI_TX_EVT_PING_HW_TRIG   ((uint16_t)0x8U)
 
#define FSI_TX_EVTMASK   ((uint16_t)0xFU)
 Mask of all TX Event types. More...
 
#define FSI_TX_MAX_NUM_EXT_TRIGGERS   ((uint16_t)0x40U)
 maximum number of external input for triggering frame-transmission More...
 
#define FSI_TX_INT2_CTRL_S   ((uint16_t)0x8U)
 Shifts needed to control FSI TX interrupt generation on INT2. More...
 

FSI TX submodules can be in reset

typedef uint32_t FSI_TxSubmoduleInReset
 TX submodules that can be reset with reset APIs. More...
 
#define FSI_TX_MASTER_CORE_RESET   ((uint32_t)0x0U)
 
#define FSI_TX_CLOCK_RESET   ((uint32_t)0x1U)
 
#define FSI_TX_PING_TIMEOUT_CNT_RESET   ((uint32_t)0x2U)
 

FSI TX start mode

typedef uint32_t FSI_TxStartMode
 Start Mode for TX frame transmission (i.e. how transmission will start) More...
 
#define FSI_TX_START_FRAME_CTRL   ((uint32_t)0x0U)
 
#define FSI_TX_START_EXT_TRIG   ((uint32_t)0x1U)
 
#define FSI_TX_START_FRAME_CTRL_OR_UDATA_TAG   ((uint32_t)0x2U)
 

FSI TX input clock select

typedef uint32_t FSI_TxClkSel
 FSI TX input clock select. More...
 
#define FSI_TX_CLK_SEL0   ((uint32_t)0x0U)
 
#define FSI_TX_CLK_SEL1   ((uint32_t)0x1U)
 

FSI frame tag

typedef uint32_t FSI_FrameTag
 FSI frame tag values. More...
 
#define FSI_FRAME_TAG0   ((uint32_t)0x0U)
 
#define FSI_FRAME_TAG1   ((uint32_t)0x1U)
 
#define FSI_FRAME_TAG2   ((uint32_t)0x2U)
 
#define FSI_FRAME_TAG3   ((uint32_t)0x3U)
 
#define FSI_FRAME_TAG4   ((uint32_t)0x4U)
 
#define FSI_FRAME_TAG5   ((uint32_t)0x5U)
 
#define FSI_FRAME_TAG6   ((uint32_t)0x6U)
 
#define FSI_FRAME_TAG7   ((uint32_t)0x7U)
 
#define FSI_FRAME_TAG8   ((uint32_t)0x8U)
 
#define FSI_FRAME_TAG9   ((uint32_t)0x9U)
 
#define FSI_FRAME_TAG10   ((uint32_t)0xAU)
 
#define FSI_FRAME_TAG11   ((uint32_t)0xBU)
 
#define FSI_FRAME_TAG12   ((uint32_t)0xCU)
 
#define FSI_FRAME_TAG13   ((uint32_t)0xDU)
 
#define FSI_FRAME_TAG14   ((uint32_t)0xEU)
 
#define FSI_FRAME_TAG15   ((uint32_t)0xFU)
 

Macro Definition Documentation

◆ FSI_TX_EVT_FRAME_DONE

#define FSI_TX_EVT_FRAME_DONE   ((uint16_t)0x1U)

◆ FSI_TX_EVT_BUF_UNDERRUN

#define FSI_TX_EVT_BUF_UNDERRUN   ((uint16_t)0x2U)

TX frame done event

◆ FSI_TX_EVT_BUF_OVERRUN

#define FSI_TX_EVT_BUF_OVERRUN   ((uint16_t)0x4U)

TX buffer underrun event

◆ FSI_TX_EVT_PING_TIMEOUT

#define FSI_TX_EVT_PING_TIMEOUT   ((uint16_t)0x8U)

TX buffer overrun event

◆ FSI_TX_EVT_PING_HW_TRIG

#define FSI_TX_EVT_PING_HW_TRIG   ((uint16_t)0x8U)

TX ping timeout event

◆ FSI_TX_EVTMASK

#define FSI_TX_EVTMASK   ((uint16_t)0xFU)

Mask of all TX Event types.

TX ping hardware trigger event

◆ FSI_TX_MAX_NUM_EXT_TRIGGERS

#define FSI_TX_MAX_NUM_EXT_TRIGGERS   ((uint16_t)0x40U)

maximum number of external input for triggering frame-transmission

◆ FSI_TX_INT2_CTRL_S

#define FSI_TX_INT2_CTRL_S   ((uint16_t)0x8U)

Shifts needed to control FSI TX interrupt generation on INT2.

◆ FSI_TX_MASTER_CORE_RESET

#define FSI_TX_MASTER_CORE_RESET   ((uint32_t)0x0U)

Reset entire TX Module

◆ FSI_TX_CLOCK_RESET

#define FSI_TX_CLOCK_RESET   ((uint32_t)0x1U)

Reset only TX clock

◆ FSI_TX_PING_TIMEOUT_CNT_RESET

#define FSI_TX_PING_TIMEOUT_CNT_RESET   ((uint32_t)0x2U)

Reset ping timeout counter

◆ FSI_TX_START_FRAME_CTRL

#define FSI_TX_START_FRAME_CTRL   ((uint32_t)0x0U)

SW write of START bit in TX_PKT_CTRL register

◆ FSI_TX_START_EXT_TRIG

#define FSI_TX_START_EXT_TRIG   ((uint32_t)0x1U)

Rising edge on external trigger

◆ FSI_TX_START_FRAME_CTRL_OR_UDATA_TAG

#define FSI_TX_START_FRAME_CTRL_OR_UDATA_TAG   ((uint32_t)0x2U)

Either SW write of START bit or Frame completion

◆ FSI_TX_CLK_SEL0

#define FSI_TX_CLK_SEL0   ((uint32_t)0x0U)

Input clock select 0

◆ FSI_TX_CLK_SEL1

#define FSI_TX_CLK_SEL1   ((uint32_t)0x1U)

Input clock select 1

◆ FSI_FRAME_TAG0

#define FSI_FRAME_TAG0   ((uint32_t)0x0U)

Frame tag value 0

◆ FSI_FRAME_TAG1

#define FSI_FRAME_TAG1   ((uint32_t)0x1U)

Frame tag value 1

◆ FSI_FRAME_TAG2

#define FSI_FRAME_TAG2   ((uint32_t)0x2U)

Frame tag value 2

◆ FSI_FRAME_TAG3

#define FSI_FRAME_TAG3   ((uint32_t)0x3U)

Frame tag value 3

◆ FSI_FRAME_TAG4

#define FSI_FRAME_TAG4   ((uint32_t)0x4U)

Frame tag value 4

◆ FSI_FRAME_TAG5

#define FSI_FRAME_TAG5   ((uint32_t)0x5U)

Frame tag value 5

◆ FSI_FRAME_TAG6

#define FSI_FRAME_TAG6   ((uint32_t)0x6U)

Frame tag value 6

◆ FSI_FRAME_TAG7

#define FSI_FRAME_TAG7   ((uint32_t)0x7U)

Frame tag value 7

◆ FSI_FRAME_TAG8

#define FSI_FRAME_TAG8   ((uint32_t)0x8U)

Frame tag value 8

◆ FSI_FRAME_TAG9

#define FSI_FRAME_TAG9   ((uint32_t)0x9U)

Frame tag value 9

◆ FSI_FRAME_TAG10

#define FSI_FRAME_TAG10   ((uint32_t)0xAU)

Frame tag value 10

◆ FSI_FRAME_TAG11

#define FSI_FRAME_TAG11   ((uint32_t)0xBU)

Frame tag value 11

◆ FSI_FRAME_TAG12

#define FSI_FRAME_TAG12   ((uint32_t)0xCU)

Frame tag value 12

◆ FSI_FRAME_TAG13

#define FSI_FRAME_TAG13   ((uint32_t)0xDU)

Frame tag value 13

◆ FSI_FRAME_TAG14

#define FSI_FRAME_TAG14   ((uint32_t)0xEU)

Frame tag value 14

◆ FSI_FRAME_TAG15

#define FSI_FRAME_TAG15   ((uint32_t)0xFU)

Frame tag value 15

Typedef Documentation

◆ FSI_TxEnumType

typedef uint32_t FSI_TxEnumType

This enumerator defines the types of possible FSI TX events.

Values that can be passed to APIs to enable/disable interrupts and also to set/get/clear event status on FSI TX operation.

There are 4 supported interrupts related to TX events, all are available as event status as well excecpt 4th one. 1) frame transmission done 2) transmit buffer is underrun 3) transmit buffer is overrun 4) ping counter timeout

Ping frame transmission upon hardware trigger (ping watchdog or external trigger) is shown as event status.

◆ FSI_TxSubmoduleInReset

typedef uint32_t FSI_TxSubmoduleInReset

TX submodules that can be reset with reset APIs.

◆ FSI_TxStartMode

typedef uint32_t FSI_TxStartMode

Start Mode for TX frame transmission (i.e. how transmission will start)

◆ FSI_TxClkSel

typedef uint32_t FSI_TxClkSel

FSI TX input clock select.

◆ FSI_FrameTag

typedef uint32_t FSI_FrameTag

FSI frame tag values.

4 bit field inside FSI frame is available to set tag value (0-15)

Function Documentation

◆ FSI_sendTxFlush()

int32_t FSI_sendTxFlush ( uint32_t  base)

This API sends FLUSH pattern.

FLUSH pattern (toggle data lines followed by toggle on clocks) should be sent only when FSI TX is not under SOFT_RESET and the clock to the transmit core has been turned ON.

Parameters
base[IN] Base address of the FSI TX module
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base addr parameter

◆ FSI_stopTxFlush()

int32_t FSI_stopTxFlush ( uint32_t  base)

This API stops FLUSH pattern transmission.

Transmission of FLUSH pattern should be stopped before starting sending frames. Generally during initilization a pair of send/stop APIs for FLUSH pattern is called to clear data/clock lines.

Parameters
base[IN] Base address of the FSI TX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base addr parameter

◆ FSI_selectTxPLLClock()

int32_t FSI_selectTxPLLClock ( uint32_t  base,
FSI_TxClkSel  clkSel 
)

This API selects PLL clock as source for clock dividers.

Parameters
base[IN] Base address of the FSI TX module.
clkSel[IN] Input PLL clock select to the FSI TX module refer FSI_TxClkSel.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base addr parameter

◆ FSI_enableTxClock()

int32_t FSI_enableTxClock ( uint32_t  base,
uint16_t  preScaleValue 
)

This API sets clock division prescalar and enables the transmit clock.

Parameters
base[IN] Base address of the FSI TX module.
preScaleValue[IN] prescale value used to generate transmit clock, it defines the division value of /2,/3,/4, etc. of PLL CLK
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_disableTxClock()

int32_t FSI_disableTxClock ( uint32_t  base)

This API disables transmit clock.

Parameters
base[IN] Base address of the FSI TX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setTxDataWidth()

int32_t FSI_setTxDataWidth ( uint32_t  base,
FSI_DataWidth  dataWidth 
)

This API sets Data width for transmission.

Parameters
base[IN] Base address of the FSI TX module.
dataWidth[IN] Data lines used for TX operation refer FSI_DataWidth.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_enableTxSPIMode()

int32_t FSI_enableTxSPIMode ( uint32_t  base)

This API enables SPI compatible mode.


This API is only applicable when communicating with a SPI interface

FSI supports a compatibility mode in order to communicate with legacy peripherals like SPI. Only the 16-bit mode of SPI will be supported. All the frame structures, CRC checks and will be identical to the normal FSI frames.

Parameters
base[IN] Base address of the FSI TX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_disableTxSPIMode()

int32_t FSI_disableTxSPIMode ( uint32_t  base)

This API disables SPI compatible mode.


This API is only applicable when communicating with a SPI interface

Parameters
base[IN] Base address of the FSI TX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setTxStartMode()

int32_t FSI_setTxStartMode ( uint32_t  base,
FSI_TxStartMode  txStartMode 
)

This API sets start mode for any frame transmission.

Parameters
base[IN] Base address of the FSI TX module.
txStartMode[IN] Refer FSI_TxStartMode
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setTxPingTimeoutMode()

int32_t FSI_setTxPingTimeoutMode ( uint32_t  base,
FSI_PingTimeoutMode  pingTimeoutMode 
)

This API sets HW/SW initiated TX ping timeout mode.

Parameters
base[IN] Base address of the FSI TX module.
pingTimeoutMode[IN] Refer FSI_PingTimeoutMode
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setTxExtFrameTrigger()

int32_t FSI_setTxExtFrameTrigger ( uint32_t  base,
uint16_t  extInputNum 
)

This API sets a particular external input to trigger transmission.

Parameters
base[IN] Base address of the FSI TX module.
extInputNum[IN] external input number, from 0 to 31
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_enableTxCRCForceError()

int32_t FSI_enableTxCRCForceError ( uint32_t  base)

This API enables CRC value of a data frame to be forced to zero.

CRC value of the data frame will be forced to 0 whenever there is a transmission and buffer over-run or under-run condition happens. The idea is to force a corruption of the CRC since the data is not guaranteed to be reliable

Parameters
base[IN] Base address of the FSI TX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_disableTxCRCForceError()

int32_t FSI_disableTxCRCForceError ( uint32_t  base)

This API disables forcing of CRC value of a data frame to zero.

Parameters
base[IN] Base address of the FSI TX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setTxECCComputeWidth()

int32_t FSI_setTxECCComputeWidth ( uint32_t  base,
FSI_ECCComputeWidth  eccComputeWidth 
)

This API select between 16-bit and 32-bit ECC computation for FSI TX.

Parameters
base[IN] Base address of the FSI TX module.
eccComputeWidth[IN] Refer FSI_ECCComputeWidth
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setTxFrameType()

int32_t FSI_setTxFrameType ( uint32_t  base,
FSI_FrameType  frameType 
)

This API sets frame type for transmission.

Parameters
base[IN] Base address of the FSI TX module.
frameType[IN] Refer FSI_FrameType
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setTxSoftwareFrameSize()

int32_t FSI_setTxSoftwareFrameSize ( uint32_t  base,
uint16_t  nWords 
)

This API sets the frame size if frame type is user/software defined frame.

Parameters
base[IN] Base address of the FSI TX module.
nWords[IN] number of data words in a software defined frame
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_startTxTransmit()

int32_t FSI_startTxTransmit ( uint32_t  base)

This API starts transmitting frames.

Parameters
base[IN] Base address of the FSI TX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setTxFrameTag()

int32_t FSI_setTxFrameTag ( uint32_t  base,
FSI_FrameTag  frameTag 
)

This API sets frame tag for transmission.

Parameters
base[IN] Base address of the FSI TX module.
frameTag[IN] refer FSI_FrameTag
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setTxUserDefinedData()

int32_t FSI_setTxUserDefinedData ( uint32_t  base,
uint16_t  userDefData 
)

This API sets user defined data for transmission It is an extra data field (8 bit) apart from regular data.

Parameters
base[IN] Base address of the FSI TX module.
userDefData[IN] 8 bit user defined data value
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setTxBufferPtr()

int32_t FSI_setTxBufferPtr ( uint32_t  base,
uint16_t  bufPtrOff 
)

This API sets the value for transmit buffer pointer at desired location.

Parameters
base[IN] Base address of the FSI TX module.
bufPtrOff[IN] 4 bit offset pointer in TX buffer where transmitter will pick the data
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getTxBufferPtr()

int32_t FSI_getTxBufferPtr ( uint32_t  base,
uint16_t *  pBufPtrLoc 
)

This API gets current buffer pointer locationn.

Parameters
base[IN] Base address of the FSI TX module.
pBufPtrLoc[OUT] Pointer to current buffer pointer location
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getTxWordCount()

int32_t FSI_getTxWordCount ( uint32_t  base,
uint16_t *  pWordCnt 
)

This API gets valid number of data words present in buffer which have not been transmitted yet.


there could be lag due to synchronization hence value is accurate only when no current transmission is happening

Parameters
base[IN] Base address of the FSI TX module.
pWordCnt[OUT] Pointer to number of data words
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_enableTxPingTimer()

int32_t FSI_enableTxPingTimer ( uint32_t  base,
uint32_t  refValue,
FSI_FrameTag  pingFrameTag 
)

This API enables ping timer logic and once set time elapses it sends signal to transmitter to send ping frame.


there could be lag due to synchronization hence value is accurate only when no current transmission is happening

Parameters
base[IN] Base address of the FSI TX module.
refValue[IN] 32 bit reference value for ping time-out counter
pingFrameTag[IN] 4 bit tag value for ping time-out counter refer FSI_FrameTag
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setTxPingTag()

int32_t FSI_setTxPingTag ( uint32_t  base,
FSI_FrameTag  frameTag 
)

This API sets the ping tag value, used by either timeout counter initiated PING frame transfer or by external ping trigger input.

Parameters
base[IN] Base address of the FSI TX module.
frameTag[IN] 4 bit tag value for ping time-out counter refer FSI_FrameTag
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_disableTxPingTimer()

int32_t FSI_disableTxPingTimer ( uint32_t  base)

This API disables ping timer logic.

Parameters
base[IN] Base address of the FSI TX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_enableTxExtPingTrigger()

int32_t FSI_enableTxExtPingTrigger ( uint32_t  base,
uint16_t  extTrigSel 
)

This API enables external trigger to transmit a ping frame.

Parameters
base[IN] Base address of the FSI TX module.
extTrigSel[IN] 5 bit value which selects among 32 external inputs
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_disableTxExtPingTrigger()

int32_t FSI_disableTxExtPingTrigger ( uint32_t  base)

This API disables external trigger logic.

Parameters
base[IN] Base address of the FSI TX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getTxCurrentPingTimeoutCounter()

int32_t FSI_getTxCurrentPingTimeoutCounter ( uint32_t  base,
uint32_t *  pPingToCnt 
)

This API gets current value of ping timeout logic counter.

Parameters
base[IN] Base address of the FSI TX module.
pPingToCnt[OUT] Pointer to current ping timeout counter
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_lockTxCtrl()

int32_t FSI_lockTxCtrl ( uint32_t  base)

This API locks the control of all transmit control registers, once locked further writes will not take effect until system reset occurs.

Parameters
base[IN] Base address of the FSI TX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getTxEventStatus()

int32_t FSI_getTxEventStatus ( uint32_t  base,
uint16_t *  pEvtFlags 
)

This API gets current status of all the error flags.

Parameters
base[IN] Base address of the FSI TX module.
pEvtFlags[OUT] Pointer to the status of error event flags, each bit of integer is associated with one error flag.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_forceTxEvents()

int32_t FSI_forceTxEvents ( uint32_t  base,
uint16_t  evtFlags 
)

This API enables user to set TX error flags.

Parameters
base[IN] Base address of the FSI TX module.
evtFlags[IN] event and error flags to be set


Writing a 1 to this bit position will cause the corresponding bit in TX_EVT_ERR_STATUS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR.

Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_clearTxEvents()

int32_t FSI_clearTxEvents ( uint32_t  base,
uint16_t  evtFlags 
)

This API enables user to clear TX error flags.

Parameters
base[IN] Base address of the FSI TX module.
evtFlags[IN] event and error flags to be cleared


Writing a 1 to this bit position will cause the corresponding bit in TX_EVT_ERR_STATUS register to get cleared to 0.

Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_enableTxUserCRC()

int32_t FSI_enableTxUserCRC ( uint32_t  base,
uint16_t  userCRCValue 
)

This API sets the CRC value to be picked transmission if transmission is configured to use user defined SW CRC.

Parameters
base[IN] Base address of the FSI TX module.
userCRCValue[IN] user defined CRC value
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_disableTxUserCRC()

int32_t FSI_disableTxUserCRC ( uint32_t  base)

This API disables user defined CRC value, the transmitted CRC value is computed by hardware.

Parameters
base[IN] Base address of the FSI TX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setTxECCdata()

int32_t FSI_setTxECCdata ( uint32_t  base,
uint32_t  data 
)

This API sets data for ECC logic computaion.

Parameters
base[IN] Base address of the FSI TX module.
data[IN] data value for which ECC needs to be computed
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getTxECCValue()

int32_t FSI_getTxECCValue ( uint32_t  base,
uint16_t *  pEccVal 
)

This API gets ECC value evaluated for 16/32 bit data.

Parameters
base[IN] Base address of the FSI TX module.
pEccVal[OUT] Pointer to the ECC value for input data.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_enableTxInterrupt()

int32_t FSI_enableTxInterrupt ( uint32_t  base,
FSI_InterruptNum  intNum,
uint16_t  intFlags 
)

This API enables user to generate interrupt on occurrence of FSI_TxEventList events.

Parameters
base[IN] Base address of the FSI TX module.
intNum[IN] Type of interrupt to be generated, INT1 or INT2
intFlags[IN] TX events on which interrupt should be generated
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_disableTxInterrupt()

int32_t FSI_disableTxInterrupt ( uint32_t  base,
FSI_InterruptNum  intNum,
uint16_t  intFlags 
)

This API enables user to disable generation interrupt on occurrence of FSI TX events.

Parameters
base[IN] Base address of the FSI TX module.
intNum[IN] Type of interrupt to be generated, INT1 or INT2
intFlags[IN] TX events on which interrupt generation has to be disabled
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getTxBufferAddress()

int32_t FSI_getTxBufferAddress ( uint32_t  base,
uint32_t *  pBufAddr 
)

This API gets address of TX data buffer.


Data buffer is consisting of 16 words from offset- 0x40 to 0x4e

Parameters
base[IN] Base address of the FSI TX module.
pBufAddr[OUT] Pointer to the TX data buffer address
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_resetTxModule()

int32_t FSI_resetTxModule ( uint32_t  base,
FSI_TxSubmoduleInReset  submodule 
)

This API resets clock or ping timeout counter or entire TX module.

Parameters
base[IN] Base address of the FSI TX module.
submodule[IN] name of submodule which is supposed to be reset
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_clearTxModuleReset()

int32_t FSI_clearTxModuleReset ( uint32_t  base,
FSI_TxSubmoduleInReset  submodule 
)

This API clears reset on clock or ping timeout counter or entire TX module.

Parameters
base[IN] Base address of the FSI TX module.
submodule[IN] name of submodule to be brought out of reset
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_writeTxBuffer()

int32_t FSI_writeTxBuffer ( uint32_t  base,
const uint16_t *  pArray,
uint16_t  length,
uint16_t  bufOffset 
)

This API writes data in FSI TX buffer.

Parameters
base[IN] Base address of the FSI TX module.
pArray[IN] Address of the array of words to be transmitted.
length[IN] Length is the number of words in the array to be transmitted.
bufOffset[IN] Offset in TX buffer where data will be written, offset is a 16-bit aligned address
Note
Data Overwrite protection is implemented in this function by ensuring not more than 16 words are written and also wrap around case is taken care when more words need to be written if last write happens at maximum offset in TX buffer
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_performTxInitialization()

int32_t FSI_performTxInitialization ( uint32_t  base,
uint16_t  prescalar 
)

This API initializes FSI TX module.


Software based initialization of the FSI transmitter IP. This is typically needed only once during initialization or if the module needs to be reset due to an underrun condition that occurred during operation.

Parameters
base[IN] Base address of the FSI TX module
prescalar[IN] User configurable clock divider for PLL input clock
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_executeTxFlushSequence()

int32_t FSI_executeTxFlushSequence ( uint32_t  base,
uint16_t  prescalar 
)

This API sends Flush pattern sequence.


Flush pattern sequence sent by a FSI transmit module will bring the FSI receive module out of reset so that it will then be ready to receive subsequent frames.

Parameters
base[IN] Base address of the FSI TX module
prescalar[IN] user configurable clock divider for PLL input clock
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter