AM64x MCU+ SDK  08.04.00

Introduction

This module contains APIs to program and use the FSI RX module.

Files

file  fsi_rx.h
 Header file containing various enumerations, structure definitions and function declarations for the FSI RX IP.
 

Functions

int32_t FSI_enableRxInternalLoopback (uint32_t base)
 This API enables internal loopback where mux will select internal pins coming from RX module instead of what comes from pins. More...
 
int32_t FSI_disableRxInternalLoopback (uint32_t base)
 This API disables internal loopback where mux will not use internal pins coming from RX module. More...
 
int32_t FSI_enableRxSPIPairing (uint32_t base)
 This API enables SPI clock paring, receive clock is selected from the internal port coming from RX module. More...
 
int32_t FSI_disableRxSPIPairing (uint32_t base)
 This API disables SPI clock paring, selects regular receive clock coming from the pins. More...
 
int32_t FSI_setRxDataWidth (uint32_t base, FSI_DataWidth dataWidth)
 This API selects number of data lines used for receiving. More...
 
int32_t FSI_enableRxSPIMode (uint32_t base)
 This API enables SPI compatible mode in FSI RX. More...
 
int32_t FSI_disableRxSPIMode (uint32_t base)
 This API disables SPI compatible mode in FSI RX. More...
 
int32_t FSI_setRxSoftwareFrameSize (uint32_t base, uint16_t nWords)
 This API sets the RX frame size if frame type is user/software defined frame. More...
 
int32_t FSI_setRxECCComputeWidth (uint32_t base, FSI_ECCComputeWidth eccComputeWidth)
 This API select between 16-bit and 32-bit ECC computation for FSI RX. More...
 
int32_t FSI_setRxPingTimeoutMode (uint32_t base, FSI_PingTimeoutMode pingTimeoutMode)
 This API sets HW/SW initiated RX ping timeout mode. More...
 
int32_t FSI_getRxFrameType (uint32_t base, FSI_FrameType *pFrameType)
 This API gets frame type received in the last successful frame. More...
 
int32_t FSI_getRxFrameTag (uint32_t base, uint16_t *pFrameTag)
 This API gets frame tag received for the last successful frame. More...
 
int32_t FSI_getRxUserDefinedData (uint32_t base, uint16_t *pUserData)
 This API gets User-Data (8-bit) field for received data frame. More...
 
int32_t FSI_getRxEventStatus (uint32_t base, uint16_t *pEvtFlags)
 This API gets current status of all the event/error flags. More...
 
int32_t FSI_forceRxEvents (uint32_t base, uint16_t evtFlags)
 This API enables user to set RX event/error flags. More...
 
int32_t FSI_clearRxEvents (uint32_t base, uint16_t evtFlags)
 This API enables user to clear RX event/error flags. More...
 
int32_t FSI_getRxReceivedCRC (uint32_t base, uint16_t *pCrcVal)
 This API gets CRC value received in data frame/frame. More...
 
int32_t FSI_getRxComputedCRC (uint32_t base, uint16_t *pCrcVal)
 This API gets CRC value computed for data received. More...
 
int32_t FSI_setRxBufferPtr (uint32_t base, uint16_t bufPtrOff)
 This API sets the value for receive buffer pointer at desired location. More...
 
int32_t FSI_getRxBufferPtr (uint32_t base, uint16_t *pBufPtrLoc)
 This API gets current buffer pointer location. More...
 
int32_t FSI_getRxWordCount (uint32_t base, uint16_t *pWordCnt)
 This API gets valid number of data words present in buffer which have not been read out yet. More...
 
int32_t FSI_enableRxFrameWatchdog (uint32_t base, uint32_t wdRef)
 This API enables the frame watchdog counter logic to count every time it start to receive a frame. More...
 
int32_t FSI_disableRxFrameWatchdog (uint32_t base)
 This API disables the frame watchdog counter logic. More...
 
int32_t FSI_getRxFrameWatchdogCounter (uint32_t base, uint32_t *pWdCnt)
 This API gets current value of frame watchdog counter. More...
 
int32_t FSI_enableRxPingWatchdog (uint32_t base, uint32_t wdRef)
 This API enables the ping watchdog counter logic and once the set time elapses it will indicate ping watchdog time-out has occurred. More...
 
int32_t FSI_disableRxPingWatchdog (uint32_t base)
 This API disables the ping watchdog counter logic. More...
 
int32_t FSI_getRxPingWatchdogCounter (uint32_t base, uint32_t *pWdCnt)
 This API gets current value of ping watchdog counter. More...
 
int32_t FSI_getRxPingTag (uint32_t base, uint16_t *pPingTag)
 This API gets the value of tag received for last ping frame. More...
 
int32_t FSI_lockRxCtrl (uint32_t base)
 This API locks the control of all receive control registers, once locked further writes will not take effect until system reset occurs. More...
 
int32_t FSI_setRxECCData (uint32_t base, uint32_t rxECCdata)
 This API sets RX ECC data on which ECC (SEC-DED) computaion logic runs. More...
 
int32_t FSI_setRxReceivedECCValue (uint32_t base, uint16_t rxECCvalue)
 This API sets received ECC value on which ECC (SEC-DED) computaion logic runs. More...
 
int32_t FSI_getRxECCCorrectedData (uint32_t base, uint32_t *pEccData)
 This API gets ECC corrected data. More...
 
int32_t FSI_getRxECCLog (uint32_t base, uint16_t *pEccLog)
 This API gets ECC Log details. More...
 
int32_t FSI_enableRxInterrupt (uint32_t base, FSI_InterruptNum intNum, uint16_t intFlags)
 This API enables user to generate interrupt on occurrence of RX events. More...
 
int32_t FSI_disableRxInterrupt (uint32_t base, FSI_InterruptNum intNum, uint16_t intFlags)
 This API enables user to disable interrupt generation on RX events. More...
 
int32_t FSI_getRxBufferAddress (uint32_t base, uint32_t *pAddr)
 This API gets address of RX data buffer. More...
 
int32_t FSI_resetRxModule (uint32_t base, FSI_RxSubmoduleInReset submodule)
 This API resets frame watchdog, ping watchdog or entire RX module. More...
 
int32_t FSI_clearRxModuleReset (uint32_t base, FSI_RxSubmoduleInReset submodule)
 This API clears resets on frame watchdog, ping watchdog or entire RX module. More...
 
int32_t FSI_readRxBuffer (uint32_t base, uint16_t *pArray, uint16_t length, uint16_t bufOffset)
 This API reads data from FSI RX buffer. More...
 
int32_t FSI_configRxDelayLine (uint32_t base, FSI_RxDelayTapType delayTapType, uint16_t tapValue)
 This API adds delay for selected RX tap line. More...
 
int32_t FSI_performRxInitialization (uint32_t base)
 This API initializes FSI RX module. More...
 

FSI RX Enum type

typedef uint32_t FSI_RxEnumType
 This enumerator defines the types of possible FSI RX events. More...
 
#define FSI_RX_EVT_PING_WD_TIMEOUT   ((uint16_t)0x0001U)
 
#define FSI_RX_EVT_FRAME_WD_TIMEOUT   ((uint16_t)0x0002U)
 
#define FSI_RX_EVT_CRC_ERR   ((uint16_t)0x0004U)
 
#define FSI_RX_EVT_TYPE_ERR   ((uint16_t)0x0008U)
 
#define FSI_RX_EVT_EOF_ERR   ((uint16_t)0x0010U)
 
#define FSI_RX_EVT_OVERRUN   ((uint16_t)0x0020U)
 
#define FSI_RX_EVT_FRAME_DONE   ((uint16_t)0x0040U)
 
#define FSI_RX_EVT_UNDERRUN   ((uint16_t)0x0080U)
 
#define FSI_RX_EVT_ERR_FRAME   ((uint16_t)0x0100U)
 
#define FSI_RX_EVT_PING_FRAME   ((uint16_t)0x0200U)
 
#define FSI_RX_EVT_FRAME_OVERRUN   ((uint16_t)0x0400U)
 
#define FSI_RX_EVT_DATA_FRAME   ((uint16_t)0x0800U)
 
#define FSI_RX_EVTMASK   ((uint16_t)0x0FFFU)
 Mask of all RX Events, ORing all event defines. More...
 
#define FSI_RX_MAX_DELAY_LINE_VAL   ((uint16_t)0x001FU)
 Maximum value in RX delay line tap control. More...
 

FSI RX submodues that can be reset

typedef uint32_t FSI_RxSubmoduleInReset
 List of RX modules that can be reset, can be used with reset APIs. More...
 
#define FSI_RX_MASTER_CORE_RESET   ((uint32_t)0x0U)
 
#define FSI_RX_FRAME_WD_CNT_RESET   ((uint32_t)0x1U)
 
#define FSI_RX_PING_WD_CNT_RESET   ((uint32_t)0x2U)
 

FSI RX delay tap type

typedef uint32_t FSI_RxDelayTapType
 Available RX lines for delay tap selection. More...
 
#define FSI_RX_DELAY_CLK   ((uint32_t)0x0U)
 
#define FSI_RX_DELAY_D0   ((uint32_t)0x1U)
 
#define FSI_RX_DELAY_D1   ((uint32_t)0x2U)
 

FSI external frame trigger source

typedef uint32_t FSI_ExtFrameTriggerSrc
 Indexes of available EPWM SOC triggers. More...
 
#define FSI_EXT_TRIGSRC_EPWM1_SOCA   ((uint32_t)0x08U)
 
#define FSI_EXT_TRIGSRC_EPWM1_SOCB   ((uint32_t)0x09U)
 
#define FSI_EXT_TRIGSRC_EPWM2_SOCA   ((uint32_t)0x0AU)
 
#define FSI_EXT_TRIGSRC_EPWM2_SOCB   ((uint32_t)0x0BU)
 
#define FSI_EXT_TRIGSRC_EPWM3_SOCA   ((uint32_t)0x0CU)
 
#define FSI_EXT_TRIGSRC_EPWM3_SOCB   ((uint32_t)0x0DU)
 
#define FSI_EXT_TRIGSRC_EPWM4_SOCA   ((uint32_t)0x0EU)
 
#define FSI_EXT_TRIGSRC_EPWM4_SOCB   ((uint32_t)0x0FU)
 
#define FSI_EXT_TRIGSRC_EPWM5_SOCA   ((uint32_t)0x10U)
 
#define FSI_EXT_TRIGSRC_EPWM5_SOCB   ((uint32_t)0x11U)
 
#define FSI_EXT_TRIGSRC_EPWM6_SOCA   ((uint32_t)0x12U)
 
#define FSI_EXT_TRIGSRC_EPWM6_SOCB   ((uint32_t)0x13U)
 
#define FSI_EXT_TRIGSRC_EPWM7_SOCA   ((uint32_t)0x14U)
 
#define FSI_EXT_TRIGSRC_EPWM7_SOCB   ((uint32_t)0x15U)
 
#define FSI_EXT_TRIGSRC_EPWM8_SOCA   ((uint32_t)0x16U)
 
#define FSI_EXT_TRIGSRC_EPWM8_SOCB   ((uint32_t)0x17U)
 

Macro Definition Documentation

◆ FSI_RX_EVT_PING_WD_TIMEOUT

#define FSI_RX_EVT_PING_WD_TIMEOUT   ((uint16_t)0x0001U)

◆ FSI_RX_EVT_FRAME_WD_TIMEOUT

#define FSI_RX_EVT_FRAME_WD_TIMEOUT   ((uint16_t)0x0002U)

RX ping watchdog times out event

◆ FSI_RX_EVT_CRC_ERR

#define FSI_RX_EVT_CRC_ERR   ((uint16_t)0x0004U)

RX frame watchdog times out event

◆ FSI_RX_EVT_TYPE_ERR

#define FSI_RX_EVT_TYPE_ERR   ((uint16_t)0x0008U)

RX frame CRC error event

◆ FSI_RX_EVT_EOF_ERR

#define FSI_RX_EVT_EOF_ERR   ((uint16_t)0x0010U)

RX frame invalid Frame type event

◆ FSI_RX_EVT_OVERRUN

#define FSI_RX_EVT_OVERRUN   ((uint16_t)0x0020U)

RX frame invalid End of Frame event

◆ FSI_RX_EVT_FRAME_DONE

#define FSI_RX_EVT_FRAME_DONE   ((uint16_t)0x0040U)

RX frame buffer overrun event

◆ FSI_RX_EVT_UNDERRUN

#define FSI_RX_EVT_UNDERRUN   ((uint16_t)0x0080U)

RX frame done without errors event

◆ FSI_RX_EVT_ERR_FRAME

#define FSI_RX_EVT_ERR_FRAME   ((uint16_t)0x0100U)

Software reads empty RX buffer event

◆ FSI_RX_EVT_PING_FRAME

#define FSI_RX_EVT_PING_FRAME   ((uint16_t)0x0200U)

RX error frame event

◆ FSI_RX_EVT_FRAME_OVERRUN

#define FSI_RX_EVT_FRAME_OVERRUN   ((uint16_t)0x0400U)

RX ping frame event

◆ FSI_RX_EVT_DATA_FRAME

#define FSI_RX_EVT_DATA_FRAME   ((uint16_t)0x0800U)

Software didn't clear FRAME_DONE flag after receiving new frame event

◆ FSI_RX_EVTMASK

#define FSI_RX_EVTMASK   ((uint16_t)0x0FFFU)

Mask of all RX Events, ORing all event defines.

RX data frame event

◆ FSI_RX_MAX_DELAY_LINE_VAL

#define FSI_RX_MAX_DELAY_LINE_VAL   ((uint16_t)0x001FU)

Maximum value in RX delay line tap control.

◆ FSI_RX_MASTER_CORE_RESET

#define FSI_RX_MASTER_CORE_RESET   ((uint32_t)0x0U)

RX master core reset

◆ FSI_RX_FRAME_WD_CNT_RESET

#define FSI_RX_FRAME_WD_CNT_RESET   ((uint32_t)0x1U)

RX frame watchdog counter reset

◆ FSI_RX_PING_WD_CNT_RESET

#define FSI_RX_PING_WD_CNT_RESET   ((uint32_t)0x2U)

RX ping watchdog counter reset

◆ FSI_RX_DELAY_CLK

#define FSI_RX_DELAY_CLK   ((uint32_t)0x0U)

RX CLK line delay tap

◆ FSI_RX_DELAY_D0

#define FSI_RX_DELAY_D0   ((uint32_t)0x1U)

RX D0 line delay tap

◆ FSI_RX_DELAY_D1

#define FSI_RX_DELAY_D1   ((uint32_t)0x2U)

RX D1 line delay tap

◆ FSI_EXT_TRIGSRC_EPWM1_SOCA

#define FSI_EXT_TRIGSRC_EPWM1_SOCA   ((uint32_t)0x08U)

FSI external trigger source for ePWM1 SOCA

◆ FSI_EXT_TRIGSRC_EPWM1_SOCB

#define FSI_EXT_TRIGSRC_EPWM1_SOCB   ((uint32_t)0x09U)

FSI external trigger source for ePWM1 SOCB

◆ FSI_EXT_TRIGSRC_EPWM2_SOCA

#define FSI_EXT_TRIGSRC_EPWM2_SOCA   ((uint32_t)0x0AU)

FSI external trigger source for ePWM2 SOCA

◆ FSI_EXT_TRIGSRC_EPWM2_SOCB

#define FSI_EXT_TRIGSRC_EPWM2_SOCB   ((uint32_t)0x0BU)

FSI external trigger source for ePWM2 SOCB

◆ FSI_EXT_TRIGSRC_EPWM3_SOCA

#define FSI_EXT_TRIGSRC_EPWM3_SOCA   ((uint32_t)0x0CU)

FSI external trigger source for ePWM3 SOCA

◆ FSI_EXT_TRIGSRC_EPWM3_SOCB

#define FSI_EXT_TRIGSRC_EPWM3_SOCB   ((uint32_t)0x0DU)

FSI external trigger source for ePWM3 SOCB

◆ FSI_EXT_TRIGSRC_EPWM4_SOCA

#define FSI_EXT_TRIGSRC_EPWM4_SOCA   ((uint32_t)0x0EU)

FSI external trigger source for ePWM4 SOCA

◆ FSI_EXT_TRIGSRC_EPWM4_SOCB

#define FSI_EXT_TRIGSRC_EPWM4_SOCB   ((uint32_t)0x0FU)

FSI external trigger source for ePWM4 SOCB

◆ FSI_EXT_TRIGSRC_EPWM5_SOCA

#define FSI_EXT_TRIGSRC_EPWM5_SOCA   ((uint32_t)0x10U)

FSI external trigger source for ePWM5 SOCA

◆ FSI_EXT_TRIGSRC_EPWM5_SOCB

#define FSI_EXT_TRIGSRC_EPWM5_SOCB   ((uint32_t)0x11U)

FSI external trigger source for ePWM5 SOCB

◆ FSI_EXT_TRIGSRC_EPWM6_SOCA

#define FSI_EXT_TRIGSRC_EPWM6_SOCA   ((uint32_t)0x12U)

FSI external trigger source for ePWM6 SOCA

◆ FSI_EXT_TRIGSRC_EPWM6_SOCB

#define FSI_EXT_TRIGSRC_EPWM6_SOCB   ((uint32_t)0x13U)

FSI external trigger source for ePWM6 SOCB

◆ FSI_EXT_TRIGSRC_EPWM7_SOCA

#define FSI_EXT_TRIGSRC_EPWM7_SOCA   ((uint32_t)0x14U)

FSI external trigger source for ePWM7 SOCA

◆ FSI_EXT_TRIGSRC_EPWM7_SOCB

#define FSI_EXT_TRIGSRC_EPWM7_SOCB   ((uint32_t)0x15U)

FSI external trigger source for ePWM7 SOCB

◆ FSI_EXT_TRIGSRC_EPWM8_SOCA

#define FSI_EXT_TRIGSRC_EPWM8_SOCA   ((uint32_t)0x16U)

FSI external trigger source for ePWM8 SOCA

◆ FSI_EXT_TRIGSRC_EPWM8_SOCB

#define FSI_EXT_TRIGSRC_EPWM8_SOCB   ((uint32_t)0x17U)

FSI external trigger source for ePWM8 SOCB

Typedef Documentation

◆ FSI_RxEnumType

typedef uint32_t FSI_RxEnumType

This enumerator defines the types of possible FSI RX events.

Values that can be passed to APIs to enable/disable interrupts and also to set/get/clear event status on FSI RX operation.

There are 12 supported interrupts related to RX events, all are available as event status as well. 1) ping watchdog times out 2) frame watchdog times out 3) mismatch between hardware computed CRC and received CRC.This status should be ignored if user chooses SW CRC computation 4) invalid Frame type detected 5) invalid EndofFrame bit-pattern 6) buffer Overrun in RX buffer 7) received frame without errors 8) software reads empty RX buffer 9) received error frame 10) received ping frame 11) software didn't clear FRAME_DONE flag after receiving new frame 12) received data frame

◆ FSI_RxSubmoduleInReset

typedef uint32_t FSI_RxSubmoduleInReset

List of RX modules that can be reset, can be used with reset APIs.


Three submodules can be reset- 1) RX master core 2) frame watchdog counter 3) ping watchdog counter

◆ FSI_RxDelayTapType

typedef uint32_t FSI_RxDelayTapType

Available RX lines for delay tap selection.


Delay tapping can be done on 3 lines: 1) RXCLK 2) RXD0 3) RXD1

◆ FSI_ExtFrameTriggerSrc

typedef uint32_t FSI_ExtFrameTriggerSrc

Indexes of available EPWM SOC triggers.


There are 16 ePWM SOC events as external triggers for FSI frame transfers. Indexes 0:7 and 24:31 are reserved out of total 32 muxed external triggers.

Function Documentation

◆ FSI_enableRxInternalLoopback()

int32_t FSI_enableRxInternalLoopback ( uint32_t  base)

This API enables internal loopback where mux will select internal pins coming from RX module instead of what comes from pins.

Parameters
base[IN] Base address of the FSI RX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_disableRxInternalLoopback()

int32_t FSI_disableRxInternalLoopback ( uint32_t  base)

This API disables internal loopback where mux will not use internal pins coming from RX module.

Parameters
base[IN] Base address of the FSI RX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_enableRxSPIPairing()

int32_t FSI_enableRxSPIPairing ( uint32_t  base)

This API enables SPI clock paring, receive clock is selected from the internal port coming from RX module.


This API is only applicable when communicating with a SPI interface

Parameters
base[IN] Base address of the FSI RX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_disableRxSPIPairing()

int32_t FSI_disableRxSPIPairing ( uint32_t  base)

This API disables SPI clock paring, selects regular receive clock coming from the pins.


This API is only applicable when communicating with a SPI interface

Parameters
base[IN] Base address of the FSI RX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setRxDataWidth()

int32_t FSI_setRxDataWidth ( uint32_t  base,
FSI_DataWidth  dataWidth 
)

This API selects number of data lines used for receiving.

Parameters
base[IN] Base address of the FSI RX module.
dataWidth[IN] Data lines used for RX operation refer FSI_DataWidth.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_enableRxSPIMode()

int32_t FSI_enableRxSPIMode ( uint32_t  base)

This API enables SPI compatible mode in FSI RX.


This API is only applicable when communicating with a SPI interface

Parameters
base[IN] Base address of the FSI RX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_disableRxSPIMode()

int32_t FSI_disableRxSPIMode ( uint32_t  base)

This API disables SPI compatible mode in FSI RX.


This API is only applicable when communicating with a SPI interface

Parameters
base[IN] Base address of the FSI RX module.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setRxSoftwareFrameSize()

int32_t FSI_setRxSoftwareFrameSize ( uint32_t  base,
uint16_t  nWords 
)

This API sets the RX frame size if frame type is user/software defined frame.

Parameters
base[IN] Base address of the FSI RX module.
nWords[IN] number of data words in a software defined frame.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setRxECCComputeWidth()

int32_t FSI_setRxECCComputeWidth ( uint32_t  base,
FSI_ECCComputeWidth  eccComputeWidth 
)

This API select between 16-bit and 32-bit ECC computation for FSI RX.

Parameters
base[IN] Base address of the FSI RX module.
eccComputeWidth[IN] Refer FSI_ECCComputeWidth
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setRxPingTimeoutMode()

int32_t FSI_setRxPingTimeoutMode ( uint32_t  base,
FSI_PingTimeoutMode  pingTimeoutMode 
)

This API sets HW/SW initiated RX ping timeout mode.

Parameters
base[IN] Base address of the FSI RX module.
pingTimeoutMode[IN] Refer FSI_PingTimeoutMode
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxFrameType()

int32_t FSI_getRxFrameType ( uint32_t  base,
FSI_FrameType pFrameType 
)

This API gets frame type received in the last successful frame.

Parameters
base[IN] Base address of the FSI RX module.
pFrameType[OUT] Pointer to the RX frame type.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxFrameTag()

int32_t FSI_getRxFrameTag ( uint32_t  base,
uint16_t *  pFrameTag 
)

This API gets frame tag received for the last successful frame.

Parameters
base[IN] Base address of the FSI RX module.
pFrameTag[OUT] Pointer to the RX frame tag.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxUserDefinedData()

int32_t FSI_getRxUserDefinedData ( uint32_t  base,
uint16_t *  pUserData 
)

This API gets User-Data (8-bit) field for received data frame.

Parameters
base[IN] Base address of the FSI RX module.
pUserData[OUT] Pointer to the user data value.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxEventStatus()

int32_t FSI_getRxEventStatus ( uint32_t  base,
uint16_t *  pEvtFlags 
)

This API gets current status of all the event/error flags.

Parameters
base[IN] Base address of the FSI RX module
pEvtFlags[OUT] Pointer to status of event/error flags, each bit of integer is associated with one error flag
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_forceRxEvents()

int32_t FSI_forceRxEvents ( uint32_t  base,
uint16_t  evtFlags 
)

This API enables user to set RX event/error flags.

Parameters
base[IN] Base address of the FSI RX module
evtFlags[IN] event/error flags to be set
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_clearRxEvents()

int32_t FSI_clearRxEvents ( uint32_t  base,
uint16_t  evtFlags 
)

This API enables user to clear RX event/error flags.

Parameters
base[IN] Base address of the FSI RX module
evtFlags[IN] event/error flags to be cleared
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxReceivedCRC()

int32_t FSI_getRxReceivedCRC ( uint32_t  base,
uint16_t *  pCrcVal 
)

This API gets CRC value received in data frame/frame.

Parameters
base[IN] Base address of the FSI RX module
pCrcVal[OUT] Pointer to CRC value received in data frame
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxComputedCRC()

int32_t FSI_getRxComputedCRC ( uint32_t  base,
uint16_t *  pCrcVal 
)

This API gets CRC value computed for data received.

Parameters
base[IN] Base address of the FSI RX module
pCrcVal[OUT] Pointer to CRC value computed on received data
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setRxBufferPtr()

int32_t FSI_setRxBufferPtr ( uint32_t  base,
uint16_t  bufPtrOff 
)

This API sets the value for receive buffer pointer at desired location.

Parameters
base[IN] Base address of the FSI RX module
bufPtrOff[IN] 4 bit offset pointer in RX buffer from where received data will be read
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxBufferPtr()

int32_t FSI_getRxBufferPtr ( uint32_t  base,
uint16_t *  pBufPtrLoc 
)

This API gets current buffer pointer location.


There could be lag due to synchronization, hence value is accurate only when no current reception is happening

Parameters
base[IN] Base address of the FSI RX module
pBufPtrLoc[OUT] Pointer to current buffer pointer location
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxWordCount()

int32_t FSI_getRxWordCount ( uint32_t  base,
uint16_t *  pWordCnt 
)

This API gets valid number of data words present in buffer which have not been read out yet.


There could be lag due to synchronization, hence value is accurate only when no current reception is happening

Parameters
base[IN] Base address of the FSI RX module
pWordCnt[OUT] Pointer to number of data words present in buffer
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_enableRxFrameWatchdog()

int32_t FSI_enableRxFrameWatchdog ( uint32_t  base,
uint32_t  wdRef 
)

This API enables the frame watchdog counter logic to count every time it start to receive a frame.

Parameters
base[IN] Base address of the FSI RX module
wdRef[IN] reference value for frame watchdog time-out counter
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_disableRxFrameWatchdog()

int32_t FSI_disableRxFrameWatchdog ( uint32_t  base)

This API disables the frame watchdog counter logic.

Parameters
base[IN] Base address of the FSI RX module
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxFrameWatchdogCounter()

int32_t FSI_getRxFrameWatchdogCounter ( uint32_t  base,
uint32_t *  pWdCnt 
)

This API gets current value of frame watchdog counter.

Parameters
base[IN] Base address of the FSI RX module
pWdCnt[OUT] Pointer to current value of frame watchdog counter
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_enableRxPingWatchdog()

int32_t FSI_enableRxPingWatchdog ( uint32_t  base,
uint32_t  wdRef 
)

This API enables the ping watchdog counter logic and once the set time elapses it will indicate ping watchdog time-out has occurred.

Parameters
base[IN] Base address of the FSI RX module
wdRef[IN] reference value for ping watchdog time-out counter
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_disableRxPingWatchdog()

int32_t FSI_disableRxPingWatchdog ( uint32_t  base)

This API disables the ping watchdog counter logic.

Parameters
base[IN] Base address of the FSI RX module
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxPingWatchdogCounter()

int32_t FSI_getRxPingWatchdogCounter ( uint32_t  base,
uint32_t *  pWdCnt 
)

This API gets current value of ping watchdog counter.

Parameters
base[IN] Base address of the FSI RX module
pWdCnt[OUT] Pointer to current value of ping watchdog counter
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxPingTag()

int32_t FSI_getRxPingTag ( uint32_t  base,
uint16_t *  pPingTag 
)

This API gets the value of tag received for last ping frame.

Parameters
base[IN] Base address of the FSI RX module
pPingTag[OUT] Pointer to ping frame tag value
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_lockRxCtrl()

int32_t FSI_lockRxCtrl ( uint32_t  base)

This API locks the control of all receive control registers, once locked further writes will not take effect until system reset occurs.

Parameters
base[IN] Base address of the FSI RX module
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setRxECCData()

int32_t FSI_setRxECCData ( uint32_t  base,
uint32_t  rxECCdata 
)

This API sets RX ECC data on which ECC (SEC-DED) computaion logic runs.

Parameters
base[IN] Base address of the FSI RX module
rxECCdata[IN] RX ECC data for ECC logic
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_setRxReceivedECCValue()

int32_t FSI_setRxReceivedECCValue ( uint32_t  base,
uint16_t  rxECCvalue 
)

This API sets received ECC value on which ECC (SEC-DED) computaion logic runs.

Parameters
base[IN] Base address of the FSI RX module
rxECCvalue[IN] Received ECC value in a data frame
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxECCCorrectedData()

int32_t FSI_getRxECCCorrectedData ( uint32_t  base,
uint32_t *  pEccData 
)

This API gets ECC corrected data.

Parameters
base[IN] Base address of the FSI RX module
pEccData[OUT] Pointer to 32 bit ECC corrected data
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxECCLog()

int32_t FSI_getRxECCLog ( uint32_t  base,
uint16_t *  pEccLog 
)

This API gets ECC Log details.

Parameters
base[IN] Base address of the FSI RX module
pEccLog[OUT] Pointer to ECC Log value (8 bit)
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_enableRxInterrupt()

int32_t FSI_enableRxInterrupt ( uint32_t  base,
FSI_InterruptNum  intNum,
uint16_t  intFlags 
)

This API enables user to generate interrupt on occurrence of RX events.

Parameters
base[IN] Base address of the FSI RX module
intNum[IN] Type of interrupt to be generated, INT1 or INT2, refer FSI_InterruptNum
intFlags[IN] events on which interrupt should be generated. Each bit will represent one event, bits for the events on which user want to generate interrupt will be set others remain clear
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_disableRxInterrupt()

int32_t FSI_disableRxInterrupt ( uint32_t  base,
FSI_InterruptNum  intNum,
uint16_t  intFlags 
)

This API enables user to disable interrupt generation on RX events.

Parameters
base[IN] Base address of the FSI RX module
intNum[IN] Type of interrupt to be generated, INT1 or INT2, refer FSI_InterruptNum
intFlags[IN] events on which interrupt generation has to be disabled.
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_getRxBufferAddress()

int32_t FSI_getRxBufferAddress ( uint32_t  base,
uint32_t *  pAddr 
)

This API gets address of RX data buffer.


Data buffer is consisting of 16 words from offset- 0x40 to 0x4e

Parameters
base[IN] Base address of the FSI RX module
pAddr[OUT] Pointer to RX data buffer address
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_resetRxModule()

int32_t FSI_resetRxModule ( uint32_t  base,
FSI_RxSubmoduleInReset  submodule 
)

This API resets frame watchdog, ping watchdog or entire RX module.

Parameters
base[IN] Base address of the FSI RX module
submodule[IN] submodule which is supposed to be reset
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_clearRxModuleReset()

int32_t FSI_clearRxModuleReset ( uint32_t  base,
FSI_RxSubmoduleInReset  submodule 
)

This API clears resets on frame watchdog, ping watchdog or entire RX module.

Parameters
base[IN] Base address of the FSI RX module
submodule[IN] submodule which is to be brought out of reset
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_readRxBuffer()

int32_t FSI_readRxBuffer ( uint32_t  base,
uint16_t *  pArray,
uint16_t  length,
uint16_t  bufOffset 
)

This API reads data from FSI RX buffer.

Parameters
base[IN] Base address of the FSI RX module
pArray[IN] Pointer to the array of words to be received
length[IN] Number of words in the array to be received
bufOffset[IN] Offset in RX buffer where data will be read, offset is 16-bit aligned address
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_configRxDelayLine()

int32_t FSI_configRxDelayLine ( uint32_t  base,
FSI_RxDelayTapType  delayTapType,
uint16_t  tapValue 
)

This API adds delay for selected RX tap line.

Parameters
base[IN] Base address of the FSI RX module
delayTapType[IN] RX line for which delay needs to be added it can be either RXCLK,RXD0 or RXD1
tapValue[IN] 5 bit value of the amount of delay to be added
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter

◆ FSI_performRxInitialization()

int32_t FSI_performRxInitialization ( uint32_t  base)

This API initializes FSI RX module.


Software based initialization of the FSI receiver module.This is typically needed only once during initialization. However, if there are framing errors in the received frames, then the receive module needs to be reset so that subsequent frames/packets can be handled fresh

Parameters
base[IN] Base address of the FSI RX module
Returns
CSL_PASS = success CSL_EBADARGS = Invalid base address parameter