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AM64x MCU+ SDK
08.02.00
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Go to the documentation of this file.
59 #define TISCI_HOST_ID_DMSC (0U)
61 #define TISCI_HOST_ID_MAIN_0_R5_0 (35U)
63 #define TISCI_HOST_ID_MAIN_0_R5_1 (36U)
65 #define TISCI_HOST_ID_MAIN_0_R5_2 (37U)
67 #define TISCI_HOST_ID_MAIN_0_R5_3 (38U)
69 #define TISCI_HOST_ID_A53_0 (10U)
71 #define TISCI_HOST_ID_A53_1 (11U)
73 #define TISCI_HOST_ID_A53_2 (12U)
75 #define TISCI_HOST_ID_A53_3 (13U)
77 #define TISCI_HOST_ID_M4_0 (30U)
79 #define TISCI_HOST_ID_MAIN_1_R5_0 (40U)
81 #define TISCI_HOST_ID_MAIN_1_R5_1 (41U)
83 #define TISCI_HOST_ID_MAIN_1_R5_2 (42U)
85 #define TISCI_HOST_ID_MAIN_1_R5_3 (43U)
87 #define TISCI_HOST_ID_ICSSG_0 (50U)
93 #define TISCI_HOST_ID_ALL (128U)
96 #define TISCI_HOST_ID_CNT (15U)