AM64x MCU+ SDK  08.02.00

Detailed Description

access configuration for one OTP MMR. Each MMR is 32 bit wide.

Parameters
host_idId of the host owning the MMR
host_perms2 bit wide fields specifying permissions bit 1:0 - 10b - non-secure, any other value secure bit 7:2 - Reserved for future use

Data Fields

uint8_t host_id
 
uint8_t host_perms
 

Field Documentation

◆ host_id

uint8_t tisci_boardcfg_extended_otp_entry::host_id

◆ host_perms

uint8_t tisci_boardcfg_extended_otp_entry::host_perms