mcspi/v0/mcspi.h File Reference

Introduction

MCSPI Driver API/interface file.

Go to the source code of this file.

Data Structures
struct	MCSPI_Transaction
	Data structure used with MCSPI_transfer() More...
struct	MCSPI_OpenParams
	MCSPI Parameters. More...
struct	MCSPI_ChConfig
	MCSPI configuration parameters for the channel. More...
struct	MCSPI_Attrs
	MCSPI instance attributes - used during init time. More...
struct	MCSPI_ChObject
	MCSPI channel object. More...
struct	MCSPI_Object
	MCSPI driver object. More...
struct	MCSPI_Config
	MCSPI global configuration array. More...

Macros
#define	MCSPI_MAX_NUM_CHANNELS   (4U)
	Max number of channels/Chip Select (CS) supported. More...
#define	MCSPI_FIFO_LENGTH   (64U)
	Total length of FIFO for both TX/RX. More...
#define	MCSPI_RX_FIFO_ENABLE
	McSPI peripheral Rx FIFO is enabled. More...
#define	MCSPI_RX_FIFO_DISABLE
	McSPI peripheral Rx FIFO is disabled. More...
#define	MCSPI_TX_FIFO_ENABLE
	McSPI peripheral Tx FIFO is enabled. More...
#define	MCSPI_TX_FIFO_DISABLE
	McSPI peripheral Tx FIFO is disabled. More...
#define	MCSPI_REG_OFFSET   (0x14U)
	McSPI Register Offset for MCSPI_CHxCONF, MCSPI_CHxSTAT, MCSPI_CHxCTRL, MCSPI_TXx and MCSPI_RXx register set. More...
#define	MCSPI_CHCONF(x)
	Base address of McSPI_CHCONF(x) More...
#define	MCSPI_CHSTAT(x)
	Base address of McSPI_CHSTAT(x) More...
#define	MCSPI_CHCTRL(x)
	Base address of McSPI_CHCTRL(x) More...
#define	MCSPI_CHTX(x)
	Base address of McSPI_CHTX(x) More...
#define	MCSPI_CHRX(x)
	Base address of McSPI_CHRX(x) More...
#define	MCSPI_CLKD_MASK   (0x0FU)
#define	MCSPI_IRQSTATUS_CLEAR_ALL
	Bit mask to clear all status bits. More...
Channel Id
Values used to determine the channel number used for McSPI communication. This determines which Chip Select (CS) line to use
#define	MCSPI_CHANNEL_0   (0U)
#define	MCSPI_CHANNEL_1   (1U)
#define	MCSPI_CHANNEL_2   (2U)
#define	MCSPI_CHANNEL_3   (3U)
Operating Mode
Values used to determine the McSPI driver operation.
#define	MCSPI_OPER_MODE_POLLED   (0U)
#define	MCSPI_OPER_MODE_INTERRUPT   (1U)
#define	MCSPI_OPER_MODE_DMA   (2U)
Transfer Status Code
Status codes that are set by the MCSPI driver
#define	MCSPI_TRANSFER_COMPLETED   (0U)
#define	MCSPI_TRANSFER_STARTED   (1U)
#define	MCSPI_TRANSFER_CANCELLED   (2U)
#define	MCSPI_TRANSFER_FAILED   (3U)
#define	MCSPI_TRANSFER_CSN_DEASSERT   (4U)
#define	MCSPI_TRANSFER_TIMEOUT   (5U)
Transfer Mode
This determines whether the driver operates synchronously or asynchronously In MCSPI_TRANSFER_MODE_BLOCKING mode MCSPI_transfer() blocks code execution until the transaction has completed In MCSPI_TRANSFER_MODE_CALLBACK MCSPI_transfer() does not block code execution and instead calls a MCSPI_CallbackFxn callback function when the transaction has completed
#define	MCSPI_TRANSFER_MODE_BLOCKING   (0U)
	MCSPI_transfer() blocks execution. This mode can only be used when called within a Task context More...
#define	MCSPI_TRANSFER_MODE_CALLBACK   (1U)
	MCSPI_transfer() does not block code execution and will call a MCSPI_CallbackFxn. This mode can be used in a Task, Swi, or Hwi context More...
Modes of Operation
Definitions for various MCSPI modes of operation The MCSPI driver operates in both master and SPI slave modes. Logically, the implementation is identical, however the difference between these two modes is driven by hardware. The default mode is MCSPI_MS_MODE_MASTER, but can be set to slave mode by setting MCSPI_OpenParams.msMode to MCSPI_MS_MODE_SLAVE in the parameters passed to MCSPI_open().
#define	MCSPI_MS_MODE_MASTER   (CSL_MCSPI_MODULCTRL_MS_MASTER)
	The module generates the clock and CS. More...
#define	MCSPI_MS_MODE_SLAVE   (CSL_MCSPI_MODULCTRL_MS_SLAVE)
	The module receives the clock and CS. More...
Frame Format
Definitions for various SPI data frame formats POL0 = SPICLK is held low during the INACTIVE state POL1 = SPICLK is held high during the INACTIVE state PHA0 = Data are latched on odd-numbered edges of SPICLK PHA1 = Data are latched on even-numbered edges of SPICLK
#define	MCSPI_FF_POL0_PHA0   (0U)
#define	MCSPI_FF_POL0_PHA1   (1U)
#define	MCSPI_FF_POL1_PHA0   (2U)
#define	MCSPI_FF_POL1_PHA1   (3U)
Chip-select Polarity
Type for SPI Chip Select Polarity and Clock Idle Level
#define	MCSPI_CS_POL_HIGH   (CSL_MCSPI_CH0CONF_EPOL_ACTIVEHIGH)
	SPIEN (CS) is held high during the ACTIVE state. More...
#define	MCSPI_CS_POL_LOW   (CSL_MCSPI_CH0CONF_EPOL_ACTIVELOW)
	SPIEN (CS) is held low during the ACTIVE state. More...
Transmit-Receive Modes
#define	MCSPI_TR_MODE_TX_RX   (CSL_MCSPI_CH0CONF_TRM_TRANSRECEI)
#define	MCSPI_TR_MODE_RX_ONLY   (CSL_MCSPI_CH0CONF_TRM_RECEIVONLY)
#define	MCSPI_TR_MODE_TX_ONLY   (CSL_MCSPI_CH0CONF_TRM_TRANSONLY)
Input Select
#define	MCSPI_IS_D0   (CSL_MCSPI_CH0CONF_IS_LINE0)
	Data line 0 (SPIDAT[0]) selected for reception. More...
#define	MCSPI_IS_D1   (CSL_MCSPI_CH0CONF_IS_LINE1)
	Data line 1 (SPIDAT[1]) selected for reception. More...
Transmission Enable for Data Line
#define	MCSPI_DPE_ENABLE   (CSL_MCSPI_CH0CONF_DPE0_ENABLED)
	Data line selected for transmission. More...
#define	MCSPI_DPE_DISABLE   (CSL_MCSPI_CH0CONF_DPE0_DISABLED)
	No transmission on Data Line. More...
Slave Chip-select Signal Select
#define	MCSPI_SLV_CS_SELECT_0   (CSL_MCSPI_CH0CONF_SPIENSLV_SPIEN0)
#define	MCSPI_SLV_CS_SELECT_1   (CSL_MCSPI_CH0CONF_SPIENSLV_SPIEN1)
#define	MCSPI_SLV_CS_SELECT_2   (CSL_MCSPI_CH0CONF_SPIENSLV_SPIEN2)
#define	MCSPI_SLV_CS_SELECT_3   (CSL_MCSPI_CH0CONF_SPIENSLV_SPIEN3)
Start-bit Polarity
#define	MCSPI_SB_POL_HIGH   (CSL_MCSPI_CH0CONF_SBPOL_HIGHLEVEL)
	SStart-bit polarity is held to 1 during MCSPI transfer. More...
#define	MCSPI_SB_POL_LOW   (CSL_MCSPI_CH0CONF_SBPOL_LOWLEVEL)
	Start-bit polarity is held to 0 during MCSPI transfer. More...
Chip-select Idle Time
Values used to configure the chip select time control (TCS)
#define	MCSPI_TCS0_0_CLK   (CSL_MCSPI_CH0CONF_TCS0_ZEROCYCLEDLY)
	0.5 clock cycles delay More...
#define	MCSPI_TCS0_1_CLK   (CSL_MCSPI_CH0CONF_TCS0_ONECYCLEDLY)
	1.5 clock cycles delay More...
#define	MCSPI_TCS0_2_CLK   (CSL_MCSPI_CH0CONF_TCS0_TWOCYCLEDLY)
	2.5 clock cycles delay More...
#define	MCSPI_TCS0_3_CLK   (CSL_MCSPI_CH0CONF_TCS0_THREECYCLEDLY)
	3.5 clock cycles delay More...
Channel Mode
#define	MCSPI_CH_MODE_SINGLE   (CSL_MCSPI_MODULCTRL_SINGLE_SINGLE)
	Only one channel will be used in master mode. This should be used when CS is used in forced enable mode. More...
#define	MCSPI_CH_MODE_MULTI   (CSL_MCSPI_MODULCTRL_SINGLE_MULTI)
	More than one channel will be used in master mode. More...
Pin Mode
#define	MCSPI_PINMODE_3PIN   (CSL_MCSPI_MODULCTRL_PIN34_3PINMODE)
	SPIEN (CS) is not used. In this mode all related options to chip-select have no meaning. More...
#define	MCSPI_PINMODE_4PIN   (CSL_MCSPI_MODULCTRL_PIN34_4PINMODE)
Init Delay
Values used to enable initial delay for first transfer
#define	MCSPI_INITDLY_0   (CSL_MCSPI_MODULCTRL_INITDLY_NODELAY)
	No delay. More...
#define	MCSPI_INITDLY_4   (CSL_MCSPI_MODULCTRL_INITDLY_4CLKDLY)
	4 SPI bus clock delays More...
#define	MCSPI_INITDLY_8   (CSL_MCSPI_MODULCTRL_INITDLY_8CLKDLY)
	8 SPI bus clock delays More...
#define	MCSPI_INITDLY_16   (CSL_MCSPI_MODULCTRL_INITDLY_16CLKDLY)
	16 SPI bus clock delays More...
#define	MCSPI_INITDLY_32   (CSL_MCSPI_MODULCTRL_INITDLY_32CLKDLY)
	32 SPI bus clock delays More...

Typedefs
typedef void *	MCSPI_Handle
	A handle that is returned from a MCSPI_open() call. More...
typedef void(*	MCSPI_CallbackFxn) (MCSPI_Handle handle, MCSPI_Transaction *transaction)
	The definition of a callback function used by the SPI driver when used in MCSPI_TRANSFER_MODE_CALLBACK. More...

Functions
void	MCSPI_init (void)
	This function initializes the MCSPI module. More...
void	MCSPI_deinit (void)
	This function de-initializes the MCSPI module. More...
MCSPI_Handle	MCSPI_open (uint32_t index, const MCSPI_OpenParams *openPrms)
	This function opens a given MCSPI peripheral. More...
void	MCSPI_close (MCSPI_Handle handle)
	Function to close a MCSPI peripheral specified by the MCSPI handle. More...
int32_t	MCSPI_chConfig (MCSPI_Handle handle, const MCSPI_ChConfig *chCfg)
	Function to configure a MCSPI channel. More...
int32_t	MCSPI_dmaChConfig (MCSPI_Handle handle, const MCSPI_ChConfig *chCfg, const MCSPI_DmaChConfig *dmaChCfg)
	Function to configure a DMA of a channel. More...
int32_t	MCSPI_transfer (MCSPI_Handle handle, MCSPI_Transaction *transaction)
	Function to perform MCSPI transactions. More...
int32_t	MCSPI_transferCancel (MCSPI_Handle handle)
	Function to cancel MCSPI transactions on channel of a SPI peripheral specified by the MCSPI handle. More...
static void	MCSPI_OpenParams_init (MCSPI_OpenParams *openPrms)
	Function to initialize the MCSPI_OpenParams struct to its defaults. More...
static void	MCSPI_ChConfig_init (MCSPI_ChConfig *chConfig)
	Function to initialize the MCSPI_ChConfig struct to its defaults. More...
static void	MCSPI_Transaction_init (MCSPI_Transaction *trans)
	Function to initialize the MCSPI_Transaction struct to its defaults. More...
uint32_t	MCSPI_getBaseAddr (MCSPI_Handle handle)
	Function to get base address of MCSPI instance of a particular handle. More...
int32_t	MCSPI_reConfigFifo (MCSPI_Handle handle, uint32_t chNum, uint32_t numWordsRxTx)
	Function to re-configure Effective FIFO Words. More...
static uint32_t	MCSPI_getBufWidthShift (uint32_t dataSize)
	This API will return the buffer width in bytes based on dataSize. More...
static uint32_t	MCSPI_readChStatusReg (uint32_t baseAddr, uint32_t chNum)
	This API will return the status of the McSPI channel currently in use. More...
static uint32_t	MCSPI_readChCtrlReg (uint32_t baseAddr, uint32_t chNum)
	This API returns Channel control register value. More...
static void	MCSPI_writeChCtrlReg (uint32_t baseAddr, uint32_t chNum, uint32_t regVal)
	This API sets Channel control register value. More...
static uint32_t	MCSPI_readChConf (uint32_t baseAddr, uint32_t chNum)
	This API returns Channel Config register value. More...
static void	MCSPI_writeChConfReg (uint32_t baseAddr, uint32_t chNum, uint32_t regVal)
	This API sets Channel Config register value. More...
static void	MCSPI_writeTxDataReg (uint32_t baseAddr, uint32_t txData, uint32_t chNum)
	This API will put the data on to the McSPI Channel transmit register. More...
static void	MCSPI_enableTxFIFO (uint32_t baseAddr, uint32_t chNum, uint32_t enableFlag)
	This API will enable/disable the Tx FIFOs of McSPI peripheral. More...
static void	MCSPI_enableRxFIFO (uint32_t baseAddr, uint32_t chNum, uint32_t enableFlag)
	This API will enable/disable the Rx FIFOs of McSPI peripheral. More...
static uint32_t	MCSPI_readRxDataReg (uint32_t baseAddr, uint32_t chNum)
	This API will return the data present in the MCSPI_RX register. More...
static void	MCSPI_setDataWidth (uint32_t baseAddr, uint32_t chNum, uint32_t dataWidth)
	This API will set the data width in the channel config register. More...

Variables
MCSPI_Config	gMcspiConfig []
	Externally defined driver configuration array. More...
uint32_t	gMcspiConfigNum
	Externally defined driver configuration array size. More...