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AM64x MCU+ SDK
08.02.00
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42 #if defined(_TMS320C6X)
43 #include <kernel/dpl/CacheP_c6x.h>
60 #define CacheP_CACHELINE_ALIGNMENT (128U)
65 typedef enum CacheP_Type_ {
80 typedef struct CacheP_Config_ {
void CacheP_enable(uint32_t type)
Cache enable.
@ CacheP_TYPE_ALLP
Definition: CacheP.h:72
void CacheP_disable(uint32_t type)
Cache disable.
uint16_t size
Definition: tisci_boardcfg.h:1
@ CacheP_TYPE_L1
Definition: CacheP.h:70
uint32_t enableForceWrThru
Definition: CacheP.h:83
@ CacheP_TYPE_L2P
Definition: CacheP.h:68
Cache config structure, this used by SysConfig and not to be used by end-users directly.
Definition: CacheP.h:80
void CacheP_wbAll(uint32_t type)
Cache writeback for full cache.
void CacheP_wbInvAll(uint32_t type)
Cache writeback and invalidate for full cache.
uint32_t CacheP_getEnabled()
Get cache enabled bits.
uint16_t type
Definition: tisci_rm_core.h:1
uint64_t addr
Definition: csl_udmap_tr.h:3
@ CacheP_TYPE_L1D
Definition: CacheP.h:67
void CacheP_init()
Initialize Cache sub-system, called by SysConfig, not to be called by end users.
void CacheP_wbInv(void *addr, uint32_t size, uint32_t type)
Cache writeback and invalidate for a specified region.
void CacheP_inv(void *addr, uint32_t size, uint32_t type)
Cache invalidate for a specified region.
@ CacheP_TYPE_ALL
Definition: CacheP.h:74
@ CacheP_TYPE_L1P
Definition: CacheP.h:66
uint32_t enable
Definition: CacheP.h:82
CacheP_Type
Cache type.
Definition: CacheP.h:65
CacheP_Config gCacheConfig
Externally defined Cache configuration.
@ CacheP_TYPE_L2D
Definition: CacheP.h:69
void CacheP_wb(void *addr, uint32_t size, uint32_t type)
Cache writeback for a specified region.
@ CacheP_TYPE_ALLD
Definition: CacheP.h:73
@ CacheP_TYPE_L2
Definition: CacheP.h:71