AM64x MCU+ SDK  08.00.00

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Data Structures

struct  bsp_params
 Struct for FWHAL initialization Parameters. More...
 
struct  t_sm_processdata
 Struct for host to PRU-ICSS command interface. More...
 
struct  t_host_interface
 Struct for host to PRU-ICSS command interface Starts at PRU0 DMEM. More...
 
struct  t_register_properties
 Struct for register permission array. More...
 
struct  t_sm_properties
 
struct  t_mdio_params
 Struct for MDIO initialization parameters. More...
 

Macros

#define ENABLE_MULTIPLE_SM_ACCESS_IN_SINGLE_DATAGRAM   0
 
#define MAX_SYNC_MAN   8
 
#define SIZEOF_SM_REGISTER   8
 
#define TIESC_EEPROM_SIZE   0x800
 
#define MAILBOX_WRITE   0
 
#define MAILBOX_READ   1
 
#define PROCESS_DATA_OUT   2
 
#define PROCESS_DATA_IN   3
 
#define MBX_WRITE_EVENT   ((uint16_t) 0x0100)
 
#define MBX_READ_EVENT   ((uint16_t) 0x0200)
 
#define ESC_ADDR_REV_TYPE   0x000
 
#define ESC_ADDR_BUILD   0x002
 
#define ESC_ADDR_CONFIG_STATION_ALIAS   0x012
 
#define ESC_ADDR_DLSTATUS   0x110
 
#define ESC_ADDR_ALCONTROL   0x120
 
#define ESC_ADDR_ALSTATUS   0x130
 
#define ESC_ADDR_PDI_CONTROL   0x140
 
#define ESC_PDI_CONTROL_ELD_ALL_PORTS_MASK   (1 << 1)
 
#define ESC_ADDR_PDI_CONFIG   0x150
 
#define ESC_ADDR_AL_EVENT_MASK   0x204
 
#define ESC_ADDR_AL_EVENT_REQ   0x220
 
#define ESC_ADDR_SM_WD_STATUS   0x440
 
#define ESC_ADDR_EEPROM_CTRL   0x502
 
#define ESC_ADDR_MI_ECAT_ACCESS   0x516
 
#define ESC_ADDR_MI_PDI_ACCESS   0x517
 
#define ESC_EEPROM_CMD_MASK   0x0700
 
#define ESC_EEPROM_CMD_READ_MASK   0x0100
 
#define ESC_EEPROM_CMD_WRITE_MASK   0x0200
 
#define ESC_EEPROM_CMD_RELOAD_MASK   0x0400
 
#define ESC_EEPROM_ERROR_MASK   0x7800
 
#define ESC_EEPROM_ERROR_CRC   0x0800
 
#define ESC_EEPROM_ERROR_CMD_ACK   0x2000
 
#define ESC_EEPROM_BUSY_MASK   0x8000
 
#define ESC_ADDR_SYNCMAN   0x800
 
#define ESC_ADDR_SM1_STATUS   0x80D
 
#define SM_STATUS_MBX_FULL   0x08
 
#define ESC_ADDR_SM0_STATUS   0x805
 
#define ESC_ADDR_SM0_ACTIVATE   0x806
 
#define ESC_ADDR_SM1_ACTIVATE   0x806+8
 
#define ESC_ADDR_SM2_ACTIVATE   0x806+8*2
 
#define ESC_ADDR_SM3_ACTIVATE   0x806+8*3
 
#define ESC_ADDR_SM4_ACTIVATE   0x806+8*4
 
#define ESC_ADDR_SM5_ACTIVATE   0x806+8*5
 
#define ESC_ADDR_SM6_ACTIVATE   0x806+8*6
 
#define ESC_ADDR_SM7_ACTIVATE   0x806+8*7
 
#define ESC_ADDR_SM0_PDI_CONTROL   0x807
 
#define ESC_ADDR_SM1_PDI_CONTROL   0x807+8
 
#define ESC_ADDR_SM2_PDI_CONTROL   0x807+8*2
 
#define ESC_ADDR_SM3_PDI_CONTROL   0x807+8*3
 
#define ESC_ADDR_SM4_PDI_CONTROL   0x807+8*4
 
#define ESC_ADDR_SM5_PDI_CONTROL   0x807+8*5
 
#define ESC_ADDR_SM6_PDI_CONTROL   0x807+8*6
 
#define ESC_ADDR_SM7_PDI_CONTROL   0x807+8*7
 
#define SM_PDI_CONTROL_SM_DISABLE   1
 
#define ESC_ADDR_SYSTIME   0x910
 
#define ESC_ADDR_SYSTIME_HIGH   0x914
 
#define ESC_ADDR_SYSTIME_OFFSET   0x920
 
#define ESC_ADDR_SYSTIME_DELAY   0x928
 
#define ESC_ADDR_SPEEDCOUNTER_START   0x930
 
#define ESC_ADDR_TIMEDIFF_FILTDEPTH   0x934
 
#define ESC_ADDR_SPEEDDIFF_FILTDEPTH   0x935
 
#define ESC_ADDR_SYNC_PULSE_LENGTH   0x982
 
#define ESC_ADDR_SYNC_STATUS   0x98E
 
#define ESC_ADDR_LATCH0_CONTROL   0x9A8
 
#define ESC_ADDR_LATCH1_CONTROL   0x9A9
 
#define ESC_ADDR_LATCH0_POS_EDGE   0x9B0
 
#define ESC_ADDR_LATCH0_NEG_EDGE   0x9B8
 
#define ESC_ADDR_LATCH1_POS_EDGE   0x9C0
 
#define ESC_ADDR_LATCH1_NEG_EDGE   0x9C8
 
#define ESC_ADDR_TI_PORT0_ACTIVITY   0xE00
 
#define ESC_ADDR_TI_PORT1_ACTIVITY   0xE04
 
#define ESC_ADDR_TI_PORT0_PHYADDR   0xE08
 
#define ESC_ADDR_TI_PORT1_PHYADDR   0xE09
 
#define ESC_ADDR_TI_PDI_ISR_PINSEL   0xE0A
 
#define ESC_ADDR_TI_PHY_LINK_POLARITY   0XE0C
 
#define ESC_ADDR_TI_PORT0_TX_START_DELAY   0xE10
 
#define ESC_ADDR_TI_PORT1_TX_START_DELAY   0xE12
 
#define ESC_ADDR_TI_ESC_RESET   0xE14
 
#define ESC_ADDR_TI_EDMA_LATENCY_ENHANCEMENT   0xE24
 
#define TI_ESC_RST_CMD_U   0x545352
 
#define TI_ESC_RST_CMD_L   0x747372
 
#define ESC_ADDR_MEMORY   0x1000
 
#define CMD_DL_USER_CLEAR_AL_EVENT_HIGH   0x0
 
#define CMD_DL_USER_GET_BUFFER_READ_ADDR   0x1
 
#define CMD_DL_USER_GET_BUFFER_WRITE_ADDR   0x2
 
#define CMD_DL_USER_SET_BUFFER_WRITE_DONE   0x3
 
#define CMD_DL_USER_ACK_MBX_READ   0x4
 CMD_DL_USER_ACK_MBX_READ Mailbox read ACK. More...
 
#define CMD_DL_USER_ACK_MBX_WRITE   0x5
 CMD_DL_USER_ACK_MBX_WRITE Mailbox write ACK. More...
 
#define CMD_DL_USER_EEPROM_CMD_ACK   0x6
 CMD_DL_USER_EEPROM_CMD_ACK User EEPROM ACK. More...
 
#define CMD_DL_USER_READ_SYNC_STATUS   0x7
 CMD_DL_USER_READ_SYNC_STATUS User Read sync status. More...
 
#define SYNC0   0
 
#define SYNC1   1
 
#define CMD_DL_USER_READ_AL_CONTROL   0x8
 CMD_DL_USER_READ_AL_CONTROL User Read AL Control. More...
 
#define CMD_DL_USER_WRITE_AL_STATUS   0x9
 CMD_DL_USER_WRITE_AL_STATUS User Read AL Status. More...
 
#define CMD_DL_USER_READ_PD_WD_STATUS   0xA
 CMD_DL_USER_READ_PD_WD_STATUS User Read PD_WD Status. More...
 
#define CMD_DL_USER_READ_SM_ACTIVATE   0xB
 CMD_DL_USER_READ_SM_ACTIVATE User Read SM Activate. More...
 
#define CMD_DL_USER_WRITE_SM_PDI_CTRL   0xC
 CMD_DL_USER_WRITE_SM_PDI_CTRL User Write SM PDI control. More...
 
#define CMD_DL_USER_READ_LATCH_TIME   0xD
 CMD_DL_USER_READ_LATCH_TIME User Read latch time. More...
 
#define LATCH0_POS_EDGE   0
 
#define LATCH0_NEG_EDGE   1
 
#define LATCH1_POS_EDGE   2
 
#define LATCH1_NEG_EDGE   3
 
#define CMD_DL_USER_READ_SYS_TIME   0xE
 CMD_DL_USER_READ_SYS_TIME User Read sys time. More...
 
#define CMD_DL_USER_CLEAR_AL_EVENT_LOW   0xF
 CMD_DL_USER_CLEAR_AL_EVENT_LOW User clear AL event low. More...
 
#define SWAPWORD
 
#define SWAPDWORD
 
#define ICSS_MDIO_USRPHYSEL_LINKINT_ENABLE   0x40
 
#define ICSS_MDIO_USRPHYSEL_LINKSTAT_MLINK   0x80
 
#define TIESC_PERM_RW   0x0
 
#define TIESC_PERM_WRITE_ONLY   0x1
 
#define TIESC_PERM_READ_ONLY   0x2
 
#define TIESC_PERM_WRITE   TIESC_PERM_WRITE_ONLY
 
#define TIESC_PERM_READ   TIESC_PERM_READ_ONLY
 
#define PDI_PERM_RW   0x0
 
#define PDI_PERM_READ_ONLY   0x1
 
#define PDI_PERM_WRITE   PDI_PERM_RW
 
#define PDI_PERM_READ   PDI_PERM_READ_ONLY
 
#define TIESC_MDIO_CLKDIV   79
 
#define TIESC_MDIO_RX_LINK_DISABLE   0
 
#define TIESC_MDIO_RX_LINK_ENABLE   1
 
#define TIESC_LINK_POL_ACTIVE_LOW   1
 
#define TIESC_LINK_POL_ACTIVE_HIGH   0
 
#define PDI_WD_TRIGGER_RX_SOF   (0 << 4)
 PDI_WD_TRIGGER_RX_SOF Watchdog RX Start of Frame Trigger. More...
 
#define PDI_WD_TRIGGER_LATCH_IN   (1 << 4)
 PDI_WD_TRIGGER_LATCH_IN Watchdog LATCH IN Trigger. More...
 
#define PDI_WD_TRIGGER_SYNC0_OUT   (2 << 4)
 PDI_WD_TRIGGER_SYNC0_OUT Watchdog SYNC0 Trigger. More...
 
#define PDI_WD_TRIGGER_SYNC1_OUT   (3 << 4)
 PDI_WD_TRIGGER_SYNC1_OUT Watchdog SYNC1 Trigger. More...
 
#define TIESC_PORT0_TX_DELAY   0x48
 
#define TIESC_PORT1_TX_DELAY   TIESC_PORT0_TX_DELAY
 
#define PDI_ISR_EDIO_NUM   7
 
#define USE_ECAT_TIMER
 
#define ENABLE_PDI_TASK
 
#define ENABLE_SYNC_TASK
 
#define ASSERT_DMB()   __asm__(" dmb")
 SUPPORT_CMDACK_POLL_MODE If PDI and SYNC ISR is handled in HWI context (similar to SSC) interrupt mode of CMDACK won't work as they are low priority than SYNC and PDI ISR - use polling instead. More...
 
#define ASSERT_DSB()   __asm__(" dsb")
 
#define ECAT_TIMER_INC_P_MS   1000000
 
#define ESC_SYSTEMTIME_OFFSET_OFFSET   0x0920
 
#define ESC_SPEED_COUNTER_START_OFFSET   0x0930
 
#define ESC_DC_START_TIME_CYCLIC_OFFSET   0x0990
 
#define DRIFTCTRL_TASK_SYNC_ZERO_CROSS_ADJUST   0xE0
 
#define LOCK_PD_BUF_AVAILABLE_FOR_HOST   0
 LOCK_PD_BUF_AVAILABLE_FOR_HOST LOCK available for HOST. More...
 
#define LOCK_PD_BUF_HOST_ACCESS_START   1
 LOCK_PD_BUF_HOST_ACCESS_START Lock available for host access start. More...
 
#define LOCK_PD_BUF_HOST_ACCESS_FINISH   2
 LOCK_PD_BUF_HOST_ACCESS_FINISH Lock available for host access finish. More...
 
#define LOCK_PD_BUF_CHECK_AVAILABILITY_RETRY_COUNT   (10U)
 LOCK_PD_BUF_CHECK_AVAILABILITY_RETRY_COUNT Number of times the lock_state of SM is checked for availability in bsp_get_process_data_address function, in case the lock_state is not LOCK_PD_BUF_HOST_ACCESS_START. More...
 

Typedefs

typedef int32_t(* bsp_eeprom_read_t) (uint8_t *buf, uint32_t len)
 
typedef int32_t(* bsp_eeprom_write_t) (uint8_t *buf, uint32_t len)
 
typedef void(* bsp_init_spinlock_t) (void)
 
typedef uint32_t(* bsp_hwspinlock_lock_t) (int num)
 
typedef void(* bsp_hwspinlock_unlock_t) (int num)
 
typedef void(* bsp_ethphy_init_t) (PRUICSS_Handle pruIcssHandle, uint8_t phy0addr, uint8_t phy1addr, uint8_t enhancedlink_enable)
 
typedef int8_t(* bsp_get_phy_address_t) (uint8_t instance, uint8_t portNumber)
 
typedef void(* bsp_ethercat_stack_isr_function) (void)
 

Functions

void bsp_params_init (bsp_params *init_params)
 Initialize the members of bsp_params with default values. More...
 
int32_t bsp_init (bsp_params *init_params)
 Initialize the EtherCAT FWHAL
It does following things:
. More...
 
void bsp_esc_reg_perm_init (PRUICSS_Handle pruIcssHandle)
 Sets up register permissions for ECAT side access for TI ESC, if ENABLE_PDI_REG_PERMISSIONS is defined in tiescbsp.h, then this function also initializes register permissions for PDI side access from stack/application. More...
 
void bsp_start_esc_isr (PRUICSS_Handle pruIcssHandle)
 Register IRQ handlers for various PRU-ICSS interrupts from firmware to host to clear corresponding events in PRU-ICSS INTC. More...
 
void bsp_exit (PRUICSS_Handle pruIcssHandle)
 Cleanup of EtherCAT FWHAL
It does following things:
. More...
 
void bsp_set_pdi_wd_trigger_mode (PRUICSS_Handle pruIcssHandle, uint32_t mode)
 Configure PDI WD trigger mode, PDI WD is triggered automatically by h/w on RX_SOF(port0/port1), latch0/1 input high, SYNC0/1 out high. PDI WD is also triggered whenever host sends a command to firmware. PDI WD may not expire if host stops sending commands to firmware alone, this will occur only if configured h/w events do not occur during WD period. More...
 
void bsp_send_command_to_firmware (PRUICSS_Handle pruIcssHandle, uint32_t command, uint16_t param1, uint16_t param2)
 Send command and parameters from stack to firmware to perform some action based on stack state or in response to AL event interrupt or SYNC interrupt from ESC. More...
 
void bsp_eeprom_emulation_init (void)
 Initialize the EEPROM cache in volatile RAM. If the non-volatile storage has valid data(read is performed using eeprom_read callback from bsp_params passed during bsp_init), load from there. Otherwise it loads predefined EEPROM in application using default_tiesc_eeprom from bsp_params passed during bsp_init. More...
 
int32_t bsp_eeprom_load_esc_registers (PRUICSS_Handle pruIcssHandle, int32_t reload_flag)
 For loading ESC registers from EEPROM during first boot/reload after validating CRC. More...
 
int32_t bsp_eeprom_emulation_reload (PRUICSS_Handle pruIcssHandle)
 Perform reload operation after validating EEPROM CRC. More...
 
void bsp_eeprom_emulation_command_ack (PRUICSS_Handle pruIcssHandle)
 Perform reload operation after validating EEPROM CRC, Wrapper API for SSC. More...
 
void bsp_eeprom_emulation_flush (void)
 Flush the EEPROM cache to non-volatile storage. Write is performed using eeprom_write callback from bsp_params passed during bsp_init. More...
 
void bsp_eeprom_emulation_exit (void)
 Call EEPROM flush on exit. More...
 
uint8_t * bsp_get_eeprom_cache_base (void)
 Return pointer to volatile EEPROM cache in FWHAL for processing to access the EEPROM. More...
 
void bsp_set_eeprom_updated_time (void)
 Set EEPROM update time. More...
 
uint32_t bsp_get_eeprom_updated_time (void)
 Get EEPROM Updated time. More...
 
void bsp_set_eeprom_update_status (uint8_t status)
 Indicate to FWHAL whether EEPROM is written for flushing to non-volatile storage. Typically called on EEPROM write detection from stack. More...
 
uint8_t bsp_get_eeprom_update_status (void)
 Read the EEPROM update status from FWHAL. Typically called from low priority task periodically check EEPROM dirty status for flush. More...
 
void bsp_set_sm_properties (PRUICSS_Handle pruIcssHandle, uint8_t sm, uint16_t address, uint16_t len)
 Set the address, length info from register to FWHAL layer. During INIT to PREOP transition in Mailbox mode. During SAFEOP to OP transition in Buffer mode. More...
 
t_sm_propertiesbsp_get_sm_properties (uint8_t sm)
 Get the pointer to requested SM properties. It is used for Buffer/Mailbox read/write detection from Host PDI interface to indicate to the firmware. More...
 
int16_t bsp_get_sm_index (uint16_t address, uint16_t len)
 
uint8_t bsp_pdi_sm_config_ongoing (PRUICSS_Handle pruIcssHandle)
 Checks whether firmware has finished updating internal state for SM configuration change initiated by stack/PDI. More...
 
void bsp_pdi_mbx_read_start (PRUICSS_Handle pruIcssHandle)
 Indicates to the firmware that PDI side read from write mailbox has started. More...
 
void bsp_pdi_mbx_read_complete (PRUICSS_Handle pruIcssHandle)
 Indicates to the firmware that PDI side read from write mailbox has completed. More...
 
void bsp_pdi_mbx_write_start (PRUICSS_Handle pruIcssHandle)
 Indicates to the firmware that PDI side write to read mailbox has started. More...
 
void bsp_pdi_mbx_write_complete (PRUICSS_Handle pruIcssHandle)
 Indicates to the firmware that PDI side write to read mailbox has completed. More...
 
uint16_t bsp_get_process_data_address (PRUICSS_Handle pruIcssHandle, uint16_t address, uint16_t len, int16_t *p_sm_index)
 Get the actual address of the buffer for PDI side read/write from host in 3-buffer mode. More...
 
void bsp_process_data_access_complete (PRUICSS_Handle pruIcssHandle, uint16_t address, uint16_t len, int16_t sm_index)
 This API is invoked after PDI side completes read/write to PD address returned by bsp_get_process_data_address to indicate this to firmware for swapping buffers etc. More...
 
uint8_t bsp_read_byte (PRUICSS_Handle pruIcssHandle, uint16_t address)
 Read a byte value at 'Address' from ESC memory: SM mailbox (single buffer) mapped or register area. More...
 
uint16_t bsp_read_word (PRUICSS_Handle pruIcssHandle, uint16_t address)
 Read a 16-bit value at 'Address' from ESC memory: SM mailbox (single buffer) mapped or register area. More...
 
uint32_t bsp_read_dword (PRUICSS_Handle pruIcssHandle, uint16_t address)
 Read a 32-bit value at 'Address' from ESC memory: SM mailbox (single buffer) mapped or register area. More...
 
void bsp_read (PRUICSS_Handle pruIcssHandle, uint8_t *pdata, uint16_t address, uint16_t len)
 Read a byte array at 'address' from ESC memory. More...
 
uint8_t bsp_read_byte_isr (PRUICSS_Handle pruIcssHandle, uint16_t address)
 Read a byte value at 'Address' from ESC process data memory: SM buffer (3-buffer) mapped area. More...
 
uint16_t bsp_read_word_isr (PRUICSS_Handle pruIcssHandle, uint16_t address)
 Read a 16-bit value at 'Address' from ESC process data memory: SM buffer (3-buffer) mapped area. More...
 
uint32_t bsp_read_dword_isr (PRUICSS_Handle pruIcssHandle, uint16_t address)
 Read a 32-bit value at 'Address' from ESC process data memory: SM buffer (3-buffer) mapped area. More...
 
void bsp_pdi_post_read_indication (PRUICSS_Handle pruIcssHandle, uint16_t address, uint16_t length)
 Invoked after reading a register or mailbox buffer from PDI side
. More...
 
void bsp_pdi_write_indication (PRUICSS_Handle pruIcssHandle, uint16_t address, uint16_t length, uint16_t value)
 Invoked after writing a register or mailbox buffer from PDI side
. More...
 
void bsp_write_byte (PRUICSS_Handle pruIcssHandle, uint8_t val, uint16_t address)
 Write a byte value at 'address' in ESC memory. More...
 
void bsp_write_word (PRUICSS_Handle pruIcssHandle, uint16_t val, uint16_t address)
 Write a 16-bit value at 'address' in ESC memory. More...
 
void bsp_write_dword (PRUICSS_Handle pruIcssHandle, uint32_t val, uint16_t address)
 Write a 32-bit value at 'address' in ESC memory. More...
 
void bsp_write (PRUICSS_Handle pruIcssHandle, uint8_t *pdata, uint16_t address, uint16_t len)
 Write 'len' bytes from pdata to 'address' in ESC memory. More...
 
uint32_t bsp_pruss_mdioreg_read (PRUICSS_Handle pruIcssHandle, uint32_t regoffset)
 Read a 32-bit value from PRU-ICSS MDIO register at 'regoffset'. More...
 
void bsp_pruss_mdioreg_write (PRUICSS_Handle pruIcssHandle, uint32_t val, uint32_t regoffset)
 Write a 32-bit value from PRU-ICSS MDIO register at 'regoffset'. More...
 
uint32_t bsp_pruss_iepreg_read (PRUICSS_Handle pruIcssHandle, uint32_t regoffset)
 Read a 32-bit value from PRU-ICSS IEP register at 'regoffset'. More...
 
void bsp_pruss_iepreg_write (PRUICSS_Handle pruIcssHandle, uint32_t val, uint32_t regoffset)
 Write a 32-bit value from PRU-ICSS IEP register at 'regoffset'. More...
 
void bsp_pruss_cmd_intfc_write_word (uint16_t val, volatile uint16_t *ptr)
 Read a 16-bit value from PRU-ICSS IEP command interface. More...
 
uint16_t bsp_pruss_cmd_intfc_read_word (volatile uint16_t *ptr)
 Read a 16-bit value from PRU-ICSS IEP command interface. More...
 
uint8_t bsp_get_pdi_access_perm (uint16_t address, uint8_t access)
 Checks if the PDI register [byte] has the requested access permission and returns the result. More...
 
uint8_t bsp_pdi_access_perm_word (uint16_t address, uint8_t access)
 Checks if the PDI register [Two bytes] has the requested access permission and returns the result. More...
 
uint8_t bsp_pdi_access_perm_dword (uint16_t address, uint8_t access)
 Checks if the PDI register [Four bytes] has the requested access permission and returns the result. More...
 
uint8_t bsp_pdi_access_perm_array (uint16_t address, uint8_t access, uint16_t size)
 Checks if all PDI registers starting from 'address' has the requested access permission and returns the result. More...
 
void bsp_set_pdi_perm_read_only (uint16_t *perm_array, uint16_t address)
 Set the PDI register [byte] access permission to read only. More...
 
void bsp_set_pdi_perm_read_write (uint16_t *perm_array, uint16_t address)
 Set the PDI register [byte] access permission to read and write. More...
 
uint8_t bsp_is_pdi_perm_read_only (uint16_t *perm_array, uint16_t address)
 Checks if the PDI register [byte] has read only access permission and returns the result. More...
 
uint32_t bsp_get_pdi_read_access_fail_cnt ()
 Returns the count of PDI read access failures. More...
 
uint32_t bsp_get_pdi_write_access_fail_cnt ()
 Returns the count of PDI write access failures. More...
 
int16_t bsp_pruss_mdio_init (PRUICSS_Handle pruIcssHandle, t_mdio_params *pmdio_params)
 Initializes PRU-ICSS MDIO for EtherCAT firmware to communicate with PHYs. Must be called after powering on PRU-ICSS domain and before PRU firmware is loaded and executed on both PRUs. This is called from bsp_init. More...
 
int16_t bsp_pruss_mdio_phy_read (PRUICSS_Handle pruIcssHandle, uint8_t phyaddr, uint8_t regoffset, uint16_t *regval)
 API to read PHY register via PRU-ICSS MDIO. More...
 
int16_t bsp_pruss_mdio_phy_write (PRUICSS_Handle pruIcssHandle, uint8_t phyaddr, uint8_t regoffset, uint16_t regval)
 API to write PHY register via PRU-ICSS MDIO. More...
 
uint32_t bsp_pruss_mdio_phy_link_state (PRUICSS_Handle pruIcssHandle, uint8_t phyaddr)
 Get the link status for selected PHY, this API considers MII_link signal polarity differences and recommended when TIESC_MDIO_RX_LINK_ENABLE is enabled for enhanced link detection. More...
 
void bsp_set_digio_sw_dataout_enable (PRUICSS_Handle pruIcssHandle)
 Configure digio for sw controlled dataout mode. More...
 
void bsp_set_digio_out (PRUICSS_Handle pruIcssHandle, uint8_t num)
 Set selected digital output pin. More...
 
void bsp_clear_digio_out (PRUICSS_Handle pruIcssHandle, uint8_t num)
 Clear selected digital output pin. More...
 
void bsp_hwspinlock_init (void)
 Initialize SOC spinlock, enable clocks and init spinlock instance 0 through 7 to unlocked state. More...
 
uint32_t bsp_hwspinlock_lock (int num)
 Acquire selected spinlock instance. More...
 
void bsp_hwspinlock_unlock (int num)
 Release selected spinlock instance. More...
 
uint32_t bsp_get_timer_register (void)
 Returns the time difference from last call of bsp_clear_timer_register to this bsp_get_timer_register. It handles overflow. More...
 
void bsp_clear_timer_register (void)
 Update the time when bsp_clear_timer_register last invoked. This is a wrapper API used by SSC. More...
 
void bsp_get_local_sys_time (uint32_t *systime_low, uint32_t *systime_high)
 Return EtherCAT time base for application use. More...
 
void bsp_get_latch0_posedge_time (PRUICSS_Handle pruIcssHandle, uint32_t *systime_low, uint32_t *systime_high)
 Return latch0 posedge timestamp for application use(nanosec resolution) More...
 
void bsp_get_latch0_negedge_time (PRUICSS_Handle pruIcssHandle, uint32_t *systime_low, uint32_t *systime_high)
 Return latch0 negedge timestamp for application use(nanosec resolution) More...
 
void bsp_get_latch1_posedge_time (PRUICSS_Handle pruIcssHandle, uint32_t *systime_low, uint32_t *systime_high)
 Return latch1 posedge timestamp for application use(nanosec resolution) More...
 
void bsp_get_latch1_negedge_time (PRUICSS_Handle pruIcssHandle, uint32_t *systime_low, uint32_t *systime_high)
 Return latch0 negedge timestamp for application use(nanosec resolution) More...
 
void bsp_global_mutex_lock (void)
 Critical section enter API using semaphore/mutex/interrupt disable primitives from RTOS. Implemented using HwiP_disableInt API. More...
 
void bsp_global_mutex_unlock (void)
 Critical section leave API using semaphore/mutex/interrupt enable primitives from RTOS. Implemented using HwiP_enableInt API. More...
 
void Sync0Isr (void *args)
 SYNC0 IRQ handler. More...
 
void Sync1Isr (void *args)
 SYNC1 IRQ Handler. More...
 
void EcatIsr (void *args)
 ECAT IRQ Handler. More...
 
void EscCmdLowAckIsr (void *args)
 ESC CMD Low ACK IRQ Handler. More...
 
void bsp_set_pru_firmware (uint32_t *frameProc, uint32_t frameProcLen, uint32_t *hostProc, uint32_t hostProcLen)
 This function internally sets the location from which PRU firmwares can be loaded. More...