Data Structures
struct	tisci_msg_proc_request_req
	This file contains: More...

struct	tisci_msg_proc_request_resp
	Request for physical processor control response. More...

struct	tisci_msg_proc_release_req
	Release physical processor control request. More...

struct	tisci_msg_proc_release_resp
	Release physical processor control response. More...

struct	tisci_msg_proc_handover_req
	Request to handover control of a processor to another host if permitted. More...

struct	tisci_msg_proc_handover_resp
	Response to handover of control of a processor to another host if permitted. More...

struct	tisci_msg_proc_set_config_req
	Processor Boot Configuration. More...

struct	tisci_msg_proc_set_config_resp
	Response to Processor Boot Configuration message. More...

struct	tisci_msg_proc_set_control_req
	Optional processor specific message for sequence control. More...

struct	tisci_msg_proc_set_control_resp
	Response to optional processor specific message for sequence control. More...

struct	tisci_msg_proc_auth_boot_req
	Authenticate and start image. More...

struct	tisci_msg_proc_auth_boot_resp
	Response to authenticate and start image request. More...

struct	tisci_msg_proc_get_status_req
	Processor Status request. More...

struct	tisci_msg_proc_get_status_resp
	Processor Status Response. More...

struct	tisci_msg_proc_status_wait_req
	Processor Status Wait. More...

struct	tisci_msg_proc_status_wait_resp
	Processor Status Wait Response. More...

Macros
#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_ARMV8_DBG_EN (0x00000001U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_ARMV8_DBG_NIDEN (0x00000002U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPIDEN (0x00000004U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPNIDEN (0x00000008U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_ARMV8_AARCH32 (0x00000100U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_DBG_EN (0x00000001U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_DBG_NIDEN (0x00000002U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_LOCKSTEP (0x00000100U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_TEINIT (0x00000200U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_NMFI_EN (0x00000400U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE (0x00000800U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_BTCM_EN (0x00001000U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_ATCM_EN (0x00002000U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_MEM_INIT_DIS (0x00004000U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE (0x00008000U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_MASK (0x0000000FU)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_SHIFT (0x00000000U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_1 (0x00000001U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_2 (0x00000002U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_3 (0x00000003U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_4 (0x00000004U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_5 (0x00000005U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2AL_MASK (0x000000F0U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2AL_SHIFT (0x00000004U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2AL_2 (0x00000020U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2AL_3 (0x00000030U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2AL_4 (0x00000040U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2AL_5 (0x00000050U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C6X_SSCLKMV_MASK (0x00000007U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C6X_SSCLKMV_SHIFT (0x00000000U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C6X_SSCLKMV_DIV2 (0x00000001U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C6X_SSCLKMV_DIV3 (0x00000002U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C6X_SSCLKMV_DIV4 (0x00000003U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_M4F_DBG_EN (0x00000001U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_M4F_DBG_NIDEN (0x00000002U)

#define	TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_HSM_DBG_EN (0x00000004U)

#define	TISCI_MSG_VAL_PROC_BOOT_CTRL_FLAG_ARMV8_ACINACTM (0x00000001U)

#define	TISCI_MSG_VAL_PROC_BOOT_CTRL_FLAG_ARMV8_AINACTS (0x00000002U)

#define	TISCI_MSG_VAL_PROC_BOOT_CTRL_FLAG_ARMV8_L2FLUSHREQ (0x00000100U)

#define	TISCI_MSG_VAL_PROC_BOOT_CTRL_FLAG_R5_CORE_HALT (0x00000001U)

#define	TISCI_MSG_VAL_PROC_BOOT_CTRL_FLAG_R5_LPSC (0x00000002U)

#define	TISCI_MSG_VAL_PROC_BOOT_CTRL_FLAG_R5_RESET (0x00000004U)

#define	TISCI_MSG_VAL_PROC_BOOT_CTRL_FLAG_HSM_M4_RESET (0x00000001U)

#define	TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_ARMV8_WFE (0x00000001U)

#define	TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_ARMV8_WFI (0x00000002U)

#define	TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_ARMV8_L2F_DONE (0x00000010U)

#define	TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_ARMV8_STANDBYWFIL2 (0x00000020U)

#define	TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_WFE (0x00000001U)

#define	TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_WFI (0x00000002U)

#define	TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_CLK_GATED (0x00000004U)

#define	TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED (0x00000100U)

#define	TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_SINGLECORE_ONLY (0x00000200U)

#define	TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_C7X_WFE (0x00000001U)

#define	TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_C7X_WFI (0x00000002U)

#define	TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_M4F_WFI (0x00000002U)

Functions
struct tisci_msg_proc_request_req	__attribute__ ((__packed__))

Variables
struct tisci_header	hdr

uint8_t	processor_id

uint8_t	host_id

uint32_t	bootvector_lo

uint32_t	bootvector_hi

uint32_t	config_flags_1_set

uint32_t	config_flags_1_clear

uint32_t	control_flags_1_set

uint32_t	control_flags_1_clear

uint32_t	certificate_address_lo

uint32_t	certificate_address_hi

uint32_t	image_address_lo

uint32_t	image_address_hi

uint32_t	image_size

uint32_t	config_flags_1

uint32_t	control_flags_1

uint32_t	status_flags_1

uint8_t	num_wait_iterations

uint8_t	num_match_iterations

uint8_t	delay_per_iteration_us

uint8_t	delay_before_iteration_loop_start_us

uint32_t	status_flags_1_set_all_wait

uint32_t	status_flags_1_set_any_wait

uint32_t	status_flags_1_clr_all_wait

uint32_t	status_flags_1_clr_any_wait

Variable Documentation

◆ hdr

struct tisci_header hdr

◆ processor_id

uint8_t processor_id

◆ host_id

uint8_t host_id

◆ bootvector_lo

uint32_t bootvector_lo

◆ bootvector_hi

uint32_t bootvector_hi

◆ config_flags_1_set

uint32_t config_flags_1_set

◆ config_flags_1_clear

uint32_t config_flags_1_clear

◆ control_flags_1_set

uint32_t control_flags_1_set

◆ control_flags_1_clear

uint32_t control_flags_1_clear

◆ certificate_address_lo

uint32_t certificate_address_lo

◆ certificate_address_hi

uint32_t certificate_address_hi

◆ image_address_lo

uint32_t image_address_lo

◆ image_address_hi

uint32_t image_address_hi

◆ image_size

uint32_t image_size

◆ config_flags_1

uint32_t config_flags_1

◆ control_flags_1

uint32_t control_flags_1

◆ status_flags_1

uint32_t status_flags_1

◆ num_wait_iterations

uint8_t num_wait_iterations

◆ num_match_iterations

uint8_t num_match_iterations

◆ delay_per_iteration_us

uint8_t delay_per_iteration_us

◆ delay_before_iteration_loop_start_us

uint8_t delay_before_iteration_loop_start_us

◆ status_flags_1_set_all_wait

uint32_t status_flags_1_set_all_wait

◆ status_flags_1_set_any_wait

uint32_t status_flags_1_set_any_wait

◆ status_flags_1_clr_all_wait

uint32_t status_flags_1_clr_all_wait

◆ status_flags_1_clr_any_wait

uint32_t status_flags_1_clr_any_wait

Data Structures

Macros

Functions

Variables