AM62x MCU+ SDK  10.01.00
esmGroupIntrStatus_t Struct Reference

Detailed Description

Structure to access the status of interrupts belonging to a High or Low priority interrupt.

Data Fields

uint32_t highestPendPlsIntNum
 
uint32_t highestPendLvlIntNum
 
uint32_t grpIntrStatus
 

Field Documentation

◆ highestPendPlsIntNum

uint32_t esmGroupIntrStatus_t::highestPendPlsIntNum

Indicates what is the highest priority High Priority interrupt caused by a pulse number.

◆ highestPendLvlIntNum

uint32_t esmGroupIntrStatus_t::highestPendLvlIntNum

Indicates what is the highest priority High Priority interrupt caused by a level number.

◆ grpIntrStatus

uint32_t esmGroupIntrStatus_t::grpIntrStatus

Indicates which Event Groups have one or more interrupts pending. This register is bit oriented where bit 0 is for Event Group 0, bit 1 is for Event Group 1, etc… (bit N is for Event Group N).