AM62x MCU+ SDK  10.01.00
Udma_RmInitPrms Struct Reference

Detailed Description

UDMA resource manager init parameters.

This assumes contiguos allocation of 'N' resources from a start offset to keep the interface simple.

Note: This is applicable for the driver handle as given during init call. The init call doesn't (can't rather) check for resource overlap across handles and across cores. It is the callers responsibility to ensure that resources overlaps are not present.

Data Fields

uint32_t startBlkCopyUhcCh
 
uint32_t numBlkCopyUhcCh
 
uint32_t startBlkCopyHcCh
 
uint32_t numBlkCopyHcCh
 
uint32_t startBlkCopyCh
 
uint32_t numBlkCopyCh
 
uint32_t startTxUhcCh
 
uint32_t numTxUhcCh
 
uint32_t startTxHcCh
 
uint32_t numTxHcCh
 
uint32_t startTxCh
 
uint32_t numTxCh
 
uint32_t startRxUhcCh
 
uint32_t numRxUhcCh
 
uint32_t startRxHcCh
 
uint32_t numRxHcCh
 
uint32_t startRxCh
 
uint32_t numRxCh
 
uint32_t startFreeFlow
 
uint32_t numFreeFlow
 
uint32_t startFreeRing
 
uint32_t numFreeRing
 
uint32_t startGlobalEvent
 
uint32_t numGlobalEvent
 
uint32_t startVintr
 
uint32_t numVintr
 
uint32_t startIrIntr
 
uint32_t numIrIntr
 
uint32_t startC7xCoreIntr
 

Field Documentation

◆ startBlkCopyUhcCh

uint32_t Udma_RmInitPrms::startBlkCopyUhcCh

Start ultra high capacity block copy channel from which this UDMA driver instance manages

◆ numBlkCopyUhcCh

uint32_t Udma_RmInitPrms::numBlkCopyUhcCh

Number of ultra high capacity block copy channel to be managed. Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_UHC_CH

◆ startBlkCopyHcCh

uint32_t Udma_RmInitPrms::startBlkCopyHcCh

Start high capacity block copy channel from which this UDMA driver instance manages

◆ numBlkCopyHcCh

uint32_t Udma_RmInitPrms::numBlkCopyHcCh

Number of ultra high capacity block copy channel to be managed. Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_HC_CH

◆ startBlkCopyCh

uint32_t Udma_RmInitPrms::startBlkCopyCh

Start Block copy channel from which this UDMA driver instance manages

◆ numBlkCopyCh

uint32_t Udma_RmInitPrms::numBlkCopyCh

Number of Block copy channel to be managed. Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_CH

◆ startTxUhcCh

uint32_t Udma_RmInitPrms::startTxUhcCh

Start ultra high capacity TX channel from which this UDMA driver instance manages

◆ numTxUhcCh

uint32_t Udma_RmInitPrms::numTxUhcCh

Number of ultra high capacity TX channel to be managed. Note: This cannot exceed UDMA_RM_MAX_TX_UHC_CH

◆ startTxHcCh

uint32_t Udma_RmInitPrms::startTxHcCh

Start high capacity TX channel from which this UDMA driver instance manages

◆ numTxHcCh

uint32_t Udma_RmInitPrms::numTxHcCh

Number of high capacity TX channel to be managed. Note: This cannot exceed UDMA_RM_MAX_TX_HC_CH

◆ startTxCh

uint32_t Udma_RmInitPrms::startTxCh

Start TX channel from which this UDMA driver instance manages

◆ numTxCh

uint32_t Udma_RmInitPrms::numTxCh

Number of TX channel to be managed. Note: This cannot exceed UDMA_RM_MAX_TX_CH

◆ startRxUhcCh

uint32_t Udma_RmInitPrms::startRxUhcCh

Start ultra high capacity RX channel from which this UDMA driver instance manages

◆ numRxUhcCh

uint32_t Udma_RmInitPrms::numRxUhcCh

Number of high capacity RX channel to be managed. Note: This cannot exceed UDMA_RM_MAX_RX_UHC_CH

◆ startRxHcCh

uint32_t Udma_RmInitPrms::startRxHcCh

Start high capacity RX channel from which this UDMA driver instance manages

◆ numRxHcCh

uint32_t Udma_RmInitPrms::numRxHcCh

Number of high capacity RX channel to be managed. Note: This cannot exceed UDMA_RM_MAX_RX_HC_CH

◆ startRxCh

uint32_t Udma_RmInitPrms::startRxCh

Start RX channel from which this UDMA driver instance manages

◆ numRxCh

uint32_t Udma_RmInitPrms::numRxCh

Number of RX channel to be managed. Note: This cannot exceed UDMA_RM_MAX_RX_CH

◆ startFreeFlow

uint32_t Udma_RmInitPrms::startFreeFlow

Start free flow from which this UDMA driver instance manages

◆ numFreeFlow

uint32_t Udma_RmInitPrms::numFreeFlow

Number of free flow to be managed. Note: This cannot exceed UDMA_RM_MAX_FREE_FLOW

◆ startFreeRing

uint32_t Udma_RmInitPrms::startFreeRing

Start free ring from which this UDMA driver instance manages

◆ numFreeRing

uint32_t Udma_RmInitPrms::numFreeRing

Number of free ring to be managed. Note: This cannot exceed UDMA_RM_MAX_FREE_RING

◆ startGlobalEvent

uint32_t Udma_RmInitPrms::startGlobalEvent

Start global event from which this UDMA driver instance manages

◆ numGlobalEvent

uint32_t Udma_RmInitPrms::numGlobalEvent

Number of global event to be managed. Note: This cannot exceed UDMA_RM_MAX_GLOBAL_EVENT

◆ startVintr

uint32_t Udma_RmInitPrms::startVintr

Start VINT number from which this UDMA driver instance manages

◆ numVintr

uint32_t Udma_RmInitPrms::numVintr

Number of VINT to be managed. Note: This cannot exceed UDMA_RM_MAX_VINTR

◆ startIrIntr

uint32_t Udma_RmInitPrms::startIrIntr

Start IR interrupt from which this UDMA driver instance manages.

◆ numIrIntr

uint32_t Udma_RmInitPrms::numIrIntr

Number of IR interrupts to be managed. Note: This cannot exceed UDMA_RM_MAX_IR_INTR

◆ startC7xCoreIntr

uint32_t Udma_RmInitPrms::startC7xCoreIntr

Start C7x core interrupt from which this UDMA driver instance manages. This assumes numIrIntr contiguous interrupts from this offset is reserved for the UDMA driver. This is NA for other cores and could be set to 0.