Detailed Description

This structure contains error forcing information used by the SDL_ecc_aggrForceEDCInterconnectError function.

Design: PROC_SDL-1277

Data Fields
SDL_Ecc_AggrIntrSrc	intrSrc

uint32_t	eccGroup

uint32_t	eccBit1

uint32_t	eccBit2

bool	bNextBit

uint32_t	eccPattern

Field Documentation

◆ intrSrc

SDL_Ecc_AggrIntrSrc SDL_Ecc_AggrEDCInterconnectErrorInfo::intrSrc

Identifies the interrupt source (SDL_ECC_AGGR_INTR_SRC_SINGLE_BIT or SDL_ECC_AGGR_INTR_SRC_DOUBLE_BIT)

◆ eccGroup

uint32_t SDL_Ecc_AggrEDCInterconnectErrorInfo::eccGroup

The EDC has a number of checker groups. Each group uses a set of parameters like checker type, bus width, parity width, bus name and number of bits. This parameter indicates a particular checker group where the error will be injected. Please refer to TRM for the different checkers implemented in an SOC

◆ eccBit1

uint32_t SDL_Ecc_AggrEDCInterconnectErrorInfo::eccBit1

Bit position of SEC starting from LSB or 1st bit position starting from LSB for DED.

◆ eccBit2

uint32_t SDL_Ecc_AggrEDCInterconnectErrorInfo::eccBit2

2nd bit position starting from LSB for DED to inject error.

◆ bNextBit

bool SDL_Ecc_AggrEDCInterconnectErrorInfo::bNextBit

Increment bit location for next injection.

◆ eccPattern

uint32_t SDL_Ecc_AggrEDCInterconnectErrorInfo::eccPattern

ECC pattern for error injection.