Detailed Description

Enet UDMA TX channel parameters.

The structure is stripped down version of Udma_ChTxPrms

Data Fields
uint8_t	filterEinfo

uint8_t	filterPsWords

uint8_t	addrType

uint8_t	chanType

uint8_t	busPriority

uint8_t	busQos

uint8_t	busOrderId

uint8_t	dmaPriority

uint8_t	txCredit

uint16_t	fifoDepth

Field Documentation

◆ filterEinfo

uint8_t EnetUdma_UdmaChTxPrms::filterEinfo

[IN] Bool: When set (TRUE), filter out extended info

◆ filterPsWords

uint8_t EnetUdma_UdmaChTxPrms::filterPsWords

[IN] Bool: When set (TRUE), filter out protocl specific words

◆ addrType

uint8_t EnetUdma_UdmaChTxPrms::addrType

[IN] Address type for this channel. Refer tisci_msg_rm_udmap_tx_ch_cfg_req::tx_atype

◆ chanType

uint8_t EnetUdma_UdmaChTxPrms::chanType

[IN] Channel type. Refer tisci_msg_rm_udmap_tx_ch_cfg_req::tx_chan_type

◆ busPriority

uint8_t EnetUdma_UdmaChTxPrms::busPriority

[IN] 3-bit priority value (0=highest, 7=lowest)

◆ busQos

uint8_t EnetUdma_UdmaChTxPrms::busQos

[IN] 3-bit qos value (0=highest, 7=lowest)

◆ busOrderId

uint8_t EnetUdma_UdmaChTxPrms::busOrderId

[IN] 4-bit orderid value

◆ dmaPriority

uint8_t EnetUdma_UdmaChTxPrms::dmaPriority

[IN] This field selects which scheduling bin the channel will be placed in for bandwidth allocation of the TX DMA units. Refer tisci_msg_rm_udmap_tx_ch_cfg_req::tx_sched_priority

◆ txCredit

uint8_t EnetUdma_UdmaChTxPrms::txCredit

[IN] TX credit for external channels

◆ fifoDepth

uint16_t EnetUdma_UdmaChTxPrms::fifoDepth

[IN] The fifo depth is used to specify how many FIFO data phases deep the TX per channel FIFO will be for the channel. While the maximum depth of the TX FIFO is set at design time, the FIFO depth can be artificially reduced in order to control the maximum latency which can be introduced due to buffering effects