AM62x MCU+ SDK  09.02.00
MCSPI Performance 32 Bit

Introduction

This Master application demonstrates the data transfer in master mode with performance measurment.

  • McSPI is configured in Tx Only mode with FIFO enabled for Tx.
  • Word Length tested is 32 bits.
  • SPI CLK Frequency used is 12 MHZ.
  • Number of Words is 5.
  • Data is transmitted on D0 pin.
  • Data transmission is in polled mode.

To modify the example to use main domain SPI, refer Accessing main and wakeup domain peripherals from MCU domain

Supported Combinations

Parameter Value
CPU + OS m4fss0-0 freertos
m4fss0-0 nortos
r5fss0-0 freertos
Toolchain ti-arm-clang
Board am62x-sk, am62x-sk-lp, am62x-sip-sk
Example folder examples/drivers/mcspi/mcspi_performance_32bit

Steps to Run the Example

Attention
As the wake-up R5 is the device manager, it needs to be started by the SBL. So it can not be loaded through CCS. It should be flashed and booted through SBL.

See Also

MCSPI

Sample Output

Shown below is a sample output when the application is run,

m4fss0-0_freertos app log:

[BLAZAR_Cortex_M4F_0] [MCSPI] Performance Example Started...
----------------------------------------------------------
McSPI Clock 12000000 Hz
----------------------------------------------------------
Data Width Data Length Transfer Time (micro sec)
32 5 17.80
----------------------------------------------------------
All tests have passed!!

m4fss0-0_nortos app log:

[BLAZAR_Cortex_M4F_0] [MCSPI] Performance Example Started...
----------------------------------------------------------
McSPI Clock 12000000 Hz
----------------------------------------------------------
Data Width Data Length Transfer Time (micro sec)
32 5 17.80
----------------------------------------------------------
All tests have passed!!