DMSC controls the power management, security and resource management of the device.
#define TISCI_RESASG_TYPE_SHIFT (0x0006U) |
This file contains:
WARNING!!: Autogenerated file from SYSFW. DO NOT MODIFY!!
Resource Management
Resource Assignment Subtype definitions
Data version: 230918_161319 Resource assignment type shift
#define TISCI_RESASG_TYPE_MASK (0xFFC0U) |
Resource assignment type mask
#define TISCI_RESASG_SUBTYPE_SHIFT (0x0000U) |
Resource assignment subtype shift
#define TISCI_RESASG_SUBTYPE_MASK (0x003FU) |
Resource assignment subtype mask
Macro to create unique resource assignment types using type and subtype
#define TISCI_RESASG_SUBTYPE_IA_VINT (0x000AU) |
IA subtypes definitions
#define TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_GEVT (0x000BU) |
#define TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_MEVT (0x000CU) |
#define TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT (0x000DU) |
#define TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_LEVT (0x000EU) |
#define TISCI_RESASG_SUBTYPE_IA_TIMERMGR_EVT_OES (0x000FU) |
#define TISCI_RESASG_SUBTYPE_IA_PKTDMA_TX_CHAN_ERROR_OES (0x0010U) |
#define TISCI_RESASG_SUBTYPE_IA_PKTDMA_TX_FLOW_COMPLETION_OES (0x0011U) |
#define TISCI_RESASG_SUBTYPE_IA_PKTDMA_RX_CHAN_ERROR_OES (0x0012U) |
#define TISCI_RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_COMPLETION_OES (0x0013U) |
#define TISCI_RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_STARVATION_OES (0x0014U) |
#define TISCI_RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_FIREWALL_OES (0x0015U) |
#define TISCI_RESASG_SUBTYPE_IA_BCDMA_CHAN_ERROR_OES (0x0016U) |
#define TISCI_RESASG_SUBTYPE_IA_BCDMA_CHAN_DATA_COMPLETION_OES (0x0017U) |
#define TISCI_RESASG_SUBTYPE_IA_BCDMA_CHAN_RING_COMPLETION_OES (0x0018U) |
#define TISCI_RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_ERROR_OES (0x0019U) |
#define TISCI_RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_DATA_COMPLETION_OES (0x001AU) |
#define TISCI_RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_RING_COMPLETION_OES (0x001BU) |
#define TISCI_RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_ERROR_OES (0x001CU) |
#define TISCI_RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_DATA_COMPLETION_OES (0x001DU) |
#define TISCI_RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_RING_COMPLETION_OES (0x001EU) |
#define TISCI_RESASG_SUBTYPES_IA_CNT (0x0015U) |
#define TISCI_RESASG_SUBTYPE_IR_OUTPUT (0x0000U) |
IR subtypes definitions
#define TISCI_RESASG_SUBTYPES_IR_CNT (0x0001U) |
#define TISCI_RESASG_SUBTYPE_RA_ERROR_OES (0x0000U) |
RA subtypes definitions
#define TISCI_RESASG_SUBTYPE_RA_VIRTID (0x000AU) |
#define TISCI_RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN (0x000DU) |
#define TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN (0x000EU) |
#define TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_TX_CHAN (0x000FU) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_TX_CHAN (0x0010U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_RING_CPSW_TX_CHAN (0x0011U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_TX_0_CHAN (0x0012U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_TX_1_CHAN (0x0013U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_RX_CHAN (0x0016U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_RING_CPSW_RX_CHAN (0x0017U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_0_CHAN (0x0018U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_1_CHAN (0x0019U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_2_CHAN (0x001AU) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_3_CHAN (0x001BU) |
#define TISCI_RESASG_SUBTYPES_RA_CNT (0x000FU) |
#define TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER (0x0002U) |
UDMAP subtypes definitions
#define TISCI_RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG (0x0003U) |
#define TISCI_RESASG_SUBTYPE_BCDMA_BLOCK_COPY_CHAN (0x0020U) |
#define TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_RX_CHAN (0x0021U) |
#define TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_TX_CHAN (0x0022U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_TX_CHAN (0x0023U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_CPSW_TX_CHAN (0x0024U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_TX_0_CHAN (0x0025U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_TX_1_CHAN (0x0026U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_RX_CHAN (0x0029U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_UNMAPPED_RX_CHAN (0x002AU) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_CPSW_RX_CHAN (0x002BU) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_CPSW_RX_CHAN (0x002CU) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_RX_0_CHAN (0x002DU) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_0_CHAN (0x002EU) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_RX_1_CHAN (0x002FU) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_1_CHAN (0x0030U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_RX_2_CHAN (0x0031U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_2_CHAN (0x0032U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_RX_3_CHAN (0x0033U) |
#define TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_3_CHAN (0x0034U) |
#define TISCI_RESASG_SUBTYPES_UDMAP_CNT (0x0015U) |
#define TISCI_RESASG_UTYPE_CNT 61U |
Total number of unique resource types for SoC
#define TISCI_RESASG_ENTRIES_MAX (TISCI_RESASG_UTYPE_CNT * 5U) |
Total number of resource entries allowed for SoC