DDR config structure.
Below arrays and values are generated using the separate DDR config tool
ddrssCtlReg
, ddrssPhyIndepReg
, ddrssPhyReg
ddrssCtlRegNum
, ddrssPhyIndepRegNum
, ddrssPhyIndepRegNum
ddrssCtlRegCount
, ddrssPhyIndepRegCount
, ddrssPhyRegCount
Data Fields | |
uint64_t | clk1Freq |
uint64_t | clk2Freq |
uint32_t * | ddrssCtlReg |
uint32_t * | ddrssPhyIndepReg |
uint32_t * | ddrssPhyReg |
uint16_t * | ddrssCtlRegNum |
uint16_t * | ddrssPhyIndepRegNum |
uint16_t * | ddrssPhyRegNum |
uint16_t | ddrssCtlRegCount |
uint16_t | ddrssPhyIndepRegCount |
uint16_t | ddrssPhyRegCount |
uint8_t | fshcount |
uint8_t | sdramIdx |
uint8_t | enableEccFlag |
DDR_EccRegion * | eccRegion |
uint64_t DDR_Params::clk1Freq |
DDR Frequency of operation, in Hz
uint64_t DDR_Params::clk2Freq |
DDR Frequency of operation, in Hz
uint32_t* DDR_Params::ddrssCtlReg |
Array of register value to set
uint32_t* DDR_Params::ddrssPhyIndepReg |
Array of register value to set
uint32_t* DDR_Params::ddrssPhyReg |
Array of register value to set
uint16_t* DDR_Params::ddrssCtlRegNum |
Array of register numbers into which the values ddrssCtlReg
will be set
uint16_t* DDR_Params::ddrssPhyIndepRegNum |
Array of register numbers into which the values ddrssPhyIndepReg
will be set
uint16_t* DDR_Params::ddrssPhyRegNum |
Array of register numbers into which the values ddrssPhyReg
will be set
uint16_t DDR_Params::ddrssCtlRegCount |
Number of elements in array ddrssCtlReg
uint16_t DDR_Params::ddrssPhyIndepRegCount |
Number of elements in array ddrssCtlReg
uint16_t DDR_Params::ddrssPhyRegCount |
Number of elements in array ddrssCtlReg
uint8_t DDR_Params::fshcount |
Frequency Handshake count
uint8_t DDR_Params::sdramIdx |
log2(connected SDRAM size) - 16
uint8_t DDR_Params::enableEccFlag |
Flag to enable Inline ECC
DDR_EccRegion* DDR_Params::eccRegion |
Inline ECC region address