sciclient_irq_rm.h File Reference

Introduction

Private AM62Px specific RM interrupt data.

Go to the source code of this file.

Macros
#define	SCICLIENT_RM_IA_NUM_INST   2
#define	SCICLIENT_RM_IR_NUM_INST   3
#define	SCICLIENT_IRQ_MAX_ROUTE_DEPTH   3

Enumerations
enum	RmIrqTree {   RM_IRQ_TREE_MAIN_GPIOMUX_INTROUTER0, RM_IRQ_TREE_WKUP_MCU_GPIOMUX_INTROUTER0, RM_IRQ_TREE_TIMESYNC_EVENT_INTROUTER0, RM_IRQ_TREE_CPSW0,   RM_IRQ_TREE_DMASS0_INTAGGR_0, RM_IRQ_TREE_MCU_TIMER0, RM_IRQ_TREE_TIMER0, RM_IRQ_TREE_TIMER1,   RM_IRQ_TREE_TIMER2, RM_IRQ_TREE_TIMER3, RM_IRQ_TREE_TIMER4, RM_IRQ_TREE_TIMER5,   RM_IRQ_TREE_TIMER6, RM_IRQ_TREE_TIMER7, RM_IRQ_TREE_MCU_TIMER1, RM_IRQ_TREE_MCU_TIMER2,   RM_IRQ_TREE_MCU_TIMER3, RM_IRQ_TREE_WKUP_GTC0, RM_IRQ_TREE_GPIO0, RM_IRQ_TREE_GPIO1,   RM_IRQ_TREE_MCU_GPIO0, RM_IRQ_TREE_GPMC0, RM_IRQ_TREE_EPWM0, RM_IRQ_TREE_WKUP_TIMER0,   RM_IRQ_TREE_WKUP_TIMER1, RM_IRQ_TREE_MCRC64_0, RM_IRQ_TREE_DEBUGSS0, RM_IRQ_TREE_DSS0,   RM_IRQ_TREE_DMASS1_INTAGGR_0, RM_IRQ_TREE_DSS1, RM_IRQ_TREE_MAX }

Macro Definition Documentation

SCICLIENT_RM_IA_NUM_INST

#define SCICLIENT_RM_IA_NUM_INST   2

SCICLIENT_RM_IR_NUM_INST

#define SCICLIENT_RM_IR_NUM_INST   3

SCICLIENT_IRQ_MAX_ROUTE_DEPTH

#define SCICLIENT_IRQ_MAX_ROUTE_DEPTH   3

Enumeration Type Documentation

RmIrqTree

enum RmIrqTree

Enumerator
RM_IRQ_TREE_MAIN_GPIOMUX_INTROUTER0
RM_IRQ_TREE_WKUP_MCU_GPIOMUX_INTROUTER0
RM_IRQ_TREE_TIMESYNC_EVENT_INTROUTER0
RM_IRQ_TREE_CPSW0
RM_IRQ_TREE_DMASS0_INTAGGR_0
RM_IRQ_TREE_MCU_TIMER0
RM_IRQ_TREE_TIMER0
RM_IRQ_TREE_TIMER1
RM_IRQ_TREE_TIMER2
RM_IRQ_TREE_TIMER3
RM_IRQ_TREE_TIMER4
RM_IRQ_TREE_TIMER5
RM_IRQ_TREE_TIMER6
RM_IRQ_TREE_TIMER7
RM_IRQ_TREE_MCU_TIMER1
RM_IRQ_TREE_MCU_TIMER2
RM_IRQ_TREE_MCU_TIMER3
RM_IRQ_TREE_WKUP_GTC0
RM_IRQ_TREE_GPIO0
RM_IRQ_TREE_GPIO1
RM_IRQ_TREE_MCU_GPIO0
RM_IRQ_TREE_GPMC0
RM_IRQ_TREE_EPWM0
RM_IRQ_TREE_WKUP_TIMER0
RM_IRQ_TREE_WKUP_TIMER1
RM_IRQ_TREE_MCRC64_0
RM_IRQ_TREE_DEBUGSS0
RM_IRQ_TREE_DSS0
RM_IRQ_TREE_DMASS1_INTAGGR_0
RM_IRQ_TREE_DSS1
RM_IRQ_TREE_MAX