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AM62L FreeRTOS SDK
11.00.00
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Go to the documentation of this file.
43 #include <drivers/hw_include/cslr.h>
56 volatile uint8_t Resv_4[4];
59 volatile uint8_t Resv_32[20];
65 volatile uint8_t Resv_64[12];
69 volatile uint8_t Resv_88[12];
72 volatile uint8_t Resv_112[16];
74 volatile uint8_t Resv_124[8];
76 volatile uint8_t Resv_144[16];
92 #define CSL_DSS_COMMON_DSS_REVISION (0x00000004U)
93 #define CSL_DSS_COMMON_DSS_SYSCONFIG (0x00000008U)
94 #define CSL_DSS_COMMON_DSS_SYSSTATUS (0x00000020U)
95 #define CSL_DSS_COMMON_DISPC_IRQ_EOI (0x00000024U)
96 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW (0x00000028U)
97 #define CSL_DSS_COMMON_DISPC_IRQSTATUS (0x0000002CU)
98 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET (0x00000030U)
99 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR (0x00000040U)
100 #define CSL_DSS_COMMON_RESERVED_0 (0x00000044U)
101 #define CSL_DSS_COMMON_VID_IRQENABLE_1 (0x00000048U)
102 #define CSL_DSS_COMMON_RESERVERD_1 (0x00000058U)
103 #define CSL_DSS_COMMON_VID_IRQSTATUS_1 (0x0000005CU)
104 #define CSL_DSS_COMMON_VP_IRQENABLE_0 (0x00000070U)
105 #define CSL_DSS_COMMON_VP_IRQSTATUS_0 (0x0000007CU)
106 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE (0x00000090U)
107 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE (0x00000094U)
108 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER (0x00000098U)
109 #define CSL_DSS_COMMON_DSS_CBA_CFG (0x0000009CU)
110 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL (0x000000A0U)
111 #define CSL_DSS_COMMON_DISPC_DBG_STATUS (0x000000A4U)
112 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE (0x000000A8U)
113 #define CSL_DSS_COMMON_DISPC_SECURE_DISABLE (0x000000ACU)
122 #define CSL_DSS_COMMON_DSS_REVISION_REVMIN_MASK (0x0000003FU)
123 #define CSL_DSS_COMMON_DSS_REVISION_REVMIN_SHIFT (0x00000000U)
124 #define CSL_DSS_COMMON_DSS_REVISION_REVMIN_MAX (0x0000003FU)
126 #define CSL_DSS_COMMON_DSS_REVISION_CUSTOM_MASK (0x000000C0U)
127 #define CSL_DSS_COMMON_DSS_REVISION_CUSTOM_SHIFT (0x00000006U)
128 #define CSL_DSS_COMMON_DSS_REVISION_CUSTOM_MAX (0x00000003U)
130 #define CSL_DSS_COMMON_DSS_REVISION_REVMAJOR_MASK (0x00000700U)
131 #define CSL_DSS_COMMON_DSS_REVISION_REVMAJOR_SHIFT (0x00000008U)
132 #define CSL_DSS_COMMON_DSS_REVISION_REVMAJOR_MAX (0x00000007U)
134 #define CSL_DSS_COMMON_DSS_REVISION_REVRTL_MASK (0x0000F800U)
135 #define CSL_DSS_COMMON_DSS_REVISION_REVRTL_SHIFT (0x0000000BU)
136 #define CSL_DSS_COMMON_DSS_REVISION_REVRTL_MAX (0x0000001FU)
138 #define CSL_DSS_COMMON_DSS_REVISION_MODID_MASK (0xFFFF0000U)
139 #define CSL_DSS_COMMON_DSS_REVISION_MODID_SHIFT (0x00000010U)
140 #define CSL_DSS_COMMON_DSS_REVISION_MODID_MAX (0x0000FFFFU)
145 #define CSL_DSS_COMMON_DSS_SYSCONFIG_AUTOCLKGATING_MASK (0x00000001U)
146 #define CSL_DSS_COMMON_DSS_SYSCONFIG_AUTOCLKGATING_SHIFT (0x00000000U)
147 #define CSL_DSS_COMMON_DSS_SYSCONFIG_AUTOCLKGATING_MAX (0x00000001U)
149 #define CSL_DSS_COMMON_DSS_SYSCONFIG_AUTOCLKGATING_VAL_CLKFREE (0x0U)
150 #define CSL_DSS_COMMON_DSS_SYSCONFIG_AUTOCLKGATING_VAL_CLKGATED (0x1U)
152 #define CSL_DSS_COMMON_DSS_SYSCONFIG_SOFTRESET_MASK (0x00000002U)
153 #define CSL_DSS_COMMON_DSS_SYSCONFIG_SOFTRESET_SHIFT (0x00000001U)
154 #define CSL_DSS_COMMON_DSS_SYSCONFIG_SOFTRESET_MAX (0x00000001U)
156 #define CSL_DSS_COMMON_DSS_SYSCONFIG_RESERVED1_MASK (0x00000004U)
157 #define CSL_DSS_COMMON_DSS_SYSCONFIG_RESERVED1_SHIFT (0x00000002U)
158 #define CSL_DSS_COMMON_DSS_SYSCONFIG_RESERVED1_MAX (0x00000001U)
160 #define CSL_DSS_COMMON_DSS_SYSCONFIG_IDLEMODE_MASK (0x00000018U)
161 #define CSL_DSS_COMMON_DSS_SYSCONFIG_IDLEMODE_SHIFT (0x00000003U)
162 #define CSL_DSS_COMMON_DSS_SYSCONFIG_IDLEMODE_MAX (0x00000003U)
164 #define CSL_DSS_COMMON_DSS_SYSCONFIG_WARMRESET_MASK (0x00000020U)
165 #define CSL_DSS_COMMON_DSS_SYSCONFIG_WARMRESET_SHIFT (0x00000005U)
166 #define CSL_DSS_COMMON_DSS_SYSCONFIG_WARMRESET_MAX (0x00000001U)
168 #define CSL_DSS_COMMON_DSS_SYSCONFIG_RESERVED2_MASK (0x000000C0U)
169 #define CSL_DSS_COMMON_DSS_SYSCONFIG_RESERVED2_SHIFT (0x00000006U)
170 #define CSL_DSS_COMMON_DSS_SYSCONFIG_RESERVED2_MAX (0x00000003U)
172 #define CSL_DSS_COMMON_DSS_SYSCONFIG_RESERVED3_MASK (0x00003F00U)
173 #define CSL_DSS_COMMON_DSS_SYSCONFIG_RESERVED3_SHIFT (0x00000008U)
174 #define CSL_DSS_COMMON_DSS_SYSCONFIG_RESERVED3_MAX (0x0000003FU)
176 #define CSL_DSS_COMMON_DSS_SYSCONFIG_RESERVED4_MASK (0xFFFFC000U)
177 #define CSL_DSS_COMMON_DSS_SYSCONFIG_RESERVED4_SHIFT (0x0000000EU)
178 #define CSL_DSS_COMMON_DSS_SYSCONFIG_RESERVED4_MAX (0x0003FFFFU)
183 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_MASK (0x00000001U)
184 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_SHIFT (0x00000000U)
185 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_MAX (0x00000001U)
187 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_VAL_RSTONGOING (0x0U)
188 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_VAL_RSTCOMP (0x1U)
190 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_VP_RESETDONE_MASK (0x00000006U)
191 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_VP_RESETDONE_SHIFT (0x00000001U)
192 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_VP_RESETDONE_MAX (0x00000003U)
194 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_VP_RESETDONE_VAL_RSTONGOING (0x0U)
195 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_VP_RESETDONE_VAL_RSTCOMP (0x1U)
197 #define CSL_DSS_COMMON_DSS_SYSSTATUS_RESERVED1_MASK (0x00000010U)
198 #define CSL_DSS_COMMON_DSS_SYSSTATUS_RESERVED1_SHIFT (0x00000004U)
199 #define CSL_DSS_COMMON_DSS_SYSSTATUS_RESERVED1_MAX (0x00000001U)
201 #define CSL_DSS_COMMON_DSS_SYSSTATUS_OLDI_RESETDONE_MASK (0x00000020U)
202 #define CSL_DSS_COMMON_DSS_SYSSTATUS_OLDI_RESETDONE_SHIFT (0x00000005U)
203 #define CSL_DSS_COMMON_DSS_SYSSTATUS_OLDI_RESETDONE_MAX (0x00000001U)
205 #define CSL_DSS_COMMON_DSS_SYSSTATUS_OLDI_RESETDONE_VAL_RSTONGOING (0x0U)
206 #define CSL_DSS_COMMON_DSS_SYSSTATUS_OLDI_RESETDONE_VAL_RSTCOMP (0x1U)
208 #define CSL_DSS_COMMON_DSS_SYSSTATUS_RESERVED2_MASK (0x00000100U)
209 #define CSL_DSS_COMMON_DSS_SYSSTATUS_RESERVED2_SHIFT (0x00000008U)
210 #define CSL_DSS_COMMON_DSS_SYSSTATUS_RESERVED2_MAX (0x00000001U)
212 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_IDLE_STATUS_MASK (0x00000200U)
213 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_IDLE_STATUS_SHIFT (0x00000009U)
214 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_IDLE_STATUS_MAX (0x00000001U)
216 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_IDLE_STATUS_VAL_NOTIDLE (0x0U)
217 #define CSL_DSS_COMMON_DSS_SYSSTATUS_DISPC_IDLE_STATUS_VAL_IDLE (0x1U)
219 #define CSL_DSS_COMMON_DSS_SYSSTATUS_RESERVED_MASK (0xFFFFFC00U)
220 #define CSL_DSS_COMMON_DSS_SYSSTATUS_RESERVED_SHIFT (0x0000000AU)
221 #define CSL_DSS_COMMON_DSS_SYSSTATUS_RESERVED_MAX (0x003FFFFFU)
226 #define CSL_DSS_COMMON_DISPC_IRQ_EOI_EOI_MASK (0x00000001U)
227 #define CSL_DSS_COMMON_DISPC_IRQ_EOI_EOI_SHIFT (0x00000000U)
228 #define CSL_DSS_COMMON_DISPC_IRQ_EOI_EOI_MAX (0x00000001U)
230 #define CSL_DSS_COMMON_DISPC_IRQ_EOI_EOI_VAL_NOACTION (0x0U)
231 #define CSL_DSS_COMMON_DISPC_IRQ_EOI_EOI_VAL_EOI (0x1U)
233 #define CSL_DSS_COMMON_DISPC_IRQ_EOI_RESERVED_MASK (0xFFFFFFFEU)
234 #define CSL_DSS_COMMON_DISPC_IRQ_EOI_RESERVED_SHIFT (0x00000001U)
235 #define CSL_DSS_COMMON_DISPC_IRQ_EOI_RESERVED_MAX (0x7FFFFFFFU)
240 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK (0x00000003U)
241 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT (0x00000000U)
242 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX (0x00000003U)
244 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION (0x0U)
245 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT (0x1U)
247 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK (0x00000030U)
248 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT (0x00000004U)
249 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX (0x00000003U)
251 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION (0x0U)
252 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT (0x1U)
254 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW_RESERVED_MASK (0xFFFF8000U)
255 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT (0x0000000FU)
256 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RAW_RESERVED_MAX (0x0001FFFFU)
261 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_VP_IRQ_MASK (0x00000003U)
262 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_VP_IRQ_SHIFT (0x00000000U)
263 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_VP_IRQ_MAX (0x00000003U)
265 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION (0x0U)
266 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR (0x1U)
268 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_VID_IRQ_MASK (0x00000030U)
269 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_VID_IRQ_SHIFT (0x00000004U)
270 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_VID_IRQ_MAX (0x00000003U)
272 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION (0x0U)
273 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR (0x1U)
275 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RESERVED_MASK (0xFFFF8000U)
276 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RESERVED_SHIFT (0x0000000FU)
277 #define CSL_DSS_COMMON_DISPC_IRQSTATUS_RESERVED_MAX (0x0001FFFFU)
282 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK (0x00000003U)
283 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT (0x00000000U)
284 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX (0x00000003U)
286 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION (0x0U)
287 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE (0x1U)
289 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK (0x00000030U)
290 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT (0x00000004U)
291 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX (0x00000003U)
293 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION (0x0U)
294 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE (0x1U)
296 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET_RESERVED_MASK (0xFFFF8000U)
297 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET_RESERVED_SHIFT (0x0000000FU)
298 #define CSL_DSS_COMMON_DISPC_IRQENABLE_SET_RESERVED_MAX (0x0001FFFFU)
303 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK (0x00000003U)
304 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT (0x00000000U)
305 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX (0x00000003U)
307 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION (0x0U)
308 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR (0x1U)
310 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK (0x00000030U)
311 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT (0x00000004U)
312 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX (0x00000003U)
314 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION (0x0U)
315 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR (0x1U)
317 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR_RESERVED_MASK (0xFFFF8000U)
318 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR_RESERVED_SHIFT (0x0000000FU)
319 #define CSL_DSS_COMMON_DISPC_IRQENABLE_CLR_RESERVED_MAX (0x0001FFFFU)
324 #define CSL_DSS_COMMON_RESERVED_0_RSVD_0_MASK (0x00000001U)
325 #define CSL_DSS_COMMON_RESERVED_0_RSVD_0_SHIFT (0x00000000U)
326 #define CSL_DSS_COMMON_RESERVED_0_RSVD_0_MAX (0x00000001U)
328 #define CSL_DSS_COMMON_RESERVED_0_RSVD_1_MASK (0x00000002U)
329 #define CSL_DSS_COMMON_RESERVED_0_RSVD_1_SHIFT (0x00000001U)
330 #define CSL_DSS_COMMON_RESERVED_0_RSVD_1_MAX (0x00000001U)
332 #define CSL_DSS_COMMON_RESERVED_0_RSVD_2_MASK (0x00000004U)
333 #define CSL_DSS_COMMON_RESERVED_0_RSVD_2_SHIFT (0x00000002U)
334 #define CSL_DSS_COMMON_RESERVED_0_RSVD_2_MAX (0x00000001U)
336 #define CSL_DSS_COMMON_RESERVED_0_RSVD_3_MASK (0xFFFFFFF8U)
337 #define CSL_DSS_COMMON_RESERVED_0_RSVD_3_SHIFT (0x00000003U)
338 #define CSL_DSS_COMMON_RESERVED_0_RSVD_3_MAX (0x1FFFFFFFU)
343 #define CSL_DSS_COMMON_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK (0x00000001U)
344 #define CSL_DSS_COMMON_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT (0x00000000U)
345 #define CSL_DSS_COMMON_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX (0x00000001U)
347 #define CSL_DSS_COMMON_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED (0x0U)
348 #define CSL_DSS_COMMON_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT (0x1U)
350 #define CSL_DSS_COMMON_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK (0x00000002U)
351 #define CSL_DSS_COMMON_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT (0x00000001U)
352 #define CSL_DSS_COMMON_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX (0x00000001U)
354 #define CSL_DSS_COMMON_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED (0x0U)
355 #define CSL_DSS_COMMON_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT (0x1U)
357 #define CSL_DSS_COMMON_VID_IRQENABLE_1_SAFETYREGION_EN_MASK (0x00000004U)
358 #define CSL_DSS_COMMON_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT (0x00000002U)
359 #define CSL_DSS_COMMON_VID_IRQENABLE_1_SAFETYREGION_EN_MAX (0x00000001U)
361 #define CSL_DSS_COMMON_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED (0x0U)
362 #define CSL_DSS_COMMON_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT (0x1U)
364 #define CSL_DSS_COMMON_VID_IRQENABLE_1_RESERVED_MASK (0xFFFFFFF8U)
365 #define CSL_DSS_COMMON_VID_IRQENABLE_1_RESERVED_SHIFT (0x00000003U)
366 #define CSL_DSS_COMMON_VID_IRQENABLE_1_RESERVED_MAX (0x1FFFFFFFU)
371 #define CSL_DSS_COMMON_RESERVERD_1_RSVD_0_MASK (0x00000001U)
372 #define CSL_DSS_COMMON_RESERVERD_1_RSVD_0_SHIFT (0x00000000U)
373 #define CSL_DSS_COMMON_RESERVERD_1_RSVD_0_MAX (0x00000001U)
375 #define CSL_DSS_COMMON_RESERVERD_1_RSVD_1_MASK (0x00000002U)
376 #define CSL_DSS_COMMON_RESERVERD_1_RSVD_1_SHIFT (0x00000001U)
377 #define CSL_DSS_COMMON_RESERVERD_1_RSVD_1_MAX (0x00000001U)
379 #define CSL_DSS_COMMON_RESERVERD_1_RSVD_2_MASK (0x00000004U)
380 #define CSL_DSS_COMMON_RESERVERD_1_RSVD_2_SHIFT (0x00000002U)
381 #define CSL_DSS_COMMON_RESERVERD_1_RSVD_2_MAX (0x00000001U)
383 #define CSL_DSS_COMMON_RESERVERD_1_RSVD_3_MASK (0xFFFFFFF8U)
384 #define CSL_DSS_COMMON_RESERVERD_1_RSVD_3_SHIFT (0x00000003U)
385 #define CSL_DSS_COMMON_RESERVERD_1_RSVD_3_MAX (0x1FFFFFFFU)
390 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK (0x00000001U)
391 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT (0x00000000U)
392 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX (0x00000001U)
394 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND (0x0U)
395 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND (0x1U)
397 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK (0x00000002U)
398 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT (0x00000001U)
399 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX (0x00000001U)
401 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND (0x0U)
402 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND (0x1U)
404 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK (0x00000004U)
405 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT (0x00000002U)
406 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX (0x00000001U)
408 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND (0x0U)
409 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND (0x1U)
411 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_RESERVED_MASK (0xFFFFFFF8U)
412 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_RESERVED_SHIFT (0x00000003U)
413 #define CSL_DSS_COMMON_VID_IRQSTATUS_1_RESERVED_MAX (0x1FFFFFFFU)
418 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK (0x00000001U)
419 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT (0x00000000U)
420 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX (0x00000001U)
422 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED (0x0U)
423 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT (0x1U)
425 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPVSYNC_EN_MASK (0x00000002U)
426 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT (0x00000001U)
427 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPVSYNC_EN_MAX (0x00000001U)
429 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED (0x0U)
430 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT (0x1U)
432 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK (0x00000004U)
433 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT (0x00000002U)
434 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX (0x00000001U)
436 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED (0x0U)
437 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT (0x1U)
439 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK (0x00000008U)
440 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT (0x00000003U)
441 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX (0x00000001U)
443 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED (0x0U)
444 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT (0x1U)
446 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK (0x00000010U)
447 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT (0x00000004U)
448 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX (0x00000001U)
450 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED (0x0U)
451 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT (0x1U)
453 #define CSL_DSS_COMMON_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK (0x00000020U)
454 #define CSL_DSS_COMMON_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT (0x00000005U)
455 #define CSL_DSS_COMMON_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX (0x00000001U)
457 #define CSL_DSS_COMMON_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED (0x0U)
458 #define CSL_DSS_COMMON_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT (0x1U)
460 #define CSL_DSS_COMMON_VP_IRQENABLE_0_SAFETYREGION_EN_MASK (0x000003C0U)
461 #define CSL_DSS_COMMON_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT (0x00000006U)
462 #define CSL_DSS_COMMON_VP_IRQENABLE_0_SAFETYREGION_EN_MAX (0x0000000FU)
464 #define CSL_DSS_COMMON_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED (0x0U)
465 #define CSL_DSS_COMMON_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT (0x1U)
467 #define CSL_DSS_COMMON_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK (0x00000400U)
468 #define CSL_DSS_COMMON_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT (0x0000000AU)
469 #define CSL_DSS_COMMON_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX (0x00000001U)
471 #define CSL_DSS_COMMON_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED (0x0U)
472 #define CSL_DSS_COMMON_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT (0x1U)
474 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPSYNC_EN_MASK (0x00000800U)
475 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPSYNC_EN_SHIFT (0x0000000BU)
476 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPSYNC_EN_MAX (0x00000001U)
478 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED (0x0U)
479 #define CSL_DSS_COMMON_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT (0x1U)
481 #define CSL_DSS_COMMON_VP_IRQENABLE_0_DUMMY_EN_MASK (0x00001000U)
482 #define CSL_DSS_COMMON_VP_IRQENABLE_0_DUMMY_EN_SHIFT (0x0000000CU)
483 #define CSL_DSS_COMMON_VP_IRQENABLE_0_DUMMY_EN_MAX (0x00000001U)
485 #define CSL_DSS_COMMON_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED (0x0U)
486 #define CSL_DSS_COMMON_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT (0x1U)
488 #define CSL_DSS_COMMON_VP_IRQENABLE_0_RESERVED_MASK (0xFFFFE000U)
489 #define CSL_DSS_COMMON_VP_IRQENABLE_0_RESERVED_SHIFT (0x0000000DU)
490 #define CSL_DSS_COMMON_VP_IRQENABLE_0_RESERVED_MAX (0x0007FFFFU)
495 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK (0x00000001U)
496 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT (0x00000000U)
497 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX (0x00000001U)
499 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND (0x0U)
500 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND (0x1U)
502 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK (0x00000002U)
503 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT (0x00000001U)
504 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX (0x00000001U)
506 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND (0x0U)
507 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND (0x1U)
509 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK (0x00000004U)
510 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT (0x00000002U)
511 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX (0x00000001U)
513 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND (0x0U)
514 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND (0x1U)
516 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK (0x00000008U)
517 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT (0x00000003U)
518 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX (0x00000001U)
520 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
521 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND (0x1U)
523 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK (0x00000010U)
524 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT (0x00000004U)
525 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX (0x00000001U)
527 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND (0x0U)
528 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND (0x1U)
530 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK (0x00000020U)
531 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT (0x00000005U)
532 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX (0x00000001U)
534 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND (0x0U)
535 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND (0x1U)
537 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK (0x000003C0U)
538 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT (0x00000006U)
539 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX (0x0000000FU)
541 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND (0x0U)
542 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND (0x1U)
544 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK (0x00000400U)
545 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT (0x0000000AU)
546 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX (0x00000001U)
548 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND (0x0U)
549 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND (0x1U)
551 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK (0x00000800U)
552 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT (0x0000000BU)
553 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX (0x00000001U)
555 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND (0x0U)
556 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND (0x1U)
558 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_DUMMY_IRQ_MASK (0x00001000U)
559 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT (0x0000000CU)
560 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_DUMMY_IRQ_MAX (0x00000001U)
562 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND (0x0U)
563 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND (0x1U)
565 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_RESERVED_MASK (0xFFFFE000U)
566 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_RESERVED_SHIFT (0x0000000DU)
567 #define CSL_DSS_COMMON_VP_IRQSTATUS_0_RESERVED_MAX (0x0007FFFFU)
572 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_MASK (0x00000003U)
573 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_SHIFT (0x00000000U)
574 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_MAX (0x00000003U)
576 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGDIS (0x0U)
577 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGFORCE (0x1U)
578 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGEN (0x2U)
580 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_MASK (0x0000003CU)
581 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_SHIFT (0x00000002U)
582 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_MAX (0x0000000FU)
584 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_MASK (0x00000040U)
585 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_SHIFT (0x00000006U)
586 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_MAX (0x00000001U)
588 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGNORMALSTARTMODE (0x0U)
589 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGFORCESTARTMODE (0x1U)
591 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_MASK (0x00000180U)
592 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_SHIFT (0x00000007U)
593 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_MAX (0x00000003U)
595 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_MASK (0xFFFFFE00U)
596 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_SHIFT (0x00000009U)
597 #define CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_MAX (0x007FFFFFU)
602 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_MASK (0x00000007U)
603 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_SHIFT (0x00000000U)
604 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_MAX (0x00000007U)
606 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_VAL_DISABLE (0x0U)
607 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_VAL_ENABLE (0x1U)
609 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED3_MASK (0x00000008U)
610 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED3_SHIFT (0x00000003U)
611 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED3_MAX (0x00000001U)
613 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_MASK (0x0000FFF0U)
614 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_SHIFT (0x00000004U)
615 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_MAX (0x00000FFFU)
617 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_MASK (0x00070000U)
618 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_SHIFT (0x00000010U)
619 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_MAX (0x00000007U)
621 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_VAL_HFUISR (0x0U)
622 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_VAL_UFPSR (0x1U)
624 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED4_MASK (0x00080000U)
625 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED4_SHIFT (0x00000013U)
626 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED4_MAX (0x00000001U)
628 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_MASK (0xFFF00000U)
629 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_SHIFT (0x00000014U)
630 #define CSL_DSS_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_MAX (0x00000FFFU)
635 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_VID_BUFFER_MASK (0x00000007U)
636 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_VID_BUFFER_SHIFT (0x00000000U)
637 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_VID_BUFFER_MAX (0x00000007U)
639 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_MASK (0x00000038U)
640 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_SHIFT (0x00000003U)
641 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_MAX (0x00000007U)
643 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_RESERVED1_MASK (0x000001C0U)
644 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_RESERVED1_SHIFT (0x00000006U)
645 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_RESERVED1_MAX (0x00000007U)
647 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_RESERVED2_MASK (0x00000E00U)
648 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_RESERVED2_SHIFT (0x00000009U)
649 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_RESERVED2_MAX (0x00000007U)
651 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_RESERVED3_MASK (0x00007000U)
652 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_RESERVED3_SHIFT (0x0000000CU)
653 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_RESERVED3_MAX (0x00000007U)
655 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_RESERVED_MASK (0x7FFF8000U)
656 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_RESERVED_SHIFT (0x0000000FU)
657 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_RESERVED_MAX (0x0000FFFFU)
659 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_BUFFERFILLING_MASK (0x80000000U)
660 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_BUFFERFILLING_SHIFT (0x0000001FU)
661 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_BUFFERFILLING_MAX (0x00000001U)
663 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_BUFFERFILLING_VAL_INDIVIDUALPIPE (0x0U)
664 #define CSL_DSS_COMMON_DISPC_GLOBAL_BUFFER_BUFFERFILLING_VAL_ALLPIPES (0x1U)
669 #define CSL_DSS_COMMON_DSS_CBA_CFG_PRI_LO_MASK (0x00000007U)
670 #define CSL_DSS_COMMON_DSS_CBA_CFG_PRI_LO_SHIFT (0x00000000U)
671 #define CSL_DSS_COMMON_DSS_CBA_CFG_PRI_LO_MAX (0x00000007U)
673 #define CSL_DSS_COMMON_DSS_CBA_CFG_PRI_HI_MASK (0x00000038U)
674 #define CSL_DSS_COMMON_DSS_CBA_CFG_PRI_HI_SHIFT (0x00000003U)
675 #define CSL_DSS_COMMON_DSS_CBA_CFG_PRI_HI_MAX (0x00000007U)
677 #define CSL_DSS_COMMON_DSS_CBA_CFG_RESERVED1_MASK (0x000001C0U)
678 #define CSL_DSS_COMMON_DSS_CBA_CFG_RESERVED1_SHIFT (0x00000006U)
679 #define CSL_DSS_COMMON_DSS_CBA_CFG_RESERVED1_MAX (0x00000007U)
681 #define CSL_DSS_COMMON_DSS_CBA_CFG_RESERVED_MASK (0xFFFFFE00U)
682 #define CSL_DSS_COMMON_DSS_CBA_CFG_RESERVED_SHIFT (0x00000009U)
683 #define CSL_DSS_COMMON_DSS_CBA_CFG_RESERVED_MAX (0x007FFFFFU)
688 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGEN_MASK (0x00000001U)
689 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGEN_SHIFT (0x00000000U)
690 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGEN_MAX (0x00000001U)
692 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGEN_VAL_DBGDIS (0x0U)
693 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGEN_VAL_DBGEN (0x1U)
695 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGMUXSEL_MASK (0x000001FEU)
696 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGMUXSEL_SHIFT (0x00000001U)
697 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGMUXSEL_MAX (0x000000FFU)
699 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VIDSEL (0x0U)
700 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VIDL1SEL (0x8U)
701 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR1SEL (0x11U)
702 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR2SEL (0x12U)
703 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP1SEL (0x13U)
704 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP2SEL (0x15U)
705 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_MISCSEL (0x17U)
707 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_RESERVED_MASK (0xFFFFFE00U)
708 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_RESERVED_SHIFT (0x00000009U)
709 #define CSL_DSS_COMMON_DISPC_DBG_CONTROL_RESERVED_MAX (0x007FFFFFU)
714 #define CSL_DSS_COMMON_DISPC_DBG_STATUS_DBGOUT_MASK (0xFFFFFFFFU)
715 #define CSL_DSS_COMMON_DISPC_DBG_STATUS_DBGOUT_SHIFT (0x00000000U)
716 #define CSL_DSS_COMMON_DISPC_DBG_STATUS_DBGOUT_MAX (0xFFFFFFFFU)
721 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_DMA_MASK (0x00000001U)
722 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_DMA_SHIFT (0x00000000U)
723 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_DMA_MAX (0x00000001U)
725 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_DMA_VAL_CLKGATINGEN (0x0U)
726 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_DMA_VAL_CLKGATINGDIS (0x1U)
728 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED1_MASK (0x00000006U)
729 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED1_SHIFT (0x00000001U)
730 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED1_MAX (0x00000003U)
732 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_VID_MASK (0x00000018U)
733 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_VID_SHIFT (0x00000003U)
734 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_VID_MAX (0x00000003U)
736 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_VID_VAL_CLKGATINGEN (0x0U)
737 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_VID_VAL_CLKGATINGDIS (0x1U)
739 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED2_MASK (0x00000F80U)
740 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED2_SHIFT (0x00000007U)
741 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED2_MAX (0x0000001FU)
743 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED3_MASK (0x00001000U)
744 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED3_SHIFT (0x0000000CU)
745 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED3_MAX (0x00000001U)
747 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_OVR_MASK (0x0000C000U)
748 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_OVR_SHIFT (0x0000000EU)
749 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_OVR_MAX (0x00000003U)
751 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_OVR_VAL_CLKGATINGEN (0x0U)
752 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_OVR_VAL_CLKGATINGDIS (0x1U)
754 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED4_MASK (0x00020000U)
755 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED4_SHIFT (0x00000011U)
756 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED4_MAX (0x00000001U)
758 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_VP1_MASK (0x000C0000U)
759 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_VP1_SHIFT (0x00000012U)
760 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_VP1_MAX (0x00000003U)
762 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_VP1_VAL_CLKGATINGEN (0x0U)
763 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_VP1_VAL_CLKGATINGDIS (0x1U)
765 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED5_MASK (0x00200000U)
766 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED5_SHIFT (0x00000015U)
767 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED5_MAX (0x00000001U)
769 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED_MASK (0xFFC00000U)
770 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED_SHIFT (0x00000016U)
771 #define CSL_DSS_COMMON_DISPC_CLKGATING_DISABLE_RESERVED_MAX (0x000003FFU)
776 #define CSL_DSS_COMMON_DISPC_SECURE_DISABLE_SECURE_DISABLE_MASK (0x00000001U)
777 #define CSL_DSS_COMMON_DISPC_SECURE_DISABLE_SECURE_DISABLE_SHIFT (0x00000000U)
778 #define CSL_DSS_COMMON_DISPC_SECURE_DISABLE_SECURE_DISABLE_MAX (0x00000001U)
780 #define CSL_DSS_COMMON_DISPC_SECURE_DISABLE_SECURE_DISABLE_VAL_SECUREEN (0x0U)
781 #define CSL_DSS_COMMON_DISPC_SECURE_DISABLE_SECURE_DISABLE_VAL_SECUREDIS (0x1U)
783 #define CSL_DSS_COMMON_DISPC_SECURE_DISABLE_RESERVED_MASK (0xFFFFFFFEU)
784 #define CSL_DSS_COMMON_DISPC_SECURE_DISABLE_RESERVED_SHIFT (0x00000001U)
785 #define CSL_DSS_COMMON_DISPC_SECURE_DISABLE_RESERVED_MAX (0x7FFFFFFFU)
798 volatile uint8_t Resv_36[36];
803 volatile uint8_t Resv_64[12];
807 volatile uint8_t Resv_84[8];
811 volatile uint8_t Resv_112[16];
813 volatile uint8_t Resv_124[8];
822 #define CSL_DSS_COMMON1_DISPC_IRQ_EOI (0x00000024U)
823 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW (0x00000028U)
824 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS (0x0000002CU)
825 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET (0x00000030U)
826 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR (0x00000040U)
827 #define CSL_DSS_COMMON1_RESERVED_0 (0x00000044U)
828 #define CSL_DSS_COMMON1_VID_IRQENABLE_1 (0x00000048U)
829 #define CSL_DSS_COMMON1_DISPC_SECURE (0x00000054U)
830 #define CSL_DSS_COMMON1_RESERVERD_1 (0x00000058U)
831 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1 (0x0000005CU)
832 #define CSL_DSS_COMMON1_VP_IRQENABLE_0 (0x00000070U)
833 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0 (0x0000007CU)
842 #define CSL_DSS_COMMON1_DISPC_IRQ_EOI_EOI_MASK (0x00000001U)
843 #define CSL_DSS_COMMON1_DISPC_IRQ_EOI_EOI_SHIFT (0x00000000U)
844 #define CSL_DSS_COMMON1_DISPC_IRQ_EOI_EOI_MAX (0x00000001U)
846 #define CSL_DSS_COMMON1_DISPC_IRQ_EOI_EOI_VAL_NOACTION (0x0U)
847 #define CSL_DSS_COMMON1_DISPC_IRQ_EOI_EOI_VAL_EOI (0x1U)
849 #define CSL_DSS_COMMON1_DISPC_IRQ_EOI_RESERVED_MASK (0xFFFFFFFEU)
850 #define CSL_DSS_COMMON1_DISPC_IRQ_EOI_RESERVED_SHIFT (0x00000001U)
851 #define CSL_DSS_COMMON1_DISPC_IRQ_EOI_RESERVED_MAX (0x7FFFFFFFU)
856 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK (0x00000003U)
857 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT (0x00000000U)
858 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX (0x00000003U)
860 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION (0x0U)
861 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT (0x1U)
863 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK (0x00000030U)
864 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT (0x00000004U)
865 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX (0x00000003U)
867 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION (0x0U)
868 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT (0x1U)
870 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW_RESERVED_MASK (0xFFFF8000U)
871 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT (0x0000000FU)
872 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RAW_RESERVED_MAX (0x0001FFFFU)
877 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_VP_IRQ_MASK (0x00000003U)
878 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_VP_IRQ_SHIFT (0x00000000U)
879 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_VP_IRQ_MAX (0x00000003U)
881 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION (0x0U)
882 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR (0x1U)
884 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_VID_IRQ_MASK (0x00000030U)
885 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_VID_IRQ_SHIFT (0x00000004U)
886 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_VID_IRQ_MAX (0x00000003U)
888 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION (0x0U)
889 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR (0x1U)
891 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RESERVED_MASK (0xFFFF8000U)
892 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RESERVED_SHIFT (0x0000000FU)
893 #define CSL_DSS_COMMON1_DISPC_IRQSTATUS_RESERVED_MAX (0x0001FFFFU)
898 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK (0x00000003U)
899 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT (0x00000000U)
900 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX (0x00000003U)
902 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION (0x0U)
903 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE (0x1U)
905 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK (0x00000030U)
906 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT (0x00000004U)
907 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX (0x00000003U)
909 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION (0x0U)
910 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE (0x1U)
912 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET_RESERVED_MASK (0xFFFF8000U)
913 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET_RESERVED_SHIFT (0x0000000FU)
914 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_SET_RESERVED_MAX (0x0001FFFFU)
919 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK (0x00000003U)
920 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT (0x00000000U)
921 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX (0x00000003U)
923 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION (0x0U)
924 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR (0x1U)
926 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK (0x00000030U)
927 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT (0x00000004U)
928 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX (0x00000003U)
930 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION (0x0U)
931 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR (0x1U)
933 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR_RESERVED_MASK (0xFFFF8000U)
934 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR_RESERVED_SHIFT (0x0000000FU)
935 #define CSL_DSS_COMMON1_DISPC_IRQENABLE_CLR_RESERVED_MAX (0x0001FFFFU)
940 #define CSL_DSS_COMMON1_RESERVED_0_RSVD_0_MASK (0x00000001U)
941 #define CSL_DSS_COMMON1_RESERVED_0_RSVD_0_SHIFT (0x00000000U)
942 #define CSL_DSS_COMMON1_RESERVED_0_RSVD_0_MAX (0x00000001U)
944 #define CSL_DSS_COMMON1_RESERVED_0_RSVD_1_MASK (0x00000002U)
945 #define CSL_DSS_COMMON1_RESERVED_0_RSVD_1_SHIFT (0x00000001U)
946 #define CSL_DSS_COMMON1_RESERVED_0_RSVD_1_MAX (0x00000001U)
948 #define CSL_DSS_COMMON1_RESERVED_0_RSVD_2_MASK (0x00000004U)
949 #define CSL_DSS_COMMON1_RESERVED_0_RSVD_2_SHIFT (0x00000002U)
950 #define CSL_DSS_COMMON1_RESERVED_0_RSVD_2_MAX (0x00000001U)
952 #define CSL_DSS_COMMON1_RESERVED_0_RSVD_3_MASK (0xFFFFFFF8U)
953 #define CSL_DSS_COMMON1_RESERVED_0_RSVD_3_SHIFT (0x00000003U)
954 #define CSL_DSS_COMMON1_RESERVED_0_RSVD_3_MAX (0x1FFFFFFFU)
959 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK (0x00000001U)
960 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT (0x00000000U)
961 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX (0x00000001U)
963 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED (0x0U)
964 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT (0x1U)
966 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK (0x00000002U)
967 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT (0x00000001U)
968 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX (0x00000001U)
970 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED (0x0U)
971 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT (0x1U)
973 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_SAFETYREGION_EN_MASK (0x00000004U)
974 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT (0x00000002U)
975 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_SAFETYREGION_EN_MAX (0x00000001U)
977 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED (0x0U)
978 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT (0x1U)
980 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_RESERVED_MASK (0xFFFFFFF8U)
981 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_RESERVED_SHIFT (0x00000003U)
982 #define CSL_DSS_COMMON1_VID_IRQENABLE_1_RESERVED_MAX (0x1FFFFFFFU)
987 #define CSL_DSS_COMMON1_DISPC_SECURE_VP_SECURE_MASK (0x00000003U)
988 #define CSL_DSS_COMMON1_DISPC_SECURE_VP_SECURE_SHIFT (0x00000000U)
989 #define CSL_DSS_COMMON1_DISPC_SECURE_VP_SECURE_MAX (0x00000003U)
991 #define CSL_DSS_COMMON1_DISPC_SECURE_VP_SECURE_VAL_SECUREDIS (0x0U)
992 #define CSL_DSS_COMMON1_DISPC_SECURE_VP_SECURE_VAL_SECUREEN (0x1U)
994 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED5_MASK (0x00000004U)
995 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED5_SHIFT (0x00000002U)
996 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED5_MAX (0x00000001U)
998 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED1_MASK (0x00000008U)
999 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED1_SHIFT (0x00000003U)
1000 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED1_MAX (0x00000001U)
1002 #define CSL_DSS_COMMON1_DISPC_SECURE_VID_SECURE_MASK (0x00000030U)
1003 #define CSL_DSS_COMMON1_DISPC_SECURE_VID_SECURE_SHIFT (0x00000004U)
1004 #define CSL_DSS_COMMON1_DISPC_SECURE_VID_SECURE_MAX (0x00000003U)
1006 #define CSL_DSS_COMMON1_DISPC_SECURE_VID_SECURE_VAL_SECUREDIS (0x0U)
1007 #define CSL_DSS_COMMON1_DISPC_SECURE_VID_SECURE_VAL_SECUREEN (0x1U)
1009 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED6_MASK (0x000000C0U)
1010 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED6_SHIFT (0x00000006U)
1011 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED6_MAX (0x00000003U)
1013 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED2_MASK (0x00001F00U)
1014 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED2_SHIFT (0x00000008U)
1015 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED2_MAX (0x0000001FU)
1017 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED3_MASK (0x00002000U)
1018 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED3_SHIFT (0x0000000DU)
1019 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED3_MAX (0x00000001U)
1021 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED7_MASK (0x00004000U)
1022 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED7_SHIFT (0x0000000EU)
1023 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED7_MAX (0x00000001U)
1025 #define CSL_DSS_COMMON1_DISPC_SECURE_OVR_SECURE_MASK (0x00018000U)
1026 #define CSL_DSS_COMMON1_DISPC_SECURE_OVR_SECURE_SHIFT (0x0000000FU)
1027 #define CSL_DSS_COMMON1_DISPC_SECURE_OVR_SECURE_MAX (0x00000003U)
1029 #define CSL_DSS_COMMON1_DISPC_SECURE_OVR_SECURE_VAL_SECUREDIS (0x0U)
1030 #define CSL_DSS_COMMON1_DISPC_SECURE_OVR_SECURE_VAL_SECUREEN (0x1U)
1032 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED8_MASK (0x00020000U)
1033 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED8_SHIFT (0x00000011U)
1034 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED8_MAX (0x00000001U)
1036 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED4_MASK (0x00040000U)
1037 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED4_SHIFT (0x00000012U)
1038 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED4_MAX (0x00000001U)
1040 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED_MASK (0xFFF80000U)
1041 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED_SHIFT (0x00000013U)
1042 #define CSL_DSS_COMMON1_DISPC_SECURE_RESERVED_MAX (0x00001FFFU)
1047 #define CSL_DSS_COMMON1_RESERVERD_1_RSVD_0_MASK (0x00000001U)
1048 #define CSL_DSS_COMMON1_RESERVERD_1_RSVD_0_SHIFT (0x00000000U)
1049 #define CSL_DSS_COMMON1_RESERVERD_1_RSVD_0_MAX (0x00000001U)
1051 #define CSL_DSS_COMMON1_RESERVERD_1_RSVD_1_MASK (0x00000002U)
1052 #define CSL_DSS_COMMON1_RESERVERD_1_RSVD_1_SHIFT (0x00000001U)
1053 #define CSL_DSS_COMMON1_RESERVERD_1_RSVD_1_MAX (0x00000001U)
1055 #define CSL_DSS_COMMON1_RESERVERD_1_RSVD_2_MASK (0x00000004U)
1056 #define CSL_DSS_COMMON1_RESERVERD_1_RSVD_2_SHIFT (0x00000002U)
1057 #define CSL_DSS_COMMON1_RESERVERD_1_RSVD_2_MAX (0x00000001U)
1059 #define CSL_DSS_COMMON1_RESERVERD_1_RSVD_3_MASK (0xFFFFFFF8U)
1060 #define CSL_DSS_COMMON1_RESERVERD_1_RSVD_3_SHIFT (0x00000003U)
1061 #define CSL_DSS_COMMON1_RESERVERD_1_RSVD_3_MAX (0x1FFFFFFFU)
1066 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK (0x00000001U)
1067 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT (0x00000000U)
1068 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX (0x00000001U)
1070 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND (0x0U)
1071 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND (0x1U)
1073 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK (0x00000002U)
1074 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT (0x00000001U)
1075 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX (0x00000001U)
1077 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND (0x0U)
1078 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND (0x1U)
1080 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK (0x00000004U)
1081 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT (0x00000002U)
1082 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX (0x00000001U)
1084 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND (0x0U)
1085 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND (0x1U)
1087 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_RESERVED_MASK (0xFFFFFFF8U)
1088 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_RESERVED_SHIFT (0x00000003U)
1089 #define CSL_DSS_COMMON1_VID_IRQSTATUS_1_RESERVED_MAX (0x1FFFFFFFU)
1094 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK (0x00000001U)
1095 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT (0x00000000U)
1096 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX (0x00000001U)
1098 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED (0x0U)
1099 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT (0x1U)
1101 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPVSYNC_EN_MASK (0x00000002U)
1102 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT (0x00000001U)
1103 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPVSYNC_EN_MAX (0x00000001U)
1105 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED (0x0U)
1106 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT (0x1U)
1108 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK (0x00000004U)
1109 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT (0x00000002U)
1110 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX (0x00000001U)
1112 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED (0x0U)
1113 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT (0x1U)
1115 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK (0x00000008U)
1116 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT (0x00000003U)
1117 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX (0x00000001U)
1119 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED (0x0U)
1120 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT (0x1U)
1122 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK (0x00000010U)
1123 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT (0x00000004U)
1124 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX (0x00000001U)
1126 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED (0x0U)
1127 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT (0x1U)
1129 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK (0x00000020U)
1130 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT (0x00000005U)
1131 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX (0x00000001U)
1133 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED (0x0U)
1134 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT (0x1U)
1136 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_SAFETYREGION_EN_MASK (0x000003C0U)
1137 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT (0x00000006U)
1138 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_SAFETYREGION_EN_MAX (0x0000000FU)
1140 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED (0x0U)
1141 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT (0x1U)
1143 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK (0x00000400U)
1144 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT (0x0000000AU)
1145 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX (0x00000001U)
1147 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED (0x0U)
1148 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT (0x1U)
1150 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPSYNC_EN_MASK (0x00000800U)
1151 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPSYNC_EN_SHIFT (0x0000000BU)
1152 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPSYNC_EN_MAX (0x00000001U)
1154 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED (0x0U)
1155 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT (0x1U)
1157 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_DUMMY_EN_MASK (0x00001000U)
1158 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_DUMMY_EN_SHIFT (0x0000000CU)
1159 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_DUMMY_EN_MAX (0x00000001U)
1161 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED (0x0U)
1162 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT (0x1U)
1164 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_RESERVED_MASK (0xFFFFE000U)
1165 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_RESERVED_SHIFT (0x0000000DU)
1166 #define CSL_DSS_COMMON1_VP_IRQENABLE_0_RESERVED_MAX (0x0007FFFFU)
1171 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK (0x00000001U)
1172 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT (0x00000000U)
1173 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX (0x00000001U)
1175 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND (0x0U)
1176 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND (0x1U)
1178 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK (0x00000002U)
1179 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT (0x00000001U)
1180 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX (0x00000001U)
1182 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND (0x0U)
1183 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND (0x1U)
1185 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK (0x00000004U)
1186 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT (0x00000002U)
1187 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX (0x00000001U)
1189 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND (0x0U)
1190 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND (0x1U)
1192 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK (0x00000008U)
1193 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT (0x00000003U)
1194 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX (0x00000001U)
1196 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
1197 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND (0x1U)
1199 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK (0x00000010U)
1200 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT (0x00000004U)
1201 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX (0x00000001U)
1203 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND (0x0U)
1204 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND (0x1U)
1206 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK (0x00000020U)
1207 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT (0x00000005U)
1208 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX (0x00000001U)
1210 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND (0x0U)
1211 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND (0x1U)
1213 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK (0x000003C0U)
1214 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT (0x00000006U)
1215 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX (0x0000000FU)
1217 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND (0x0U)
1218 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND (0x1U)
1220 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK (0x00000400U)
1221 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT (0x0000000AU)
1222 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX (0x00000001U)
1224 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND (0x0U)
1225 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND (0x1U)
1227 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK (0x00000800U)
1228 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT (0x0000000BU)
1229 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX (0x00000001U)
1231 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND (0x0U)
1232 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND (0x1U)
1234 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_DUMMY_IRQ_MASK (0x00001000U)
1235 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT (0x0000000CU)
1236 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_DUMMY_IRQ_MAX (0x00000001U)
1238 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND (0x0U)
1239 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND (0x1U)
1241 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_RESERVED_MASK (0xFFFFE000U)
1242 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_RESERVED_SHIFT (0x0000000DU)
1243 #define CSL_DSS_COMMON1_VP_IRQSTATUS_0_RESERVED_MAX (0x0007FFFFU)
1256 volatile uint8_t Resv_32[32];
1272 volatile uint8_t Resv_508[416];
1274 volatile uint8_t Resv_520[8];
1278 volatile uint8_t Resv_536[4];
1281 volatile uint8_t Resv_556[12];
1287 volatile uint8_t Resv_584[8];
1289 volatile uint8_t Resv_608[20];
1320 #define CSL_DSS_VIDL1_ATTRIBUTES (0x00000020U)
1321 #define CSL_DSS_VIDL1_ATTRIBUTES2 (0x00000024U)
1322 #define CSL_DSS_VIDL1_BA_0 (0x00000028U)
1323 #define CSL_DSS_VIDL1_BA_1 (0x0000002CU)
1324 #define CSL_DSS_VIDL1_BA_UV_0 (0x00000030U)
1325 #define CSL_DSS_VIDL1_BA_UV_1 (0x00000034U)
1326 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS (0x00000038U)
1327 #define CSL_DSS_VIDL1_BUF_THRESHOLD (0x0000003CU)
1328 #define CSL_DSS_VIDL1_CSC_COEF0 (0x00000040U)
1329 #define CSL_DSS_VIDL1_CSC_COEF1 (0x00000044U)
1330 #define CSL_DSS_VIDL1_CSC_COEF2 (0x00000048U)
1331 #define CSL_DSS_VIDL1_CSC_COEF3 (0x0000004CU)
1332 #define CSL_DSS_VIDL1_CSC_COEF4 (0x00000050U)
1333 #define CSL_DSS_VIDL1_CSC_COEF5 (0x00000054U)
1334 #define CSL_DSS_VIDL1_CSC_COEF6 (0x00000058U)
1335 #define CSL_DSS_VIDL1_GLOBAL_ALPHA (0x000001FCU)
1336 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD (0x00000208U)
1337 #define CSL_DSS_VIDL1_PICTURE_SIZE (0x0000020CU)
1338 #define CSL_DSS_VIDL1_PIXEL_INC (0x00000210U)
1339 #define CSL_DSS_VIDL1_PRELOAD (0x00000218U)
1340 #define CSL_DSS_VIDL1_ROW_INC (0x0000021CU)
1341 #define CSL_DSS_VIDL1_BA_EXT_0 (0x0000022CU)
1342 #define CSL_DSS_VIDL1_BA_EXT_1 (0x00000230U)
1343 #define CSL_DSS_VIDL1_BA_UV_EXT_0 (0x00000234U)
1344 #define CSL_DSS_VIDL1_BA_UV_EXT_1 (0x00000238U)
1345 #define CSL_DSS_VIDL1_CSC_COEF7 (0x0000023CU)
1346 #define CSL_DSS_VIDL1_ROW_INC_UV (0x00000248U)
1347 #define CSL_DSS_VIDL1_CLUT_0 (0x00000260U)
1348 #define CSL_DSS_VIDL1_CLUT_1 (0x00000264U)
1349 #define CSL_DSS_VIDL1_CLUT_2 (0x00000268U)
1350 #define CSL_DSS_VIDL1_CLUT_3 (0x0000026CU)
1351 #define CSL_DSS_VIDL1_CLUT_4 (0x00000270U)
1352 #define CSL_DSS_VIDL1_CLUT_5 (0x00000274U)
1353 #define CSL_DSS_VIDL1_CLUT_6 (0x00000278U)
1354 #define CSL_DSS_VIDL1_CLUT_7 (0x0000027CU)
1355 #define CSL_DSS_VIDL1_CLUT_8 (0x00000280U)
1356 #define CSL_DSS_VIDL1_CLUT_9 (0x00000284U)
1357 #define CSL_DSS_VIDL1_CLUT_10 (0x00000288U)
1358 #define CSL_DSS_VIDL1_CLUT_11 (0x0000028CU)
1359 #define CSL_DSS_VIDL1_CLUT_12 (0x00000290U)
1360 #define CSL_DSS_VIDL1_CLUT_13 (0x00000294U)
1361 #define CSL_DSS_VIDL1_CLUT_14 (0x00000298U)
1362 #define CSL_DSS_VIDL1_CLUT_15 (0x0000029CU)
1363 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES (0x000002A0U)
1364 #define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE (0x000002A4U)
1365 #define CSL_DSS_VIDL1_SAFETY_POSITION (0x000002A8U)
1366 #define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE (0x000002ACU)
1367 #define CSL_DSS_VIDL1_SAFETY_SIZE (0x000002B0U)
1368 #define CSL_DSS_VIDL1_SAFETY_LFSR_SEED (0x000002B4U)
1369 #define CSL_DSS_VIDL1_LUMAKEY (0x000002B8U)
1378 #define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_MASK (0x00000001U)
1379 #define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_SHIFT (0x00000000U)
1380 #define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_MAX (0x00000001U)
1382 #define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_VAL_VIDEOENB (0x1U)
1383 #define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_VAL_VIDEODIS (0x0U)
1385 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_MASK (0x0000007EU)
1386 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_SHIFT (0x00000001U)
1387 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_MAX (0x0000003FU)
1389 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB16_4444 (0x0U)
1390 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR16_4444 (0x1U)
1391 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA16_4444 (0x2U)
1392 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB16_565 (0x3U)
1393 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR16_565 (0x4U)
1394 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB16_1555 (0x5U)
1395 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR16_1555 (0x6U)
1396 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB32_8888 (0x7U)
1397 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR32_8888 (0x8U)
1398 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA32_8888 (0x9U)
1399 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGRA32_8888 (0xAU)
1400 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB24P_888 (0xBU)
1401 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR24P_888 (0xCU)
1402 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010 (0xEU)
1403 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010 (0xFU)
1404 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616 (0x10U)
1405 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616 (0x11U)
1406 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP1 (0x12U)
1407 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP2 (0x13U)
1408 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP4 (0x14U)
1409 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP8 (0x15U)
1410 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB565A8 (0x16U)
1411 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR565A8 (0x17U)
1412 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB16_4444 (0x20U)
1413 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR16_4444 (0x21U)
1414 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX16_4444 (0x22U)
1415 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB16_1555 (0x25U)
1416 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR16_1555 (0x26U)
1417 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB32_8888 (0x27U)
1418 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR32_8888 (0x28U)
1419 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX32_8888 (0x29U)
1420 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGRX32_8888 (0x2AU)
1421 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010 (0x2EU)
1422 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010 (0x2FU)
1423 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616 (0x30U)
1424 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616 (0x31U)
1425 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV420_NV12 (0x3DU)
1426 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2 (0x3EU)
1427 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY (0x3FU)
1429 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_MASK (0x00000180U)
1430 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_SHIFT (0x00000007U)
1431 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_MAX (0x00000003U)
1433 #define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_MASK (0x00000200U)
1434 #define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_SHIFT (0x00000009U)
1435 #define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_MAX (0x00000001U)
1437 #define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB (0x1U)
1438 #define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS (0x0U)
1440 #define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_MASK (0x00000400U)
1441 #define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_SHIFT (0x0000000AU)
1442 #define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_MAX (0x00000001U)
1444 #define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN (0x1U)
1445 #define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS (0x0U)
1447 #define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_MASK (0x00000800U)
1448 #define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_SHIFT (0x0000000BU)
1449 #define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_MAX (0x00000001U)
1451 #define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE (0x1U)
1452 #define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE (0x0U)
1454 #define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_MASK (0x00001000U)
1455 #define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_SHIFT (0x0000000CU)
1456 #define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_MAX (0x00000001U)
1458 #define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_VAL_FLIP (0x1U)
1459 #define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_VAL_NOFLIP (0x0U)
1461 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED1_MASK (0x00002000U)
1462 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED1_SHIFT (0x0000000DU)
1463 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED1_MAX (0x00000001U)
1465 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_MASK (0x0001C000U)
1466 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_SHIFT (0x0000000EU)
1467 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_MAX (0x00000007U)
1469 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_MASK (0x00020000U)
1470 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_SHIFT (0x00000011U)
1471 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_MAX (0x00000001U)
1473 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN (0x1U)
1474 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS (0x0U)
1476 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_MASK (0x00040000U)
1477 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_SHIFT (0x00000012U)
1478 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_MAX (0x00000001U)
1480 #define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_MASK (0x00080000U)
1481 #define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_SHIFT (0x00000013U)
1482 #define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_MAX (0x00000001U)
1484 #define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES (0x1U)
1485 #define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL (0x0U)
1487 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_MASK (0x00100000U)
1488 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_SHIFT (0x00000014U)
1489 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_MAX (0x00000001U)
1491 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_MASK (0x00200000U)
1492 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_SHIFT (0x00000015U)
1493 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_MAX (0x00000001U)
1495 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_MASK (0x00400000U)
1496 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_SHIFT (0x00000016U)
1497 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_MAX (0x00000001U)
1499 #define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_MASK (0x00800000U)
1500 #define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_SHIFT (0x00000017U)
1501 #define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_MAX (0x00000001U)
1503 #define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO (0x1U)
1504 #define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO (0x0U)
1506 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_MASK (0x01000000U)
1507 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_SHIFT (0x00000018U)
1508 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_MAX (0x00000001U)
1510 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB (0x1U)
1511 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS (0x0U)
1513 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_MASK (0x0E000000U)
1514 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_SHIFT (0x00000019U)
1515 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_MAX (0x00000007U)
1517 #define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_MASK (0x10000000U)
1518 #define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT (0x0000001CU)
1519 #define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_MAX (0x00000001U)
1521 #define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA (0x1U)
1522 #define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA (0x0U)
1524 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED4_MASK (0x20000000U)
1525 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED4_SHIFT (0x0000001DU)
1526 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED4_MAX (0x00000001U)
1528 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_MASK (0x40000000U)
1529 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_SHIFT (0x0000001EU)
1530 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_MAX (0x00000001U)
1532 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN (0x1U)
1533 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS (0x0U)
1535 #define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_MASK (0x80000000U)
1536 #define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_SHIFT (0x0000001FU)
1537 #define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_MAX (0x00000001U)
1539 #define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN (0x1U)
1540 #define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS (0x0U)
1545 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_MASK (0x00000001U)
1546 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_SHIFT (0x00000000U)
1547 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_MAX (0x00000001U)
1549 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB (0x1U)
1550 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS (0x0U)
1552 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_MASK (0x0000000EU)
1553 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_SHIFT (0x00000001U)
1554 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_MAX (0x00000007U)
1556 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_MASK (0x00000070U)
1557 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT (0x00000004U)
1558 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_MAX (0x00000007U)
1560 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_MASK (0x00000180U)
1561 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_SHIFT (0x00000007U)
1562 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_MAX (0x00000003U)
1564 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_8B (0x0U)
1565 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_10B (0x1U)
1566 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_12B (0x2U)
1568 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_MASK (0x00000200U)
1569 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_SHIFT (0x00000009U)
1570 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_MAX (0x00000001U)
1572 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_VAL_PACKED (0x0U)
1573 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED (0x1U)
1575 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_MASK (0x00000400U)
1576 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_SHIFT (0x0000000AU)
1577 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_MAX (0x00000001U)
1579 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_VAL_MSB (0x1U)
1580 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_VAL_LSB (0x0U)
1582 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED_MASK (0x03FFF800U)
1583 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED_SHIFT (0x0000000BU)
1584 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED_MAX (0x00007FFFU)
1586 #define CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_MASK (0x7C000000U)
1587 #define CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_SHIFT (0x0000001AU)
1588 #define CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_MAX (0x0000001FU)
1590 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_MASK (0x80000000U)
1591 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_SHIFT (0x0000001FU)
1592 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_MAX (0x00000001U)
1597 #define CSL_DSS_VIDL1_BA_0_BA_MASK (0xFFFFFFFFU)
1598 #define CSL_DSS_VIDL1_BA_0_BA_SHIFT (0x00000000U)
1599 #define CSL_DSS_VIDL1_BA_0_BA_MAX (0xFFFFFFFFU)
1604 #define CSL_DSS_VIDL1_BA_1_BA_MASK (0xFFFFFFFFU)
1605 #define CSL_DSS_VIDL1_BA_1_BA_SHIFT (0x00000000U)
1606 #define CSL_DSS_VIDL1_BA_1_BA_MAX (0xFFFFFFFFU)
1611 #define CSL_DSS_VIDL1_BA_UV_0_BA_MASK (0xFFFFFFFFU)
1612 #define CSL_DSS_VIDL1_BA_UV_0_BA_SHIFT (0x00000000U)
1613 #define CSL_DSS_VIDL1_BA_UV_0_BA_MAX (0xFFFFFFFFU)
1618 #define CSL_DSS_VIDL1_BA_UV_1_BA_MASK (0xFFFFFFFFU)
1619 #define CSL_DSS_VIDL1_BA_UV_1_BA_SHIFT (0x00000000U)
1620 #define CSL_DSS_VIDL1_BA_UV_1_BA_MAX (0xFFFFFFFFU)
1625 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_MASK (0x0000FFFFU)
1626 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_SHIFT (0x00000000U)
1627 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_MAX (0x0000FFFFU)
1629 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_MASK (0xFFFF0000U)
1630 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_SHIFT (0x00000010U)
1631 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_MAX (0x0000FFFFU)
1636 #define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK (0x0000FFFFU)
1637 #define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT (0x00000000U)
1638 #define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX (0x0000FFFFU)
1640 #define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK (0xFFFF0000U)
1641 #define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT (0x00000010U)
1642 #define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX (0x0000FFFFU)
1647 #define CSL_DSS_VIDL1_CSC_COEF0_C00_MASK (0x000007FFU)
1648 #define CSL_DSS_VIDL1_CSC_COEF0_C00_SHIFT (0x00000000U)
1649 #define CSL_DSS_VIDL1_CSC_COEF0_C00_MAX (0x000007FFU)
1651 #define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_MASK (0x0000F800U)
1652 #define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_SHIFT (0x0000000BU)
1653 #define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_MAX (0x0000001FU)
1655 #define CSL_DSS_VIDL1_CSC_COEF0_C01_MASK (0x07FF0000U)
1656 #define CSL_DSS_VIDL1_CSC_COEF0_C01_SHIFT (0x00000010U)
1657 #define CSL_DSS_VIDL1_CSC_COEF0_C01_MAX (0x000007FFU)
1659 #define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_MASK (0xF8000000U)
1660 #define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_SHIFT (0x0000001BU)
1661 #define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_MAX (0x0000001FU)
1666 #define CSL_DSS_VIDL1_CSC_COEF1_C02_MASK (0x000007FFU)
1667 #define CSL_DSS_VIDL1_CSC_COEF1_C02_SHIFT (0x00000000U)
1668 #define CSL_DSS_VIDL1_CSC_COEF1_C02_MAX (0x000007FFU)
1670 #define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_MASK (0x0000F800U)
1671 #define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_SHIFT (0x0000000BU)
1672 #define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_MAX (0x0000001FU)
1674 #define CSL_DSS_VIDL1_CSC_COEF1_C10_MASK (0x07FF0000U)
1675 #define CSL_DSS_VIDL1_CSC_COEF1_C10_SHIFT (0x00000010U)
1676 #define CSL_DSS_VIDL1_CSC_COEF1_C10_MAX (0x000007FFU)
1678 #define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_MASK (0xF8000000U)
1679 #define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_SHIFT (0x0000001BU)
1680 #define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_MAX (0x0000001FU)
1685 #define CSL_DSS_VIDL1_CSC_COEF2_C11_MASK (0x000007FFU)
1686 #define CSL_DSS_VIDL1_CSC_COEF2_C11_SHIFT (0x00000000U)
1687 #define CSL_DSS_VIDL1_CSC_COEF2_C11_MAX (0x000007FFU)
1689 #define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_MASK (0x0000F800U)
1690 #define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_SHIFT (0x0000000BU)
1691 #define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_MAX (0x0000001FU)
1693 #define CSL_DSS_VIDL1_CSC_COEF2_C12_MASK (0x07FF0000U)
1694 #define CSL_DSS_VIDL1_CSC_COEF2_C12_SHIFT (0x00000010U)
1695 #define CSL_DSS_VIDL1_CSC_COEF2_C12_MAX (0x000007FFU)
1697 #define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_MASK (0xF8000000U)
1698 #define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_SHIFT (0x0000001BU)
1699 #define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_MAX (0x0000001FU)
1704 #define CSL_DSS_VIDL1_CSC_COEF3_C20_MASK (0x000007FFU)
1705 #define CSL_DSS_VIDL1_CSC_COEF3_C20_SHIFT (0x00000000U)
1706 #define CSL_DSS_VIDL1_CSC_COEF3_C20_MAX (0x000007FFU)
1708 #define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_MASK (0x0000F800U)
1709 #define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_SHIFT (0x0000000BU)
1710 #define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_MAX (0x0000001FU)
1712 #define CSL_DSS_VIDL1_CSC_COEF3_C21_MASK (0x07FF0000U)
1713 #define CSL_DSS_VIDL1_CSC_COEF3_C21_SHIFT (0x00000010U)
1714 #define CSL_DSS_VIDL1_CSC_COEF3_C21_MAX (0x000007FFU)
1716 #define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_MASK (0xF8000000U)
1717 #define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_SHIFT (0x0000001BU)
1718 #define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_MAX (0x0000001FU)
1723 #define CSL_DSS_VIDL1_CSC_COEF4_C22_MASK (0x000007FFU)
1724 #define CSL_DSS_VIDL1_CSC_COEF4_C22_SHIFT (0x00000000U)
1725 #define CSL_DSS_VIDL1_CSC_COEF4_C22_MAX (0x000007FFU)
1727 #define CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_MASK (0xFFFFF800U)
1728 #define CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_SHIFT (0x0000000BU)
1729 #define CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_MAX (0x001FFFFFU)
1734 #define CSL_DSS_VIDL1_CSC_COEF5_RESERVED_MASK (0x00000007U)
1735 #define CSL_DSS_VIDL1_CSC_COEF5_RESERVED_SHIFT (0x00000000U)
1736 #define CSL_DSS_VIDL1_CSC_COEF5_RESERVED_MAX (0x00000007U)
1738 #define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_MASK (0x0000FFF8U)
1739 #define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_SHIFT (0x00000003U)
1740 #define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_MAX (0x00001FFFU)
1742 #define CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_MASK (0x00070000U)
1743 #define CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_SHIFT (0x00000010U)
1744 #define CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_MAX (0x00000007U)
1746 #define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_MASK (0xFFF80000U)
1747 #define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_SHIFT (0x00000013U)
1748 #define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_MAX (0x00001FFFU)
1753 #define CSL_DSS_VIDL1_CSC_COEF6_RESERVED_MASK (0x00000007U)
1754 #define CSL_DSS_VIDL1_CSC_COEF6_RESERVED_SHIFT (0x00000000U)
1755 #define CSL_DSS_VIDL1_CSC_COEF6_RESERVED_MAX (0x00000007U)
1757 #define CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_MASK (0x0000FFF8U)
1758 #define CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_SHIFT (0x00000003U)
1759 #define CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_MAX (0x00001FFFU)
1761 #define CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_MASK (0x00070000U)
1762 #define CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_SHIFT (0x00000010U)
1763 #define CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_MAX (0x00000007U)
1765 #define CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_MASK (0xFFF80000U)
1766 #define CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_SHIFT (0x00000013U)
1767 #define CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_MAX (0x00001FFFU)
1772 #define CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_MASK (0x000000FFU)
1773 #define CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_SHIFT (0x00000000U)
1774 #define CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_MAX (0x000000FFU)
1776 #define CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_MASK (0xFFFFFF00U)
1777 #define CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_SHIFT (0x00000008U)
1778 #define CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_MAX (0x00FFFFFFU)
1783 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_MASK (0x0000FFFFU)
1784 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_SHIFT (0x00000000U)
1785 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_MAX (0x0000FFFFU)
1787 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_MASK (0xFFFF0000U)
1788 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_SHIFT (0x00000010U)
1789 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_MAX (0x0000FFFFU)
1794 #define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_MASK (0x00000FFFU)
1795 #define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_SHIFT (0x00000000U)
1796 #define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_MAX (0x00000FFFU)
1798 #define CSL_DSS_VIDL1_PICTURE_SIZE_RESERVED1_MASK (0x0000F000U)
1799 #define CSL_DSS_VIDL1_PICTURE_SIZE_RESERVED1_SHIFT (0x0000000CU)
1800 #define CSL_DSS_VIDL1_PICTURE_SIZE_RESERVED1_MAX (0x0000000FU)
1802 #define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_MASK (0x0FFF0000U)
1803 #define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_SHIFT (0x00000010U)
1804 #define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_MAX (0x00000FFFU)
1806 #define CSL_DSS_VIDL1_PICTURE_SIZE_RESERVED_MASK (0xF0000000U)
1807 #define CSL_DSS_VIDL1_PICTURE_SIZE_RESERVED_SHIFT (0x0000001CU)
1808 #define CSL_DSS_VIDL1_PICTURE_SIZE_RESERVED_MAX (0x0000000FU)
1813 #define CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_MASK (0x000000FFU)
1814 #define CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_SHIFT (0x00000000U)
1815 #define CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_MAX (0x000000FFU)
1817 #define CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_MASK (0xFFFFFF00U)
1818 #define CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_SHIFT (0x00000008U)
1819 #define CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_MAX (0x00FFFFFFU)
1824 #define CSL_DSS_VIDL1_PRELOAD_PRELOAD_MASK (0x00000FFFU)
1825 #define CSL_DSS_VIDL1_PRELOAD_PRELOAD_SHIFT (0x00000000U)
1826 #define CSL_DSS_VIDL1_PRELOAD_PRELOAD_MAX (0x00000FFFU)
1828 #define CSL_DSS_VIDL1_PRELOAD_RESERVED_212_MASK (0xFFFFF000U)
1829 #define CSL_DSS_VIDL1_PRELOAD_RESERVED_212_SHIFT (0x0000000CU)
1830 #define CSL_DSS_VIDL1_PRELOAD_RESERVED_212_MAX (0x000FFFFFU)
1835 #define CSL_DSS_VIDL1_ROW_INC_ROWINC_MASK (0xFFFFFFFFU)
1836 #define CSL_DSS_VIDL1_ROW_INC_ROWINC_SHIFT (0x00000000U)
1837 #define CSL_DSS_VIDL1_ROW_INC_ROWINC_MAX (0xFFFFFFFFU)
1842 #define CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_MASK (0x0000FFFFU)
1843 #define CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_SHIFT (0x00000000U)
1844 #define CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_MAX (0x0000FFFFU)
1846 #define CSL_DSS_VIDL1_BA_EXT_0_RESERVED_MASK (0xFFFF0000U)
1847 #define CSL_DSS_VIDL1_BA_EXT_0_RESERVED_SHIFT (0x00000010U)
1848 #define CSL_DSS_VIDL1_BA_EXT_0_RESERVED_MAX (0x0000FFFFU)
1853 #define CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_MASK (0x0000FFFFU)
1854 #define CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_SHIFT (0x00000000U)
1855 #define CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_MAX (0x0000FFFFU)
1857 #define CSL_DSS_VIDL1_BA_EXT_1_RESERVED_MASK (0xFFFF0000U)
1858 #define CSL_DSS_VIDL1_BA_EXT_1_RESERVED_SHIFT (0x00000010U)
1859 #define CSL_DSS_VIDL1_BA_EXT_1_RESERVED_MAX (0x0000FFFFU)
1864 #define CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_MASK (0x0000FFFFU)
1865 #define CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_SHIFT (0x00000000U)
1866 #define CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_MAX (0x0000FFFFU)
1868 #define CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_MASK (0xFFFF0000U)
1869 #define CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_SHIFT (0x00000010U)
1870 #define CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_MAX (0x0000FFFFU)
1875 #define CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_MASK (0x0000FFFFU)
1876 #define CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_SHIFT (0x00000000U)
1877 #define CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_MAX (0x0000FFFFU)
1879 #define CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_MASK (0xFFFF0000U)
1880 #define CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_SHIFT (0x00000010U)
1881 #define CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_MAX (0x0000FFFFU)
1886 #define CSL_DSS_VIDL1_CSC_COEF7_RESERVED_MASK (0x00000007U)
1887 #define CSL_DSS_VIDL1_CSC_COEF7_RESERVED_SHIFT (0x00000000U)
1888 #define CSL_DSS_VIDL1_CSC_COEF7_RESERVED_MAX (0x00000007U)
1890 #define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_MASK (0x0000FFF8U)
1891 #define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_SHIFT (0x00000003U)
1892 #define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_MAX (0x00001FFFU)
1894 #define CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_MASK (0x00070000U)
1895 #define CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_SHIFT (0x00000010U)
1896 #define CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_MAX (0x00000007U)
1898 #define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_MASK (0xFFF80000U)
1899 #define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_SHIFT (0x00000013U)
1900 #define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_MAX (0x00001FFFU)
1905 #define CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_MASK (0xFFFFFFFFU)
1906 #define CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_SHIFT (0x00000000U)
1907 #define CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_MAX (0xFFFFFFFFU)
1912 #define CSL_DSS_VIDL1_CLUT_0_VALUE_B_MASK (0x000000FFU)
1913 #define CSL_DSS_VIDL1_CLUT_0_VALUE_B_SHIFT (0x00000000U)
1914 #define CSL_DSS_VIDL1_CLUT_0_VALUE_B_MAX (0x000000FFU)
1916 #define CSL_DSS_VIDL1_CLUT_0_VALUE_G_MASK (0x0000FF00U)
1917 #define CSL_DSS_VIDL1_CLUT_0_VALUE_G_SHIFT (0x00000008U)
1918 #define CSL_DSS_VIDL1_CLUT_0_VALUE_G_MAX (0x000000FFU)
1920 #define CSL_DSS_VIDL1_CLUT_0_VALUE_R_MASK (0x00FF0000U)
1921 #define CSL_DSS_VIDL1_CLUT_0_VALUE_R_SHIFT (0x00000010U)
1922 #define CSL_DSS_VIDL1_CLUT_0_VALUE_R_MAX (0x000000FFU)
1924 #define CSL_DSS_VIDL1_CLUT_0_INDEX_MASK (0xFF000000U)
1925 #define CSL_DSS_VIDL1_CLUT_0_INDEX_SHIFT (0x00000018U)
1926 #define CSL_DSS_VIDL1_CLUT_0_INDEX_MAX (0x000000FFU)
1931 #define CSL_DSS_VIDL1_CLUT_1_VALUE_B_MASK (0x000000FFU)
1932 #define CSL_DSS_VIDL1_CLUT_1_VALUE_B_SHIFT (0x00000000U)
1933 #define CSL_DSS_VIDL1_CLUT_1_VALUE_B_MAX (0x000000FFU)
1935 #define CSL_DSS_VIDL1_CLUT_1_VALUE_G_MASK (0x0000FF00U)
1936 #define CSL_DSS_VIDL1_CLUT_1_VALUE_G_SHIFT (0x00000008U)
1937 #define CSL_DSS_VIDL1_CLUT_1_VALUE_G_MAX (0x000000FFU)
1939 #define CSL_DSS_VIDL1_CLUT_1_VALUE_R_MASK (0x00FF0000U)
1940 #define CSL_DSS_VIDL1_CLUT_1_VALUE_R_SHIFT (0x00000010U)
1941 #define CSL_DSS_VIDL1_CLUT_1_VALUE_R_MAX (0x000000FFU)
1943 #define CSL_DSS_VIDL1_CLUT_1_INDEX_MASK (0xFF000000U)
1944 #define CSL_DSS_VIDL1_CLUT_1_INDEX_SHIFT (0x00000018U)
1945 #define CSL_DSS_VIDL1_CLUT_1_INDEX_MAX (0x000000FFU)
1950 #define CSL_DSS_VIDL1_CLUT_2_VALUE_B_MASK (0x000000FFU)
1951 #define CSL_DSS_VIDL1_CLUT_2_VALUE_B_SHIFT (0x00000000U)
1952 #define CSL_DSS_VIDL1_CLUT_2_VALUE_B_MAX (0x000000FFU)
1954 #define CSL_DSS_VIDL1_CLUT_2_VALUE_G_MASK (0x0000FF00U)
1955 #define CSL_DSS_VIDL1_CLUT_2_VALUE_G_SHIFT (0x00000008U)
1956 #define CSL_DSS_VIDL1_CLUT_2_VALUE_G_MAX (0x000000FFU)
1958 #define CSL_DSS_VIDL1_CLUT_2_VALUE_R_MASK (0x00FF0000U)
1959 #define CSL_DSS_VIDL1_CLUT_2_VALUE_R_SHIFT (0x00000010U)
1960 #define CSL_DSS_VIDL1_CLUT_2_VALUE_R_MAX (0x000000FFU)
1962 #define CSL_DSS_VIDL1_CLUT_2_INDEX_MASK (0xFF000000U)
1963 #define CSL_DSS_VIDL1_CLUT_2_INDEX_SHIFT (0x00000018U)
1964 #define CSL_DSS_VIDL1_CLUT_2_INDEX_MAX (0x000000FFU)
1969 #define CSL_DSS_VIDL1_CLUT_3_VALUE_B_MASK (0x000000FFU)
1970 #define CSL_DSS_VIDL1_CLUT_3_VALUE_B_SHIFT (0x00000000U)
1971 #define CSL_DSS_VIDL1_CLUT_3_VALUE_B_MAX (0x000000FFU)
1973 #define CSL_DSS_VIDL1_CLUT_3_VALUE_G_MASK (0x0000FF00U)
1974 #define CSL_DSS_VIDL1_CLUT_3_VALUE_G_SHIFT (0x00000008U)
1975 #define CSL_DSS_VIDL1_CLUT_3_VALUE_G_MAX (0x000000FFU)
1977 #define CSL_DSS_VIDL1_CLUT_3_VALUE_R_MASK (0x00FF0000U)
1978 #define CSL_DSS_VIDL1_CLUT_3_VALUE_R_SHIFT (0x00000010U)
1979 #define CSL_DSS_VIDL1_CLUT_3_VALUE_R_MAX (0x000000FFU)
1981 #define CSL_DSS_VIDL1_CLUT_3_INDEX_MASK (0xFF000000U)
1982 #define CSL_DSS_VIDL1_CLUT_3_INDEX_SHIFT (0x00000018U)
1983 #define CSL_DSS_VIDL1_CLUT_3_INDEX_MAX (0x000000FFU)
1988 #define CSL_DSS_VIDL1_CLUT_4_VALUE_B_MASK (0x000000FFU)
1989 #define CSL_DSS_VIDL1_CLUT_4_VALUE_B_SHIFT (0x00000000U)
1990 #define CSL_DSS_VIDL1_CLUT_4_VALUE_B_MAX (0x000000FFU)
1992 #define CSL_DSS_VIDL1_CLUT_4_VALUE_G_MASK (0x0000FF00U)
1993 #define CSL_DSS_VIDL1_CLUT_4_VALUE_G_SHIFT (0x00000008U)
1994 #define CSL_DSS_VIDL1_CLUT_4_VALUE_G_MAX (0x000000FFU)
1996 #define CSL_DSS_VIDL1_CLUT_4_VALUE_R_MASK (0x00FF0000U)
1997 #define CSL_DSS_VIDL1_CLUT_4_VALUE_R_SHIFT (0x00000010U)
1998 #define CSL_DSS_VIDL1_CLUT_4_VALUE_R_MAX (0x000000FFU)
2000 #define CSL_DSS_VIDL1_CLUT_4_INDEX_MASK (0xFF000000U)
2001 #define CSL_DSS_VIDL1_CLUT_4_INDEX_SHIFT (0x00000018U)
2002 #define CSL_DSS_VIDL1_CLUT_4_INDEX_MAX (0x000000FFU)
2007 #define CSL_DSS_VIDL1_CLUT_5_VALUE_B_MASK (0x000000FFU)
2008 #define CSL_DSS_VIDL1_CLUT_5_VALUE_B_SHIFT (0x00000000U)
2009 #define CSL_DSS_VIDL1_CLUT_5_VALUE_B_MAX (0x000000FFU)
2011 #define CSL_DSS_VIDL1_CLUT_5_VALUE_G_MASK (0x0000FF00U)
2012 #define CSL_DSS_VIDL1_CLUT_5_VALUE_G_SHIFT (0x00000008U)
2013 #define CSL_DSS_VIDL1_CLUT_5_VALUE_G_MAX (0x000000FFU)
2015 #define CSL_DSS_VIDL1_CLUT_5_VALUE_R_MASK (0x00FF0000U)
2016 #define CSL_DSS_VIDL1_CLUT_5_VALUE_R_SHIFT (0x00000010U)
2017 #define CSL_DSS_VIDL1_CLUT_5_VALUE_R_MAX (0x000000FFU)
2019 #define CSL_DSS_VIDL1_CLUT_5_INDEX_MASK (0xFF000000U)
2020 #define CSL_DSS_VIDL1_CLUT_5_INDEX_SHIFT (0x00000018U)
2021 #define CSL_DSS_VIDL1_CLUT_5_INDEX_MAX (0x000000FFU)
2026 #define CSL_DSS_VIDL1_CLUT_6_VALUE_B_MASK (0x000000FFU)
2027 #define CSL_DSS_VIDL1_CLUT_6_VALUE_B_SHIFT (0x00000000U)
2028 #define CSL_DSS_VIDL1_CLUT_6_VALUE_B_MAX (0x000000FFU)
2030 #define CSL_DSS_VIDL1_CLUT_6_VALUE_G_MASK (0x0000FF00U)
2031 #define CSL_DSS_VIDL1_CLUT_6_VALUE_G_SHIFT (0x00000008U)
2032 #define CSL_DSS_VIDL1_CLUT_6_VALUE_G_MAX (0x000000FFU)
2034 #define CSL_DSS_VIDL1_CLUT_6_VALUE_R_MASK (0x00FF0000U)
2035 #define CSL_DSS_VIDL1_CLUT_6_VALUE_R_SHIFT (0x00000010U)
2036 #define CSL_DSS_VIDL1_CLUT_6_VALUE_R_MAX (0x000000FFU)
2038 #define CSL_DSS_VIDL1_CLUT_6_INDEX_MASK (0xFF000000U)
2039 #define CSL_DSS_VIDL1_CLUT_6_INDEX_SHIFT (0x00000018U)
2040 #define CSL_DSS_VIDL1_CLUT_6_INDEX_MAX (0x000000FFU)
2045 #define CSL_DSS_VIDL1_CLUT_7_VALUE_B_MASK (0x000000FFU)
2046 #define CSL_DSS_VIDL1_CLUT_7_VALUE_B_SHIFT (0x00000000U)
2047 #define CSL_DSS_VIDL1_CLUT_7_VALUE_B_MAX (0x000000FFU)
2049 #define CSL_DSS_VIDL1_CLUT_7_VALUE_G_MASK (0x0000FF00U)
2050 #define CSL_DSS_VIDL1_CLUT_7_VALUE_G_SHIFT (0x00000008U)
2051 #define CSL_DSS_VIDL1_CLUT_7_VALUE_G_MAX (0x000000FFU)
2053 #define CSL_DSS_VIDL1_CLUT_7_VALUE_R_MASK (0x00FF0000U)
2054 #define CSL_DSS_VIDL1_CLUT_7_VALUE_R_SHIFT (0x00000010U)
2055 #define CSL_DSS_VIDL1_CLUT_7_VALUE_R_MAX (0x000000FFU)
2057 #define CSL_DSS_VIDL1_CLUT_7_INDEX_MASK (0xFF000000U)
2058 #define CSL_DSS_VIDL1_CLUT_7_INDEX_SHIFT (0x00000018U)
2059 #define CSL_DSS_VIDL1_CLUT_7_INDEX_MAX (0x000000FFU)
2064 #define CSL_DSS_VIDL1_CLUT_8_VALUE_B_MASK (0x000000FFU)
2065 #define CSL_DSS_VIDL1_CLUT_8_VALUE_B_SHIFT (0x00000000U)
2066 #define CSL_DSS_VIDL1_CLUT_8_VALUE_B_MAX (0x000000FFU)
2068 #define CSL_DSS_VIDL1_CLUT_8_VALUE_G_MASK (0x0000FF00U)
2069 #define CSL_DSS_VIDL1_CLUT_8_VALUE_G_SHIFT (0x00000008U)
2070 #define CSL_DSS_VIDL1_CLUT_8_VALUE_G_MAX (0x000000FFU)
2072 #define CSL_DSS_VIDL1_CLUT_8_VALUE_R_MASK (0x00FF0000U)
2073 #define CSL_DSS_VIDL1_CLUT_8_VALUE_R_SHIFT (0x00000010U)
2074 #define CSL_DSS_VIDL1_CLUT_8_VALUE_R_MAX (0x000000FFU)
2076 #define CSL_DSS_VIDL1_CLUT_8_INDEX_MASK (0xFF000000U)
2077 #define CSL_DSS_VIDL1_CLUT_8_INDEX_SHIFT (0x00000018U)
2078 #define CSL_DSS_VIDL1_CLUT_8_INDEX_MAX (0x000000FFU)
2083 #define CSL_DSS_VIDL1_CLUT_9_VALUE_B_MASK (0x000000FFU)
2084 #define CSL_DSS_VIDL1_CLUT_9_VALUE_B_SHIFT (0x00000000U)
2085 #define CSL_DSS_VIDL1_CLUT_9_VALUE_B_MAX (0x000000FFU)
2087 #define CSL_DSS_VIDL1_CLUT_9_VALUE_G_MASK (0x0000FF00U)
2088 #define CSL_DSS_VIDL1_CLUT_9_VALUE_G_SHIFT (0x00000008U)
2089 #define CSL_DSS_VIDL1_CLUT_9_VALUE_G_MAX (0x000000FFU)
2091 #define CSL_DSS_VIDL1_CLUT_9_VALUE_R_MASK (0x00FF0000U)
2092 #define CSL_DSS_VIDL1_CLUT_9_VALUE_R_SHIFT (0x00000010U)
2093 #define CSL_DSS_VIDL1_CLUT_9_VALUE_R_MAX (0x000000FFU)
2095 #define CSL_DSS_VIDL1_CLUT_9_INDEX_MASK (0xFF000000U)
2096 #define CSL_DSS_VIDL1_CLUT_9_INDEX_SHIFT (0x00000018U)
2097 #define CSL_DSS_VIDL1_CLUT_9_INDEX_MAX (0x000000FFU)
2102 #define CSL_DSS_VIDL1_CLUT_10_VALUE_B_MASK (0x000000FFU)
2103 #define CSL_DSS_VIDL1_CLUT_10_VALUE_B_SHIFT (0x00000000U)
2104 #define CSL_DSS_VIDL1_CLUT_10_VALUE_B_MAX (0x000000FFU)
2106 #define CSL_DSS_VIDL1_CLUT_10_VALUE_G_MASK (0x0000FF00U)
2107 #define CSL_DSS_VIDL1_CLUT_10_VALUE_G_SHIFT (0x00000008U)
2108 #define CSL_DSS_VIDL1_CLUT_10_VALUE_G_MAX (0x000000FFU)
2110 #define CSL_DSS_VIDL1_CLUT_10_VALUE_R_MASK (0x00FF0000U)
2111 #define CSL_DSS_VIDL1_CLUT_10_VALUE_R_SHIFT (0x00000010U)
2112 #define CSL_DSS_VIDL1_CLUT_10_VALUE_R_MAX (0x000000FFU)
2114 #define CSL_DSS_VIDL1_CLUT_10_INDEX_MASK (0xFF000000U)
2115 #define CSL_DSS_VIDL1_CLUT_10_INDEX_SHIFT (0x00000018U)
2116 #define CSL_DSS_VIDL1_CLUT_10_INDEX_MAX (0x000000FFU)
2121 #define CSL_DSS_VIDL1_CLUT_11_VALUE_B_MASK (0x000000FFU)
2122 #define CSL_DSS_VIDL1_CLUT_11_VALUE_B_SHIFT (0x00000000U)
2123 #define CSL_DSS_VIDL1_CLUT_11_VALUE_B_MAX (0x000000FFU)
2125 #define CSL_DSS_VIDL1_CLUT_11_VALUE_G_MASK (0x0000FF00U)
2126 #define CSL_DSS_VIDL1_CLUT_11_VALUE_G_SHIFT (0x00000008U)
2127 #define CSL_DSS_VIDL1_CLUT_11_VALUE_G_MAX (0x000000FFU)
2129 #define CSL_DSS_VIDL1_CLUT_11_VALUE_R_MASK (0x00FF0000U)
2130 #define CSL_DSS_VIDL1_CLUT_11_VALUE_R_SHIFT (0x00000010U)
2131 #define CSL_DSS_VIDL1_CLUT_11_VALUE_R_MAX (0x000000FFU)
2133 #define CSL_DSS_VIDL1_CLUT_11_INDEX_MASK (0xFF000000U)
2134 #define CSL_DSS_VIDL1_CLUT_11_INDEX_SHIFT (0x00000018U)
2135 #define CSL_DSS_VIDL1_CLUT_11_INDEX_MAX (0x000000FFU)
2140 #define CSL_DSS_VIDL1_CLUT_12_VALUE_B_MASK (0x000000FFU)
2141 #define CSL_DSS_VIDL1_CLUT_12_VALUE_B_SHIFT (0x00000000U)
2142 #define CSL_DSS_VIDL1_CLUT_12_VALUE_B_MAX (0x000000FFU)
2144 #define CSL_DSS_VIDL1_CLUT_12_VALUE_G_MASK (0x0000FF00U)
2145 #define CSL_DSS_VIDL1_CLUT_12_VALUE_G_SHIFT (0x00000008U)
2146 #define CSL_DSS_VIDL1_CLUT_12_VALUE_G_MAX (0x000000FFU)
2148 #define CSL_DSS_VIDL1_CLUT_12_VALUE_R_MASK (0x00FF0000U)
2149 #define CSL_DSS_VIDL1_CLUT_12_VALUE_R_SHIFT (0x00000010U)
2150 #define CSL_DSS_VIDL1_CLUT_12_VALUE_R_MAX (0x000000FFU)
2152 #define CSL_DSS_VIDL1_CLUT_12_INDEX_MASK (0xFF000000U)
2153 #define CSL_DSS_VIDL1_CLUT_12_INDEX_SHIFT (0x00000018U)
2154 #define CSL_DSS_VIDL1_CLUT_12_INDEX_MAX (0x000000FFU)
2159 #define CSL_DSS_VIDL1_CLUT_13_VALUE_B_MASK (0x000000FFU)
2160 #define CSL_DSS_VIDL1_CLUT_13_VALUE_B_SHIFT (0x00000000U)
2161 #define CSL_DSS_VIDL1_CLUT_13_VALUE_B_MAX (0x000000FFU)
2163 #define CSL_DSS_VIDL1_CLUT_13_VALUE_G_MASK (0x0000FF00U)
2164 #define CSL_DSS_VIDL1_CLUT_13_VALUE_G_SHIFT (0x00000008U)
2165 #define CSL_DSS_VIDL1_CLUT_13_VALUE_G_MAX (0x000000FFU)
2167 #define CSL_DSS_VIDL1_CLUT_13_VALUE_R_MASK (0x00FF0000U)
2168 #define CSL_DSS_VIDL1_CLUT_13_VALUE_R_SHIFT (0x00000010U)
2169 #define CSL_DSS_VIDL1_CLUT_13_VALUE_R_MAX (0x000000FFU)
2171 #define CSL_DSS_VIDL1_CLUT_13_INDEX_MASK (0xFF000000U)
2172 #define CSL_DSS_VIDL1_CLUT_13_INDEX_SHIFT (0x00000018U)
2173 #define CSL_DSS_VIDL1_CLUT_13_INDEX_MAX (0x000000FFU)
2178 #define CSL_DSS_VIDL1_CLUT_14_VALUE_B_MASK (0x000000FFU)
2179 #define CSL_DSS_VIDL1_CLUT_14_VALUE_B_SHIFT (0x00000000U)
2180 #define CSL_DSS_VIDL1_CLUT_14_VALUE_B_MAX (0x000000FFU)
2182 #define CSL_DSS_VIDL1_CLUT_14_VALUE_G_MASK (0x0000FF00U)
2183 #define CSL_DSS_VIDL1_CLUT_14_VALUE_G_SHIFT (0x00000008U)
2184 #define CSL_DSS_VIDL1_CLUT_14_VALUE_G_MAX (0x000000FFU)
2186 #define CSL_DSS_VIDL1_CLUT_14_VALUE_R_MASK (0x00FF0000U)
2187 #define CSL_DSS_VIDL1_CLUT_14_VALUE_R_SHIFT (0x00000010U)
2188 #define CSL_DSS_VIDL1_CLUT_14_VALUE_R_MAX (0x000000FFU)
2190 #define CSL_DSS_VIDL1_CLUT_14_INDEX_MASK (0xFF000000U)
2191 #define CSL_DSS_VIDL1_CLUT_14_INDEX_SHIFT (0x00000018U)
2192 #define CSL_DSS_VIDL1_CLUT_14_INDEX_MAX (0x000000FFU)
2197 #define CSL_DSS_VIDL1_CLUT_15_VALUE_B_MASK (0x000000FFU)
2198 #define CSL_DSS_VIDL1_CLUT_15_VALUE_B_SHIFT (0x00000000U)
2199 #define CSL_DSS_VIDL1_CLUT_15_VALUE_B_MAX (0x000000FFU)
2201 #define CSL_DSS_VIDL1_CLUT_15_VALUE_G_MASK (0x0000FF00U)
2202 #define CSL_DSS_VIDL1_CLUT_15_VALUE_G_SHIFT (0x00000008U)
2203 #define CSL_DSS_VIDL1_CLUT_15_VALUE_G_MAX (0x000000FFU)
2205 #define CSL_DSS_VIDL1_CLUT_15_VALUE_R_MASK (0x00FF0000U)
2206 #define CSL_DSS_VIDL1_CLUT_15_VALUE_R_SHIFT (0x00000010U)
2207 #define CSL_DSS_VIDL1_CLUT_15_VALUE_R_MAX (0x000000FFU)
2209 #define CSL_DSS_VIDL1_CLUT_15_INDEX_MASK (0xFF000000U)
2210 #define CSL_DSS_VIDL1_CLUT_15_INDEX_SHIFT (0x00000018U)
2211 #define CSL_DSS_VIDL1_CLUT_15_INDEX_MAX (0x000000FFU)
2216 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_MASK (0x00000001U)
2217 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_SHIFT (0x00000000U)
2218 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_MAX (0x00000001U)
2220 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK (0x00000002U)
2221 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT (0x00000001U)
2222 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX (0x00000001U)
2224 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK (0x1U)
2225 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE (0x0U)
2227 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK (0x00000004U)
2228 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT (0x00000002U)
2229 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX (0x00000001U)
2231 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE (0x1U)
2232 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE (0x0U)
2234 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_MASK (0x000007F8U)
2235 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT (0x00000003U)
2236 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_MAX (0x000000FFU)
2238 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK (0x00001800U)
2239 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT (0x0000000BU)
2240 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX (0x00000003U)
2242 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE (0x0U)
2243 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN (0x1U)
2244 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD (0x2U)
2245 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED (0x3U)
2247 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_MASK (0xFFFFE000U)
2248 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_SHIFT (0x0000000DU)
2249 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_MAX (0x0007FFFFU)
2254 #define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK (0xFFFFFFFFU)
2255 #define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT (0x00000000U)
2256 #define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX (0xFFFFFFFFU)
2261 #define CSL_DSS_VIDL1_SAFETY_POSITION_POSX_MASK (0x00000FFFU)
2262 #define CSL_DSS_VIDL1_SAFETY_POSITION_POSX_SHIFT (0x00000000U)
2263 #define CSL_DSS_VIDL1_SAFETY_POSITION_POSX_MAX (0x00000FFFU)
2265 #define CSL_DSS_VIDL1_SAFETY_POSITION_RESERVED1_MASK (0x0000F000U)
2266 #define CSL_DSS_VIDL1_SAFETY_POSITION_RESERVED1_SHIFT (0x0000000CU)
2267 #define CSL_DSS_VIDL1_SAFETY_POSITION_RESERVED1_MAX (0x0000000FU)
2269 #define CSL_DSS_VIDL1_SAFETY_POSITION_POSY_MASK (0x0FFF0000U)
2270 #define CSL_DSS_VIDL1_SAFETY_POSITION_POSY_SHIFT (0x00000010U)
2271 #define CSL_DSS_VIDL1_SAFETY_POSITION_POSY_MAX (0x00000FFFU)
2273 #define CSL_DSS_VIDL1_SAFETY_POSITION_RESERVED_MASK (0xF0000000U)
2274 #define CSL_DSS_VIDL1_SAFETY_POSITION_RESERVED_SHIFT (0x0000001CU)
2275 #define CSL_DSS_VIDL1_SAFETY_POSITION_RESERVED_MAX (0x0000000FU)
2280 #define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK (0xFFFFFFFFU)
2281 #define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT (0x00000000U)
2282 #define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX (0xFFFFFFFFU)
2287 #define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_MASK (0x00000FFFU)
2288 #define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_SHIFT (0x00000000U)
2289 #define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_MAX (0x00000FFFU)
2291 #define CSL_DSS_VIDL1_SAFETY_SIZE_RESERVED1_MASK (0x0000F000U)
2292 #define CSL_DSS_VIDL1_SAFETY_SIZE_RESERVED1_SHIFT (0x0000000CU)
2293 #define CSL_DSS_VIDL1_SAFETY_SIZE_RESERVED1_MAX (0x0000000FU)
2295 #define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_MASK (0x0FFF0000U)
2296 #define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_SHIFT (0x00000010U)
2297 #define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_MAX (0x00000FFFU)
2299 #define CSL_DSS_VIDL1_SAFETY_SIZE_RESERVED_MASK (0xF0000000U)
2300 #define CSL_DSS_VIDL1_SAFETY_SIZE_RESERVED_SHIFT (0x0000001CU)
2301 #define CSL_DSS_VIDL1_SAFETY_SIZE_RESERVED_MAX (0x0000000FU)
2306 #define CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_MASK (0xFFFFFFFFU)
2307 #define CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_SHIFT (0x00000000U)
2308 #define CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_MAX (0xFFFFFFFFU)
2313 #define CSL_DSS_VIDL1_LUMAKEY_RESERVED1_MASK (0xF0000000U)
2314 #define CSL_DSS_VIDL1_LUMAKEY_RESERVED1_SHIFT (0x0000001CU)
2315 #define CSL_DSS_VIDL1_LUMAKEY_RESERVED1_MAX (0x0000000FU)
2317 #define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_MASK (0x0FFF0000U)
2318 #define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_SHIFT (0x00000010U)
2319 #define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_MAX (0x00000FFFU)
2321 #define CSL_DSS_VIDL1_LUMAKEY_RESERVED_MASK (0x0000F000U)
2322 #define CSL_DSS_VIDL1_LUMAKEY_RESERVED_SHIFT (0x0000000CU)
2323 #define CSL_DSS_VIDL1_LUMAKEY_RESERVED_MAX (0x0000000FU)
2325 #define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_MASK (0x00000FFFU)
2326 #define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_SHIFT (0x00000000U)
2327 #define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_MAX (0x00000FFFU)
2341 volatile uint8_t Resv_8[4];
2359 #define CSL_DSS_OVR1_CONFIG (0x00000000U)
2360 #define CSL_DSS_OVR1_DEFAULT_COLOR (0x00000008U)
2361 #define CSL_DSS_OVR1_DEFAULT_COLOR2 (0x0000000CU)
2362 #define CSL_DSS_OVR1_TRANS_COLOR_MAX (0x00000010U)
2363 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2 (0x00000014U)
2364 #define CSL_DSS_OVR1_TRANS_COLOR_MIN (0x00000018U)
2365 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2 (0x0000001CU)
2366 #define CSL_DSS_OVR1_ATTRIBUTES_0 (0x00000020U)
2367 #define CSL_DSS_OVR1_RESERVED_1 (0x00000024U)
2368 #define CSL_DSS_OVR1_RESERVED_2 (0x00000028U)
2369 #define CSL_DSS_OVR1_RESERVED_3 (0x0000002CU)
2378 #define CSL_DSS_OVR1_CONFIG_RESERVED6_MASK (0x00000001U)
2379 #define CSL_DSS_OVR1_CONFIG_RESERVED6_SHIFT (0x00000000U)
2380 #define CSL_DSS_OVR1_CONFIG_RESERVED6_MAX (0x00000001U)
2382 #define CSL_DSS_OVR1_CONFIG_COLORBAREN_MASK (0x00000002U)
2383 #define CSL_DSS_OVR1_CONFIG_COLORBAREN_SHIFT (0x00000001U)
2384 #define CSL_DSS_OVR1_CONFIG_COLORBAREN_MAX (0x00000001U)
2386 #define CSL_DSS_OVR1_CONFIG_COLORBAREN_VAL_COLORBARDIS (0x0U)
2387 #define CSL_DSS_OVR1_CONFIG_COLORBAREN_VAL_COLORBAREN (0x1U)
2389 #define CSL_DSS_OVR1_CONFIG_RESERVED_MASK (0x000003FCU)
2390 #define CSL_DSS_OVR1_CONFIG_RESERVED_SHIFT (0x00000002U)
2391 #define CSL_DSS_OVR1_CONFIG_RESERVED_MAX (0x000000FFU)
2393 #define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_MASK (0x00000400U)
2394 #define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_SHIFT (0x0000000AU)
2395 #define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_MAX (0x00000001U)
2397 #define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_VAL_DISTCK (0x0U)
2398 #define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_VAL_ENBTCK (0x1U)
2400 #define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_MASK (0x00000800U)
2401 #define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_SHIFT (0x0000000BU)
2402 #define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_MAX (0x00000001U)
2404 #define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_VAL_GDTK (0x0U)
2405 #define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_VAL_VSTK (0x1U)
2407 #define CSL_DSS_OVR1_CONFIG_RESERVED2_MASK (0x00001000U)
2408 #define CSL_DSS_OVR1_CONFIG_RESERVED2_SHIFT (0x0000000CU)
2409 #define CSL_DSS_OVR1_CONFIG_RESERVED2_MAX (0x00000001U)
2411 #define CSL_DSS_OVR1_CONFIG_RESERVED3_MASK (0x00002000U)
2412 #define CSL_DSS_OVR1_CONFIG_RESERVED3_SHIFT (0x0000000DU)
2413 #define CSL_DSS_OVR1_CONFIG_RESERVED3_MAX (0x00000001U)
2415 #define CSL_DSS_OVR1_CONFIG_RESERVED1_MASK (0xFFFFC000U)
2416 #define CSL_DSS_OVR1_CONFIG_RESERVED1_SHIFT (0x0000000EU)
2417 #define CSL_DSS_OVR1_CONFIG_RESERVED1_MAX (0x0003FFFFU)
2422 #define CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_MASK (0xFFFFFFFFU)
2423 #define CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT (0x00000000U)
2424 #define CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_MAX (0xFFFFFFFFU)
2429 #define CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_MASK (0x0000FFFFU)
2430 #define CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT (0x00000000U)
2431 #define CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_MAX (0x0000FFFFU)
2433 #define CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_MASK (0xFFFF0000U)
2434 #define CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_SHIFT (0x00000010U)
2435 #define CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_MAX (0x0000FFFFU)
2440 #define CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK (0xFFFFFFFFU)
2441 #define CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT (0x00000000U)
2442 #define CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX (0xFFFFFFFFU)
2447 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK (0x0000000FU)
2448 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT (0x00000000U)
2449 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX (0x0000000FU)
2451 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_MASK (0xFFFFFFF0U)
2452 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_SHIFT (0x00000004U)
2453 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_MAX (0x0FFFFFFFU)
2458 #define CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK (0xFFFFFFFFU)
2459 #define CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT (0x00000000U)
2460 #define CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX (0xFFFFFFFFU)
2465 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK (0x0000000FU)
2466 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT (0x00000000U)
2467 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX (0x0000000FU)
2469 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_MASK (0xFFFFFFF0U)
2470 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_SHIFT (0x00000004U)
2471 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_MAX (0x0FFFFFFFU)
2476 #define CSL_DSS_OVR1_ATTRIBUTES_0_POSX_MASK (0x0003FFC0U)
2477 #define CSL_DSS_OVR1_ATTRIBUTES_0_POSX_SHIFT (0x00000006U)
2478 #define CSL_DSS_OVR1_ATTRIBUTES_0_POSX_MAX (0x00000FFFU)
2480 #define CSL_DSS_OVR1_ATTRIBUTES_0_RESERVED_MASK (0x00040000U)
2481 #define CSL_DSS_OVR1_ATTRIBUTES_0_RESERVED_SHIFT (0x00000012U)
2482 #define CSL_DSS_OVR1_ATTRIBUTES_0_RESERVED_MAX (0x00000001U)
2484 #define CSL_DSS_OVR1_ATTRIBUTES_0_POSY_MASK (0x7FF80000U)
2485 #define CSL_DSS_OVR1_ATTRIBUTES_0_POSY_SHIFT (0x00000013U)
2486 #define CSL_DSS_OVR1_ATTRIBUTES_0_POSY_MAX (0x00000FFFU)
2488 #define CSL_DSS_OVR1_ATTRIBUTES_0_RESERVED1_MASK (0x80000000U)
2489 #define CSL_DSS_OVR1_ATTRIBUTES_0_RESERVED1_SHIFT (0x0000001FU)
2490 #define CSL_DSS_OVR1_ATTRIBUTES_0_RESERVED1_MAX (0x00000001U)
2492 #define CSL_DSS_OVR1_ATTRIBUTES_0_ENABLE_MASK (0x00000001U)
2493 #define CSL_DSS_OVR1_ATTRIBUTES_0_ENABLE_SHIFT (0x00000000U)
2494 #define CSL_DSS_OVR1_ATTRIBUTES_0_ENABLE_MAX (0x00000001U)
2496 #define CSL_DSS_OVR1_ATTRIBUTES_0_CHANNELIN_MASK (0x0000001EU)
2497 #define CSL_DSS_OVR1_ATTRIBUTES_0_CHANNELIN_SHIFT (0x00000001U)
2498 #define CSL_DSS_OVR1_ATTRIBUTES_0_CHANNELIN_MAX (0x0000000FU)
2500 #define CSL_DSS_OVR1_ATTRIBUTES_0_CHANNELIN_VAL_VIDL1 (0x1U)
2502 #define CSL_DSS_OVR1_ATTRIBUTES_0_RESERVED2_MASK (0x00000020U)
2503 #define CSL_DSS_OVR1_ATTRIBUTES_0_RESERVED2_SHIFT (0x00000005U)
2504 #define CSL_DSS_OVR1_ATTRIBUTES_0_RESERVED2_MAX (0x00000001U)
2509 #define CSL_DSS_OVR1_RESERVED_1_RSVD_0_MASK (0x0003FFC0U)
2510 #define CSL_DSS_OVR1_RESERVED_1_RSVD_0_SHIFT (0x00000006U)
2511 #define CSL_DSS_OVR1_RESERVED_1_RSVD_0_MAX (0x00000FFFU)
2513 #define CSL_DSS_OVR1_RESERVED_1_RSVD_1_MASK (0x00040000U)
2514 #define CSL_DSS_OVR1_RESERVED_1_RSVD_1_SHIFT (0x00000012U)
2515 #define CSL_DSS_OVR1_RESERVED_1_RSVD_1_MAX (0x00000001U)
2517 #define CSL_DSS_OVR1_RESERVED_1_RSVD_2_MASK (0x7FF80000U)
2518 #define CSL_DSS_OVR1_RESERVED_1_RSVD_2_SHIFT (0x00000013U)
2519 #define CSL_DSS_OVR1_RESERVED_1_RSVD_2_MAX (0x00000FFFU)
2521 #define CSL_DSS_OVR1_RESERVED_1_RSVD_3_MASK (0x80000000U)
2522 #define CSL_DSS_OVR1_RESERVED_1_RSVD_3_SHIFT (0x0000001FU)
2523 #define CSL_DSS_OVR1_RESERVED_1_RSVD_3_MAX (0x00000001U)
2525 #define CSL_DSS_OVR1_RESERVED_1_RSVD_4_MASK (0x00000001U)
2526 #define CSL_DSS_OVR1_RESERVED_1_RSVD_4_SHIFT (0x00000000U)
2527 #define CSL_DSS_OVR1_RESERVED_1_RSVD_4_MAX (0x00000001U)
2529 #define CSL_DSS_OVR1_RESERVED_1_RSVD_5_MASK (0x0000001EU)
2530 #define CSL_DSS_OVR1_RESERVED_1_RSVD_5_SHIFT (0x00000001U)
2531 #define CSL_DSS_OVR1_RESERVED_1_RSVD_5_MAX (0x0000000FU)
2533 #define CSL_DSS_OVR1_RESERVED_1_RSVD_6_MASK (0x00000020U)
2534 #define CSL_DSS_OVR1_RESERVED_1_RSVD_6_SHIFT (0x00000005U)
2535 #define CSL_DSS_OVR1_RESERVED_1_RSVD_6_MAX (0x00000001U)
2540 #define CSL_DSS_OVR1_RESERVED_2_RSVD_0_MASK (0x0003FFC0U)
2541 #define CSL_DSS_OVR1_RESERVED_2_RSVD_0_SHIFT (0x00000006U)
2542 #define CSL_DSS_OVR1_RESERVED_2_RSVD_0_MAX (0x00000FFFU)
2544 #define CSL_DSS_OVR1_RESERVED_2_RSVD_1_MASK (0x00040000U)
2545 #define CSL_DSS_OVR1_RESERVED_2_RSVD_1_SHIFT (0x00000012U)
2546 #define CSL_DSS_OVR1_RESERVED_2_RSVD_1_MAX (0x00000001U)
2548 #define CSL_DSS_OVR1_RESERVED_2_RSVD_2_MASK (0x7FF80000U)
2549 #define CSL_DSS_OVR1_RESERVED_2_RSVD_2_SHIFT (0x00000013U)
2550 #define CSL_DSS_OVR1_RESERVED_2_RSVD_2_MAX (0x00000FFFU)
2552 #define CSL_DSS_OVR1_RESERVED_2_RSVD_3_MASK (0x80000000U)
2553 #define CSL_DSS_OVR1_RESERVED_2_RSVD_3_SHIFT (0x0000001FU)
2554 #define CSL_DSS_OVR1_RESERVED_2_RSVD_3_MAX (0x00000001U)
2556 #define CSL_DSS_OVR1_RESERVED_2_RSVD_4_MASK (0x00000001U)
2557 #define CSL_DSS_OVR1_RESERVED_2_RSVD_4_SHIFT (0x00000000U)
2558 #define CSL_DSS_OVR1_RESERVED_2_RSVD_4_MAX (0x00000001U)
2560 #define CSL_DSS_OVR1_RESERVED_2_RSVD_5_MASK (0x0000001EU)
2561 #define CSL_DSS_OVR1_RESERVED_2_RSVD_5_SHIFT (0x00000001U)
2562 #define CSL_DSS_OVR1_RESERVED_2_RSVD_5_MAX (0x0000000FU)
2564 #define CSL_DSS_OVR1_RESERVED_2_RSVD_6_MASK (0x00000020U)
2565 #define CSL_DSS_OVR1_RESERVED_2_RSVD_6_SHIFT (0x00000005U)
2566 #define CSL_DSS_OVR1_RESERVED_2_RSVD_6_MAX (0x00000001U)
2571 #define CSL_DSS_OVR1_RESERVED_3_RSVD_0_MASK (0x0003FFC0U)
2572 #define CSL_DSS_OVR1_RESERVED_3_RSVD_0_SHIFT (0x00000006U)
2573 #define CSL_DSS_OVR1_RESERVED_3_RSVD_0_MAX (0x00000FFFU)
2575 #define CSL_DSS_OVR1_RESERVED_3_RSVD_1_MASK (0x00040000U)
2576 #define CSL_DSS_OVR1_RESERVED_3_RSVD_1_SHIFT (0x00000012U)
2577 #define CSL_DSS_OVR1_RESERVED_3_RSVD_1_MAX (0x00000001U)
2579 #define CSL_DSS_OVR1_RESERVED_3_RSVD_2_MASK (0x7FF80000U)
2580 #define CSL_DSS_OVR1_RESERVED_3_RSVD_2_SHIFT (0x00000013U)
2581 #define CSL_DSS_OVR1_RESERVED_3_RSVD_2_MAX (0x00000FFFU)
2583 #define CSL_DSS_OVR1_RESERVED_3_RSVD_3_MASK (0x80000000U)
2584 #define CSL_DSS_OVR1_RESERVED_3_RSVD_3_SHIFT (0x0000001FU)
2585 #define CSL_DSS_OVR1_RESERVED_3_RSVD_3_MAX (0x00000001U)
2587 #define CSL_DSS_OVR1_RESERVED_3_RSVD_4_MASK (0x00000001U)
2588 #define CSL_DSS_OVR1_RESERVED_3_RSVD_4_SHIFT (0x00000000U)
2589 #define CSL_DSS_OVR1_RESERVED_3_RSVD_4_MAX (0x00000001U)
2591 #define CSL_DSS_OVR1_RESERVED_3_RSVD_5_MASK (0x0000001EU)
2592 #define CSL_DSS_OVR1_RESERVED_3_RSVD_5_SHIFT (0x00000001U)
2593 #define CSL_DSS_OVR1_RESERVED_3_RSVD_5_MAX (0x0000000FU)
2595 #define CSL_DSS_OVR1_RESERVED_3_RSVD_6_MASK (0x00000020U)
2596 #define CSL_DSS_OVR1_RESERVED_3_RSVD_6_SHIFT (0x00000005U)
2597 #define CSL_DSS_OVR1_RESERVED_3_RSVD_6_MAX (0x00000001U)
2618 volatile uint8_t Resv_68[36];
2620 volatile uint8_t Resv_76[4];
2630 volatile uint32_t SAFETY_ATTRIBUTES[4U];
2631 volatile uint8_t Resv_144[16];
2632 volatile uint32_t SAFETY_CAPT_SIGNATURE[4U];
2633 volatile uint8_t Resv_176[16];
2634 volatile uint32_t SAFETY_POSITION[4U];
2635 volatile uint8_t Resv_208[16];
2636 volatile uint32_t SAFETY_REF_SIGNATURE[4U];
2637 volatile uint8_t Resv_240[16];
2638 volatile uint32_t SAFETY_SIZE[4U];
2639 volatile uint8_t Resv_272[16];
2641 volatile uint8_t Resv_288[12];
2668 #define CSL_DSS_VP1_CONFIG (0x00000000U)
2669 #define CSL_DSS_VP1_CONTROL (0x00000004U)
2670 #define CSL_DSS_VP1_CSC_COEF0 (0x00000008U)
2671 #define CSL_DSS_VP1_CSC_COEF1 (0x0000000CU)
2672 #define CSL_DSS_VP1_CSC_COEF2 (0x00000010U)
2673 #define CSL_DSS_VP1_DATA_CYCLE_0 (0x00000014U)
2674 #define CSL_DSS_VP1_DATA_CYCLE_1 (0x00000018U)
2675 #define CSL_DSS_VP1_DATA_CYCLE_2 (0x0000001CU)
2676 #define CSL_DSS_VP1_LINE_NUMBER (0x00000044U)
2677 #define CSL_DSS_VP1_POL_FREQ (0x0000004CU)
2678 #define CSL_DSS_VP1_SIZE_SCREEN (0x00000050U)
2679 #define CSL_DSS_VP1_TIMING_H (0x00000054U)
2680 #define CSL_DSS_VP1_TIMING_V (0x00000058U)
2681 #define CSL_DSS_VP1_CSC_COEF3 (0x0000005CU)
2682 #define CSL_DSS_VP1_CSC_COEF4 (0x00000060U)
2683 #define CSL_DSS_VP1_CSC_COEF5 (0x00000064U)
2684 #define CSL_DSS_VP1_CSC_COEF6 (0x00000068U)
2685 #define CSL_DSS_VP1_CSC_COEF7 (0x0000006CU)
2686 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES(index) (0x00000070U+((uint32_t)(index)*0x4U))
2687 #define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE(index) (0x00000090U+((uint32_t)(index)*0x4U))
2688 #define CSL_DSS_VP1_SAFETY_POSITION(index) (0x000000B0U+((uint32_t)(index)*0x4U))
2689 #define CSL_DSS_VP1_SAFETY_REF_SIGNATURE(index) (0x000000D0U+((uint32_t)(index)*0x4U))
2690 #define CSL_DSS_VP1_SAFETY_SIZE(index) (0x000000F0U+((uint32_t)(index)*0x4U))
2691 #define CSL_DSS_VP1_SAFETY_LFSR_SEED (0x00000110U)
2692 #define CSL_DSS_VP1_GAMMA_TABLE_0 (0x00000120U)
2693 #define CSL_DSS_VP1_GAMMA_TABLE_1 (0x00000124U)
2694 #define CSL_DSS_VP1_GAMMA_TABLE_2 (0x00000128U)
2695 #define CSL_DSS_VP1_GAMMA_TABLE_3 (0x0000012CU)
2696 #define CSL_DSS_VP1_GAMMA_TABLE_4 (0x00000130U)
2697 #define CSL_DSS_VP1_GAMMA_TABLE_5 (0x00000134U)
2698 #define CSL_DSS_VP1_GAMMA_TABLE_6 (0x00000138U)
2699 #define CSL_DSS_VP1_GAMMA_TABLE_7 (0x0000013CU)
2700 #define CSL_DSS_VP1_GAMMA_TABLE_8 (0x00000140U)
2701 #define CSL_DSS_VP1_GAMMA_TABLE_9 (0x00000144U)
2702 #define CSL_DSS_VP1_GAMMA_TABLE_10 (0x00000148U)
2703 #define CSL_DSS_VP1_GAMMA_TABLE_11 (0x0000014CU)
2704 #define CSL_DSS_VP1_GAMMA_TABLE_12 (0x00000150U)
2705 #define CSL_DSS_VP1_GAMMA_TABLE_13 (0x00000154U)
2706 #define CSL_DSS_VP1_GAMMA_TABLE_14 (0x00000158U)
2707 #define CSL_DSS_VP1_GAMMA_TABLE_15 (0x0000015CU)
2708 #define CSL_DSS_VP1_DSS_OLDI_CFG (0x00000160U)
2709 #define CSL_DSS_VP1_DSS_OLDI_STATUS (0x00000164U)
2710 #define CSL_DSS_VP1_DSS_OLDI_LB (0x00000168U)
2719 #define CSL_DSS_VP1_CONFIG_PIXELGATED_MASK (0x00000001U)
2720 #define CSL_DSS_VP1_CONFIG_PIXELGATED_SHIFT (0x00000000U)
2721 #define CSL_DSS_VP1_CONFIG_PIXELGATED_MAX (0x00000001U)
2723 #define CSL_DSS_VP1_CONFIG_PIXELGATED_VAL_PCLKTOGA (0x0U)
2724 #define CSL_DSS_VP1_CONFIG_PIXELGATED_VAL_PCLKTOGV (0x1U)
2726 #define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_MASK (0x00000002U)
2727 #define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_SHIFT (0x00000001U)
2728 #define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_MAX (0x00000001U)
2730 #define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_VAL_DEGDIS (0x0U)
2731 #define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_VAL_DEGENB (0x1U)
2733 #define CSL_DSS_VP1_CONFIG_GAMMAENABLE_MASK (0x00000004U)
2734 #define CSL_DSS_VP1_CONFIG_GAMMAENABLE_SHIFT (0x00000002U)
2735 #define CSL_DSS_VP1_CONFIG_GAMMAENABLE_MAX (0x00000001U)
2737 #define CSL_DSS_VP1_CONFIG_GAMMAENABLE_VAL_GAMMADIS (0x0U)
2738 #define CSL_DSS_VP1_CONFIG_GAMMAENABLE_VAL_GAMMAENB (0x1U)
2740 #define CSL_DSS_VP1_CONFIG_HDMIMODE_MASK (0x00000008U)
2741 #define CSL_DSS_VP1_CONFIG_HDMIMODE_SHIFT (0x00000003U)
2742 #define CSL_DSS_VP1_CONFIG_HDMIMODE_MAX (0x00000001U)
2744 #define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_MASK (0x00000010U)
2745 #define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_SHIFT (0x00000004U)
2746 #define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_MAX (0x00000001U)
2748 #define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_VAL_PDGDIS (0x0U)
2749 #define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_VAL_PDGENB (0x1U)
2751 #define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_MASK (0x00000020U)
2752 #define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_SHIFT (0x00000005U)
2753 #define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_MAX (0x00000001U)
2755 #define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS (0x0U)
2756 #define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_VAL_PCGENB (0x1U)
2758 #define CSL_DSS_VP1_CONFIG_HSYNCGATED_MASK (0x00000040U)
2759 #define CSL_DSS_VP1_CONFIG_HSYNCGATED_SHIFT (0x00000006U)
2760 #define CSL_DSS_VP1_CONFIG_HSYNCGATED_MAX (0x00000001U)
2762 #define CSL_DSS_VP1_CONFIG_HSYNCGATED_VAL_HGDIS (0x0U)
2763 #define CSL_DSS_VP1_CONFIG_HSYNCGATED_VAL_HGENB (0x1U)
2765 #define CSL_DSS_VP1_CONFIG_VSYNCGATED_MASK (0x00000080U)
2766 #define CSL_DSS_VP1_CONFIG_VSYNCGATED_SHIFT (0x00000007U)
2767 #define CSL_DSS_VP1_CONFIG_VSYNCGATED_MAX (0x00000001U)
2769 #define CSL_DSS_VP1_CONFIG_VSYNCGATED_VAL_VGDIS (0x0U)
2770 #define CSL_DSS_VP1_CONFIG_VSYNCGATED_VAL_VGENB (0x1U)
2772 #define CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_MASK (0x00000100U)
2773 #define CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_SHIFT (0x00000008U)
2774 #define CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_MAX (0x00000001U)
2776 #define CSL_DSS_VP1_CONFIG_RESERVED1_MASK (0x00007E00U)
2777 #define CSL_DSS_VP1_CONFIG_RESERVED1_SHIFT (0x00000009U)
2778 #define CSL_DSS_VP1_CONFIG_RESERVED1_MAX (0x0000003FU)
2780 #define CSL_DSS_VP1_CONFIG_CPR_MASK (0x00008000U)
2781 #define CSL_DSS_VP1_CONFIG_CPR_SHIFT (0x0000000FU)
2782 #define CSL_DSS_VP1_CONFIG_CPR_MAX (0x00000001U)
2784 #define CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_MASK (0x00010000U)
2785 #define CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_SHIFT (0x00000010U)
2786 #define CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_MAX (0x00000001U)
2788 #define CSL_DSS_VP1_CONFIG_RESERVED2_MASK (0x000E0000U)
2789 #define CSL_DSS_VP1_CONFIG_RESERVED2_SHIFT (0x00000011U)
2790 #define CSL_DSS_VP1_CONFIG_RESERVED2_MAX (0x00000007U)
2792 #define CSL_DSS_VP1_CONFIG_BT656ENABLE_MASK (0x00100000U)
2793 #define CSL_DSS_VP1_CONFIG_BT656ENABLE_SHIFT (0x00000014U)
2794 #define CSL_DSS_VP1_CONFIG_BT656ENABLE_MAX (0x00000001U)
2796 #define CSL_DSS_VP1_CONFIG_BT656ENABLE_VAL_DISABLE (0x0U)
2797 #define CSL_DSS_VP1_CONFIG_BT656ENABLE_VAL_ENABLE (0x1U)
2799 #define CSL_DSS_VP1_CONFIG_BT1120ENABLE_MASK (0x00200000U)
2800 #define CSL_DSS_VP1_CONFIG_BT1120ENABLE_SHIFT (0x00000015U)
2801 #define CSL_DSS_VP1_CONFIG_BT1120ENABLE_MAX (0x00000001U)
2803 #define CSL_DSS_VP1_CONFIG_BT1120ENABLE_VAL_DISABLE (0x0U)
2804 #define CSL_DSS_VP1_CONFIG_BT1120ENABLE_VAL_ENABLE (0x1U)
2806 #define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_MASK (0x00400000U)
2807 #define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_SHIFT (0x00000016U)
2808 #define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_MAX (0x00000001U)
2810 #define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE (0x0U)
2811 #define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE (0x1U)
2813 #define CSL_DSS_VP1_CONFIG_FIDFIRST_MASK (0x00800000U)
2814 #define CSL_DSS_VP1_CONFIG_FIDFIRST_SHIFT (0x00000017U)
2815 #define CSL_DSS_VP1_CONFIG_FIDFIRST_MAX (0x00000001U)
2817 #define CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_EVEN (0x0U)
2818 #define CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_ODD (0x1U)
2820 #define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_MASK (0x01000000U)
2821 #define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_SHIFT (0x00000018U)
2822 #define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_MAX (0x00000001U)
2824 #define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS (0x0U)
2825 #define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_VAL_COLSPCENB (0x1U)
2827 #define CSL_DSS_VP1_CONFIG_FULLRANGE_MASK (0x02000000U)
2828 #define CSL_DSS_VP1_CONFIG_FULLRANGE_SHIFT (0x00000019U)
2829 #define CSL_DSS_VP1_CONFIG_FULLRANGE_MAX (0x00000001U)
2831 #define CSL_DSS_VP1_CONFIG_FULLRANGE_VAL_LIMRANGE (0x0U)
2832 #define CSL_DSS_VP1_CONFIG_FULLRANGE_VAL_FULLRANGE (0x1U)
2834 #define CSL_DSS_VP1_CONFIG_COLORCONVPOS_MASK (0x04000000U)
2835 #define CSL_DSS_VP1_CONFIG_COLORCONVPOS_SHIFT (0x0000001AU)
2836 #define CSL_DSS_VP1_CONFIG_COLORCONVPOS_MAX (0x00000001U)
2838 #define CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA (0x0U)
2839 #define CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA (0x1U)
2841 #define CSL_DSS_VP1_CONFIG_RESERVED3_MASK (0xF8000000U)
2842 #define CSL_DSS_VP1_CONFIG_RESERVED3_SHIFT (0x0000001BU)
2843 #define CSL_DSS_VP1_CONFIG_RESERVED3_MAX (0x0000001FU)
2848 #define CSL_DSS_VP1_CONTROL_ENABLE_MASK (0x00000001U)
2849 #define CSL_DSS_VP1_CONTROL_ENABLE_SHIFT (0x00000000U)
2850 #define CSL_DSS_VP1_CONTROL_ENABLE_MAX (0x00000001U)
2852 #define CSL_DSS_VP1_CONTROL_ENABLE_VAL_LCDOPDIS (0x0U)
2853 #define CSL_DSS_VP1_CONTROL_ENABLE_VAL_LCDOPENB (0x1U)
2855 #define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_MASK (0x00000002U)
2856 #define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_SHIFT (0x00000001U)
2857 #define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_MAX (0x00000001U)
2859 #define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS (0x0U)
2860 #define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN (0x1U)
2862 #define CSL_DSS_VP1_CONTROL_MONOCOLOR_MASK (0x00000004U)
2863 #define CSL_DSS_VP1_CONTROL_MONOCOLOR_SHIFT (0x00000002U)
2864 #define CSL_DSS_VP1_CONTROL_MONOCOLOR_MAX (0x00000001U)
2866 #define CSL_DSS_VP1_CONTROL_STN_MASK (0x00000008U)
2867 #define CSL_DSS_VP1_CONTROL_STN_SHIFT (0x00000003U)
2868 #define CSL_DSS_VP1_CONTROL_STN_MAX (0x00000001U)
2870 #define CSL_DSS_VP1_CONTROL_M8B_MASK (0x00000010U)
2871 #define CSL_DSS_VP1_CONTROL_M8B_SHIFT (0x00000004U)
2872 #define CSL_DSS_VP1_CONTROL_M8B_MAX (0x00000001U)
2874 #define CSL_DSS_VP1_CONTROL_GOBIT_MASK (0x00000020U)
2875 #define CSL_DSS_VP1_CONTROL_GOBIT_SHIFT (0x00000005U)
2876 #define CSL_DSS_VP1_CONTROL_GOBIT_MAX (0x00000001U)
2878 #define CSL_DSS_VP1_CONTROL_GOBIT_VAL_HFUISR (0x0U)
2879 #define CSL_DSS_VP1_CONTROL_GOBIT_VAL_UFPSR (0x1U)
2881 #define CSL_DSS_VP1_CONTROL_DPIENABLE_MASK (0x00000040U)
2882 #define CSL_DSS_VP1_CONTROL_DPIENABLE_SHIFT (0x00000006U)
2883 #define CSL_DSS_VP1_CONTROL_DPIENABLE_MAX (0x00000001U)
2885 #define CSL_DSS_VP1_CONTROL_DPIENABLE_VAL_DPIOPDIS (0x0U)
2886 #define CSL_DSS_VP1_CONTROL_DPIENABLE_VAL_DPIOPENB (0x1U)
2888 #define CSL_DSS_VP1_CONTROL_STDITHERENABLE_MASK (0x00000080U)
2889 #define CSL_DSS_VP1_CONTROL_STDITHERENABLE_SHIFT (0x00000007U)
2890 #define CSL_DSS_VP1_CONTROL_STDITHERENABLE_MAX (0x00000001U)
2892 #define CSL_DSS_VP1_CONTROL_STDITHERENABLE_VAL_STDITHDIS (0x0U)
2893 #define CSL_DSS_VP1_CONTROL_STDITHERENABLE_VAL_STDITHENB (0x1U)
2895 #define CSL_DSS_VP1_CONTROL_DATALINES_MASK (0x00000700U)
2896 #define CSL_DSS_VP1_CONTROL_DATALINES_SHIFT (0x00000008U)
2897 #define CSL_DSS_VP1_CONTROL_DATALINES_MAX (0x00000007U)
2899 #define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB12B (0x0U)
2900 #define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB16B (0x1U)
2901 #define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB18B (0x2U)
2902 #define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB24B (0x3U)
2903 #define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB30B (0x4U)
2904 #define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB36B (0x5U)
2906 #define CSL_DSS_VP1_CONTROL_STALLMODE_MASK (0x00000800U)
2907 #define CSL_DSS_VP1_CONTROL_STALLMODE_SHIFT (0x0000000BU)
2908 #define CSL_DSS_VP1_CONTROL_STALLMODE_MAX (0x00000001U)
2910 #define CSL_DSS_VP1_CONTROL_RESERVED6_MASK (0x00001000U)
2911 #define CSL_DSS_VP1_CONTROL_RESERVED6_SHIFT (0x0000000CU)
2912 #define CSL_DSS_VP1_CONTROL_RESERVED6_MAX (0x00000001U)
2914 #define CSL_DSS_VP1_CONTROL_RESERVED3_MASK (0x00002000U)
2915 #define CSL_DSS_VP1_CONTROL_RESERVED3_SHIFT (0x0000000DU)
2916 #define CSL_DSS_VP1_CONTROL_RESERVED3_MAX (0x00000001U)
2918 #define CSL_DSS_VP1_CONTROL_HT_MASK (0x0001C000U)
2919 #define CSL_DSS_VP1_CONTROL_HT_SHIFT (0x0000000EU)
2920 #define CSL_DSS_VP1_CONTROL_HT_MAX (0x00000007U)
2922 #define CSL_DSS_VP1_CONTROL_RESERVED1_MASK (0x000E0000U)
2923 #define CSL_DSS_VP1_CONTROL_RESERVED1_SHIFT (0x00000011U)
2924 #define CSL_DSS_VP1_CONTROL_RESERVED1_MAX (0x00000007U)
2926 #define CSL_DSS_VP1_CONTROL_TDMENABLE_MASK (0x00100000U)
2927 #define CSL_DSS_VP1_CONTROL_TDMENABLE_SHIFT (0x00000014U)
2928 #define CSL_DSS_VP1_CONTROL_TDMENABLE_MAX (0x00000001U)
2930 #define CSL_DSS_VP1_CONTROL_TDMENABLE_VAL_TDMDIS (0x0U)
2931 #define CSL_DSS_VP1_CONTROL_TDMENABLE_VAL_TDMENB (0x1U)
2933 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_MASK (0x00600000U)
2934 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_SHIFT (0x00000015U)
2935 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_MAX (0x00000003U)
2937 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT (0x0U)
2938 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT (0x1U)
2939 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT (0x2U)
2940 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT (0x3U)
2942 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_MASK (0x01800000U)
2943 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_SHIFT (0x00000017U)
2944 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_MAX (0x00000003U)
2946 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX (0x0U)
2947 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX (0x1U)
2948 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX (0x2U)
2949 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX (0x3U)
2951 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_MASK (0x06000000U)
2952 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_SHIFT (0x00000019U)
2953 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_MAX (0x00000003U)
2955 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL (0x0U)
2956 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL (0x1U)
2957 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED (0x2U)
2958 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_RES (0x3U)
2960 #define CSL_DSS_VP1_CONTROL_RESERVED_MASK (0x38000000U)
2961 #define CSL_DSS_VP1_CONTROL_RESERVED_SHIFT (0x0000001BU)
2962 #define CSL_DSS_VP1_CONTROL_RESERVED_MAX (0x00000007U)
2964 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK (0xC0000000U)
2965 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT (0x0000001EU)
2966 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX (0x00000003U)
2968 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME (0x0U)
2969 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES (0x1U)
2970 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES (0x2U)
2971 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED (0x3U)
2976 #define CSL_DSS_VP1_CSC_COEF0_C00_MASK (0x000007FFU)
2977 #define CSL_DSS_VP1_CSC_COEF0_C00_SHIFT (0x00000000U)
2978 #define CSL_DSS_VP1_CSC_COEF0_C00_MAX (0x000007FFU)
2980 #define CSL_DSS_VP1_CSC_COEF0_RESERVED_53_MASK (0x0000F800U)
2981 #define CSL_DSS_VP1_CSC_COEF0_RESERVED_53_SHIFT (0x0000000BU)
2982 #define CSL_DSS_VP1_CSC_COEF0_RESERVED_53_MAX (0x0000001FU)
2984 #define CSL_DSS_VP1_CSC_COEF0_C01_MASK (0x07FF0000U)
2985 #define CSL_DSS_VP1_CSC_COEF0_C01_SHIFT (0x00000010U)
2986 #define CSL_DSS_VP1_CSC_COEF0_C01_MAX (0x000007FFU)
2988 #define CSL_DSS_VP1_CSC_COEF0_RESERVED_52_MASK (0xF8000000U)
2989 #define CSL_DSS_VP1_CSC_COEF0_RESERVED_52_SHIFT (0x0000001BU)
2990 #define CSL_DSS_VP1_CSC_COEF0_RESERVED_52_MAX (0x0000001FU)
2995 #define CSL_DSS_VP1_CSC_COEF1_C02_MASK (0x000007FFU)
2996 #define CSL_DSS_VP1_CSC_COEF1_C02_SHIFT (0x00000000U)
2997 #define CSL_DSS_VP1_CSC_COEF1_C02_MAX (0x000007FFU)
2999 #define CSL_DSS_VP1_CSC_COEF1_RESERVED_55_MASK (0x0000F800U)
3000 #define CSL_DSS_VP1_CSC_COEF1_RESERVED_55_SHIFT (0x0000000BU)
3001 #define CSL_DSS_VP1_CSC_COEF1_RESERVED_55_MAX (0x0000001FU)
3003 #define CSL_DSS_VP1_CSC_COEF1_C10_MASK (0x07FF0000U)
3004 #define CSL_DSS_VP1_CSC_COEF1_C10_SHIFT (0x00000010U)
3005 #define CSL_DSS_VP1_CSC_COEF1_C10_MAX (0x000007FFU)
3007 #define CSL_DSS_VP1_CSC_COEF1_RESERVED_54_MASK (0xF8000000U)
3008 #define CSL_DSS_VP1_CSC_COEF1_RESERVED_54_SHIFT (0x0000001BU)
3009 #define CSL_DSS_VP1_CSC_COEF1_RESERVED_54_MAX (0x0000001FU)
3014 #define CSL_DSS_VP1_CSC_COEF2_C11_MASK (0x000007FFU)
3015 #define CSL_DSS_VP1_CSC_COEF2_C11_SHIFT (0x00000000U)
3016 #define CSL_DSS_VP1_CSC_COEF2_C11_MAX (0x000007FFU)
3018 #define CSL_DSS_VP1_CSC_COEF2_RESERVED_57_MASK (0x0000F800U)
3019 #define CSL_DSS_VP1_CSC_COEF2_RESERVED_57_SHIFT (0x0000000BU)
3020 #define CSL_DSS_VP1_CSC_COEF2_RESERVED_57_MAX (0x0000001FU)
3022 #define CSL_DSS_VP1_CSC_COEF2_C12_MASK (0x07FF0000U)
3023 #define CSL_DSS_VP1_CSC_COEF2_C12_SHIFT (0x00000010U)
3024 #define CSL_DSS_VP1_CSC_COEF2_C12_MAX (0x000007FFU)
3026 #define CSL_DSS_VP1_CSC_COEF2_RESERVED_56_MASK (0xF8000000U)
3027 #define CSL_DSS_VP1_CSC_COEF2_RESERVED_56_SHIFT (0x0000001BU)
3028 #define CSL_DSS_VP1_CSC_COEF2_RESERVED_56_MAX (0x0000001FU)
3033 #define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_MASK (0x0000001FU)
3034 #define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT (0x00000000U)
3035 #define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_MAX (0x0000001FU)
3037 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_MASK (0x000000E0U)
3038 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_SHIFT (0x00000005U)
3039 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_MAX (0x00000007U)
3041 #define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK (0x00000F00U)
3042 #define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT (0x00000008U)
3043 #define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX (0x0000000FU)
3045 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_MASK (0x0000F000U)
3046 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_SHIFT (0x0000000CU)
3047 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_MAX (0x0000000FU)
3049 #define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_MASK (0x001F0000U)
3050 #define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT (0x00000010U)
3051 #define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_MAX (0x0000001FU)
3053 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_MASK (0x00E00000U)
3054 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_SHIFT (0x00000015U)
3055 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_MAX (0x00000007U)
3057 #define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK (0x0F000000U)
3058 #define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT (0x00000018U)
3059 #define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX (0x0000000FU)
3061 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_MASK (0xF0000000U)
3062 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_SHIFT (0x0000001CU)
3063 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_MAX (0x0000000FU)
3068 #define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_MASK (0x0000001FU)
3069 #define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT (0x00000000U)
3070 #define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_MAX (0x0000001FU)
3072 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_MASK (0x000000E0U)
3073 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_SHIFT (0x00000005U)
3074 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_MAX (0x00000007U)
3076 #define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK (0x00000F00U)
3077 #define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT (0x00000008U)
3078 #define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX (0x0000000FU)
3080 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_MASK (0x0000F000U)
3081 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_SHIFT (0x0000000CU)
3082 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_MAX (0x0000000FU)
3084 #define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_MASK (0x001F0000U)
3085 #define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT (0x00000010U)
3086 #define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_MAX (0x0000001FU)
3088 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_MASK (0x00E00000U)
3089 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_SHIFT (0x00000015U)
3090 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_MAX (0x00000007U)
3092 #define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK (0x0F000000U)
3093 #define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT (0x00000018U)
3094 #define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX (0x0000000FU)
3096 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_MASK (0xF0000000U)
3097 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_SHIFT (0x0000001CU)
3098 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_MAX (0x0000000FU)
3103 #define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_MASK (0x0000001FU)
3104 #define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT (0x00000000U)
3105 #define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_MAX (0x0000001FU)
3107 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_MASK (0x000000E0U)
3108 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_SHIFT (0x00000005U)
3109 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_MAX (0x00000007U)
3111 #define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK (0x00000F00U)
3112 #define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT (0x00000008U)
3113 #define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX (0x0000000FU)
3115 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_MASK (0x0000F000U)
3116 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_SHIFT (0x0000000CU)
3117 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_MAX (0x0000000FU)
3119 #define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_MASK (0x001F0000U)
3120 #define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT (0x00000010U)
3121 #define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_MAX (0x0000001FU)
3123 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_MASK (0x00E00000U)
3124 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_SHIFT (0x00000015U)
3125 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_MAX (0x00000007U)
3127 #define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK (0x0F000000U)
3128 #define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT (0x00000018U)
3129 #define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX (0x0000000FU)
3131 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_MASK (0xF0000000U)
3132 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_SHIFT (0x0000001CU)
3133 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_MAX (0x0000000FU)
3138 #define CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_MASK (0x00000FFFU)
3139 #define CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_SHIFT (0x00000000U)
3140 #define CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_MAX (0x00000FFFU)
3142 #define CSL_DSS_VP1_LINE_NUMBER_RESERVED_MASK (0xFFFFF000U)
3143 #define CSL_DSS_VP1_LINE_NUMBER_RESERVED_SHIFT (0x0000000CU)
3144 #define CSL_DSS_VP1_LINE_NUMBER_RESERVED_MAX (0x000FFFFFU)
3149 #define CSL_DSS_VP1_POL_FREQ_ACB_MASK (0x000000FFU)
3150 #define CSL_DSS_VP1_POL_FREQ_ACB_SHIFT (0x00000000U)
3151 #define CSL_DSS_VP1_POL_FREQ_ACB_MAX (0x000000FFU)
3153 #define CSL_DSS_VP1_POL_FREQ_ACBI_MASK (0x00000F00U)
3154 #define CSL_DSS_VP1_POL_FREQ_ACBI_SHIFT (0x00000008U)
3155 #define CSL_DSS_VP1_POL_FREQ_ACBI_MAX (0x0000000FU)
3157 #define CSL_DSS_VP1_POL_FREQ_IVS_MASK (0x00001000U)
3158 #define CSL_DSS_VP1_POL_FREQ_IVS_SHIFT (0x0000000CU)
3159 #define CSL_DSS_VP1_POL_FREQ_IVS_MAX (0x00000001U)
3161 #define CSL_DSS_VP1_POL_FREQ_IVS_VAL_FCKPINAH (0x0U)
3162 #define CSL_DSS_VP1_POL_FREQ_IVS_VAL_FCKPINAL (0x1U)
3164 #define CSL_DSS_VP1_POL_FREQ_IHS_MASK (0x00002000U)
3165 #define CSL_DSS_VP1_POL_FREQ_IHS_SHIFT (0x0000000DU)
3166 #define CSL_DSS_VP1_POL_FREQ_IHS_MAX (0x00000001U)
3168 #define CSL_DSS_VP1_POL_FREQ_IHS_VAL_LCKPINAH (0x0U)
3169 #define CSL_DSS_VP1_POL_FREQ_IHS_VAL_LCKPINAL (0x1U)
3171 #define CSL_DSS_VP1_POL_FREQ_IPC_MASK (0x00004000U)
3172 #define CSL_DSS_VP1_POL_FREQ_IPC_SHIFT (0x0000000EU)
3173 #define CSL_DSS_VP1_POL_FREQ_IPC_MAX (0x00000001U)
3175 #define CSL_DSS_VP1_POL_FREQ_IPC_VAL_DRPCK (0x0U)
3176 #define CSL_DSS_VP1_POL_FREQ_IPC_VAL_DFPCK (0x1U)
3178 #define CSL_DSS_VP1_POL_FREQ_IEO_MASK (0x00008000U)
3179 #define CSL_DSS_VP1_POL_FREQ_IEO_SHIFT (0x0000000FU)
3180 #define CSL_DSS_VP1_POL_FREQ_IEO_MAX (0x00000001U)
3182 #define CSL_DSS_VP1_POL_FREQ_IEO_VAL_ACBAHIGH (0x0U)
3183 #define CSL_DSS_VP1_POL_FREQ_IEO_VAL_ACBALOW (0x1U)
3185 #define CSL_DSS_VP1_POL_FREQ_RF_MASK (0x00010000U)
3186 #define CSL_DSS_VP1_POL_FREQ_RF_SHIFT (0x00000010U)
3187 #define CSL_DSS_VP1_POL_FREQ_RF_MAX (0x00000001U)
3189 #define CSL_DSS_VP1_POL_FREQ_RF_VAL_DFEDPCK (0x0U)
3190 #define CSL_DSS_VP1_POL_FREQ_RF_VAL_DRIEDPCK (0x1U)
3192 #define CSL_DSS_VP1_POL_FREQ_ONOFF_MASK (0x00020000U)
3193 #define CSL_DSS_VP1_POL_FREQ_ONOFF_SHIFT (0x00000011U)
3194 #define CSL_DSS_VP1_POL_FREQ_ONOFF_MAX (0x00000001U)
3196 #define CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DOPEDPCK (0x0U)
3197 #define CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DBIT16 (0x1U)
3199 #define CSL_DSS_VP1_POL_FREQ_ALIGN_MASK (0x00040000U)
3200 #define CSL_DSS_VP1_POL_FREQ_ALIGN_SHIFT (0x00000012U)
3201 #define CSL_DSS_VP1_POL_FREQ_ALIGN_MAX (0x00000001U)
3203 #define CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_NOTALIGNED (0x0U)
3204 #define CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_ALIGNED (0x1U)
3206 #define CSL_DSS_VP1_POL_FREQ_RESERVED_MASK (0xFFF80000U)
3207 #define CSL_DSS_VP1_POL_FREQ_RESERVED_SHIFT (0x00000013U)
3208 #define CSL_DSS_VP1_POL_FREQ_RESERVED_MAX (0x00001FFFU)
3213 #define CSL_DSS_VP1_SIZE_SCREEN_PPL_MASK (0x00000FFFU)
3214 #define CSL_DSS_VP1_SIZE_SCREEN_PPL_SHIFT (0x00000000U)
3215 #define CSL_DSS_VP1_SIZE_SCREEN_PPL_MAX (0x00000FFFU)
3217 #define CSL_DSS_VP1_SIZE_SCREEN_RESERVED_MASK (0x00003000U)
3218 #define CSL_DSS_VP1_SIZE_SCREEN_RESERVED_SHIFT (0x0000000CU)
3219 #define CSL_DSS_VP1_SIZE_SCREEN_RESERVED_MAX (0x00000003U)
3221 #define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_MASK (0x0000C000U)
3222 #define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_SHIFT (0x0000000EU)
3223 #define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_MAX (0x00000003U)
3225 #define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_SAME (0x0U)
3226 #define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE (0x1U)
3227 #define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE (0x2U)
3229 #define CSL_DSS_VP1_SIZE_SCREEN_LPP_MASK (0x0FFF0000U)
3230 #define CSL_DSS_VP1_SIZE_SCREEN_LPP_SHIFT (0x00000010U)
3231 #define CSL_DSS_VP1_SIZE_SCREEN_LPP_MAX (0x00000FFFU)
3233 #define CSL_DSS_VP1_SIZE_SCREEN_RESERVED1_MASK (0xF0000000U)
3234 #define CSL_DSS_VP1_SIZE_SCREEN_RESERVED1_SHIFT (0x0000001CU)
3235 #define CSL_DSS_VP1_SIZE_SCREEN_RESERVED1_MAX (0x0000000FU)
3240 #define CSL_DSS_VP1_TIMING_H_HSW_MASK (0x000000FFU)
3241 #define CSL_DSS_VP1_TIMING_H_HSW_SHIFT (0x00000000U)
3242 #define CSL_DSS_VP1_TIMING_H_HSW_MAX (0x000000FFU)
3244 #define CSL_DSS_VP1_TIMING_H_HFP_MASK (0x000FFF00U)
3245 #define CSL_DSS_VP1_TIMING_H_HFP_SHIFT (0x00000008U)
3246 #define CSL_DSS_VP1_TIMING_H_HFP_MAX (0x00000FFFU)
3248 #define CSL_DSS_VP1_TIMING_H_HBP_MASK (0xFFF00000U)
3249 #define CSL_DSS_VP1_TIMING_H_HBP_SHIFT (0x00000014U)
3250 #define CSL_DSS_VP1_TIMING_H_HBP_MAX (0x00000FFFU)
3255 #define CSL_DSS_VP1_TIMING_V_VSW_MASK (0x000000FFU)
3256 #define CSL_DSS_VP1_TIMING_V_VSW_SHIFT (0x00000000U)
3257 #define CSL_DSS_VP1_TIMING_V_VSW_MAX (0x000000FFU)
3259 #define CSL_DSS_VP1_TIMING_V_VFP_MASK (0x000FFF00U)
3260 #define CSL_DSS_VP1_TIMING_V_VFP_SHIFT (0x00000008U)
3261 #define CSL_DSS_VP1_TIMING_V_VFP_MAX (0x00000FFFU)
3263 #define CSL_DSS_VP1_TIMING_V_VBP_MASK (0xFFF00000U)
3264 #define CSL_DSS_VP1_TIMING_V_VBP_SHIFT (0x00000014U)
3265 #define CSL_DSS_VP1_TIMING_V_VBP_MAX (0x00000FFFU)
3270 #define CSL_DSS_VP1_CSC_COEF3_C20_MASK (0x000007FFU)
3271 #define CSL_DSS_VP1_CSC_COEF3_C20_SHIFT (0x00000000U)
3272 #define CSL_DSS_VP1_CSC_COEF3_C20_MAX (0x000007FFU)
3274 #define CSL_DSS_VP1_CSC_COEF3_RESERVED_59_MASK (0x0000F800U)
3275 #define CSL_DSS_VP1_CSC_COEF3_RESERVED_59_SHIFT (0x0000000BU)
3276 #define CSL_DSS_VP1_CSC_COEF3_RESERVED_59_MAX (0x0000001FU)
3278 #define CSL_DSS_VP1_CSC_COEF3_C21_MASK (0x07FF0000U)
3279 #define CSL_DSS_VP1_CSC_COEF3_C21_SHIFT (0x00000010U)
3280 #define CSL_DSS_VP1_CSC_COEF3_C21_MAX (0x000007FFU)
3282 #define CSL_DSS_VP1_CSC_COEF3_RESERVED_58_MASK (0xF8000000U)
3283 #define CSL_DSS_VP1_CSC_COEF3_RESERVED_58_SHIFT (0x0000001BU)
3284 #define CSL_DSS_VP1_CSC_COEF3_RESERVED_58_MAX (0x0000001FU)
3289 #define CSL_DSS_VP1_CSC_COEF4_C22_MASK (0x000007FFU)
3290 #define CSL_DSS_VP1_CSC_COEF4_C22_SHIFT (0x00000000U)
3291 #define CSL_DSS_VP1_CSC_COEF4_C22_MAX (0x000007FFU)
3293 #define CSL_DSS_VP1_CSC_COEF4_RESERVED_60_MASK (0xFFFFF800U)
3294 #define CSL_DSS_VP1_CSC_COEF4_RESERVED_60_SHIFT (0x0000000BU)
3295 #define CSL_DSS_VP1_CSC_COEF4_RESERVED_60_MAX (0x001FFFFFU)
3300 #define CSL_DSS_VP1_CSC_COEF5_RESERVED_MASK (0x00000007U)
3301 #define CSL_DSS_VP1_CSC_COEF5_RESERVED_SHIFT (0x00000000U)
3302 #define CSL_DSS_VP1_CSC_COEF5_RESERVED_MAX (0x00000007U)
3304 #define CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_MASK (0x0000FFF8U)
3305 #define CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_SHIFT (0x00000003U)
3306 #define CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_MAX (0x00001FFFU)
3308 #define CSL_DSS_VP1_CSC_COEF5_RESERVED1_MASK (0x00070000U)
3309 #define CSL_DSS_VP1_CSC_COEF5_RESERVED1_SHIFT (0x00000010U)
3310 #define CSL_DSS_VP1_CSC_COEF5_RESERVED1_MAX (0x00000007U)
3312 #define CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_MASK (0xFFF80000U)
3313 #define CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_SHIFT (0x00000013U)
3314 #define CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_MAX (0x00001FFFU)
3319 #define CSL_DSS_VP1_CSC_COEF6_RESERVED_MASK (0x00000007U)
3320 #define CSL_DSS_VP1_CSC_COEF6_RESERVED_SHIFT (0x00000000U)
3321 #define CSL_DSS_VP1_CSC_COEF6_RESERVED_MAX (0x00000007U)
3323 #define CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_MASK (0x0000FFF8U)
3324 #define CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_SHIFT (0x00000003U)
3325 #define CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_MAX (0x00001FFFU)
3327 #define CSL_DSS_VP1_CSC_COEF6_RESERVED1_MASK (0x00070000U)
3328 #define CSL_DSS_VP1_CSC_COEF6_RESERVED1_SHIFT (0x00000010U)
3329 #define CSL_DSS_VP1_CSC_COEF6_RESERVED1_MAX (0x00000007U)
3331 #define CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_MASK (0xFFF80000U)
3332 #define CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_SHIFT (0x00000013U)
3333 #define CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_MAX (0x00001FFFU)
3338 #define CSL_DSS_VP1_CSC_COEF7_RESERVED_MASK (0x00000007U)
3339 #define CSL_DSS_VP1_CSC_COEF7_RESERVED_SHIFT (0x00000000U)
3340 #define CSL_DSS_VP1_CSC_COEF7_RESERVED_MAX (0x00000007U)
3342 #define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_MASK (0x0000FFF8U)
3343 #define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_SHIFT (0x00000003U)
3344 #define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_MAX (0x00001FFFU)
3346 #define CSL_DSS_VP1_CSC_COEF7_RESERVED1_MASK (0x00070000U)
3347 #define CSL_DSS_VP1_CSC_COEF7_RESERVED1_SHIFT (0x00000010U)
3348 #define CSL_DSS_VP1_CSC_COEF7_RESERVED1_MAX (0x00000007U)
3350 #define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_MASK (0xFFF80000U)
3351 #define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_SHIFT (0x00000013U)
3352 #define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_MAX (0x00001FFFU)
3356 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_MASK (0x00000001U)
3357 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_SHIFT (0x00000000U)
3358 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_MAX (0x00000001U)
3360 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK (0x00000002U)
3361 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT (0x00000001U)
3362 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX (0x00000001U)
3364 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE (0x0U)
3365 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK (0x1U)
3367 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK (0x00000004U)
3368 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT (0x00000002U)
3369 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX (0x00000001U)
3371 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE (0x0U)
3372 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE (0x1U)
3374 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_MASK (0x000007F8U)
3375 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT (0x00000003U)
3376 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_MAX (0x000000FFU)
3378 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK (0x00001800U)
3379 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT (0x0000000BU)
3380 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX (0x00000003U)
3382 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP (0x0U)
3383 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN (0x1U)
3384 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD (0x2U)
3385 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED (0x3U)
3387 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_MASK (0xFFFFE000U)
3388 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_SHIFT (0x0000000DU)
3389 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_MAX (0x0007FFFFU)
3393 #define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK (0xFFFFFFFFU)
3394 #define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT (0x00000000U)
3395 #define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX (0xFFFFFFFFU)
3399 #define CSL_DSS_VP1_SAFETY_POSITION_POSX_MASK (0x00000FFFU)
3400 #define CSL_DSS_VP1_SAFETY_POSITION_POSX_SHIFT (0x00000000U)
3401 #define CSL_DSS_VP1_SAFETY_POSITION_POSX_MAX (0x00000FFFU)
3403 #define CSL_DSS_VP1_SAFETY_POSITION_RESERVED1_MASK (0x0000F000U)
3404 #define CSL_DSS_VP1_SAFETY_POSITION_RESERVED1_SHIFT (0x0000000CU)
3405 #define CSL_DSS_VP1_SAFETY_POSITION_RESERVED1_MAX (0x0000000FU)
3407 #define CSL_DSS_VP1_SAFETY_POSITION_POSY_MASK (0x0FFF0000U)
3408 #define CSL_DSS_VP1_SAFETY_POSITION_POSY_SHIFT (0x00000010U)
3409 #define CSL_DSS_VP1_SAFETY_POSITION_POSY_MAX (0x00000FFFU)
3411 #define CSL_DSS_VP1_SAFETY_POSITION_RESERVED_MASK (0xF0000000U)
3412 #define CSL_DSS_VP1_SAFETY_POSITION_RESERVED_SHIFT (0x0000001CU)
3413 #define CSL_DSS_VP1_SAFETY_POSITION_RESERVED_MAX (0x0000000FU)
3417 #define CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK (0xFFFFFFFFU)
3418 #define CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT (0x00000000U)
3419 #define CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX (0xFFFFFFFFU)
3423 #define CSL_DSS_VP1_SAFETY_SIZE_SIZEX_MASK (0x00000FFFU)
3424 #define CSL_DSS_VP1_SAFETY_SIZE_SIZEX_SHIFT (0x00000000U)
3425 #define CSL_DSS_VP1_SAFETY_SIZE_SIZEX_MAX (0x00000FFFU)
3427 #define CSL_DSS_VP1_SAFETY_SIZE_RESERVED1_MASK (0x0000F000U)
3428 #define CSL_DSS_VP1_SAFETY_SIZE_RESERVED1_SHIFT (0x0000000CU)
3429 #define CSL_DSS_VP1_SAFETY_SIZE_RESERVED1_MAX (0x0000000FU)
3431 #define CSL_DSS_VP1_SAFETY_SIZE_SIZEY_MASK (0x0FFF0000U)
3432 #define CSL_DSS_VP1_SAFETY_SIZE_SIZEY_SHIFT (0x00000010U)
3433 #define CSL_DSS_VP1_SAFETY_SIZE_SIZEY_MAX (0x00000FFFU)
3435 #define CSL_DSS_VP1_SAFETY_SIZE_RESERVED_MASK (0xF0000000U)
3436 #define CSL_DSS_VP1_SAFETY_SIZE_RESERVED_SHIFT (0x0000001CU)
3437 #define CSL_DSS_VP1_SAFETY_SIZE_RESERVED_MAX (0x0000000FU)
3441 #define CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_MASK (0xFFFFFFFFU)
3442 #define CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_SHIFT (0x00000000U)
3443 #define CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_MAX (0xFFFFFFFFU)
3448 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_MASK (0x000000FFU)
3449 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_SHIFT (0x00000000U)
3450 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_MAX (0x000000FFU)
3452 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_MASK (0x0000FF00U)
3453 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_SHIFT (0x00000008U)
3454 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_MAX (0x000000FFU)
3456 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_MASK (0x00FF0000U)
3457 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_SHIFT (0x00000010U)
3458 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_MAX (0x000000FFU)
3460 #define CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_MASK (0xFF000000U)
3461 #define CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_SHIFT (0x00000018U)
3462 #define CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_MAX (0x000000FFU)
3467 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_MASK (0x000000FFU)
3468 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_SHIFT (0x00000000U)
3469 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_MAX (0x000000FFU)
3471 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_MASK (0x0000FF00U)
3472 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_SHIFT (0x00000008U)
3473 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_MAX (0x000000FFU)
3475 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_MASK (0x00FF0000U)
3476 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_SHIFT (0x00000010U)
3477 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_MAX (0x000000FFU)
3479 #define CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_MASK (0xFF000000U)
3480 #define CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_SHIFT (0x00000018U)
3481 #define CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_MAX (0x000000FFU)
3486 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_MASK (0x000000FFU)
3487 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_SHIFT (0x00000000U)
3488 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_MAX (0x000000FFU)
3490 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_MASK (0x0000FF00U)
3491 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_SHIFT (0x00000008U)
3492 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_MAX (0x000000FFU)
3494 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_MASK (0x00FF0000U)
3495 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_SHIFT (0x00000010U)
3496 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_MAX (0x000000FFU)
3498 #define CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_MASK (0xFF000000U)
3499 #define CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_SHIFT (0x00000018U)
3500 #define CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_MAX (0x000000FFU)
3505 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_MASK (0x000000FFU)
3506 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_SHIFT (0x00000000U)
3507 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_MAX (0x000000FFU)
3509 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_MASK (0x0000FF00U)
3510 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_SHIFT (0x00000008U)
3511 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_MAX (0x000000FFU)
3513 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_MASK (0x00FF0000U)
3514 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_SHIFT (0x00000010U)
3515 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_MAX (0x000000FFU)
3517 #define CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_MASK (0xFF000000U)
3518 #define CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_SHIFT (0x00000018U)
3519 #define CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_MAX (0x000000FFU)
3524 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_MASK (0x000000FFU)
3525 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_SHIFT (0x00000000U)
3526 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_MAX (0x000000FFU)
3528 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_MASK (0x0000FF00U)
3529 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_SHIFT (0x00000008U)
3530 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_MAX (0x000000FFU)
3532 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_MASK (0x00FF0000U)
3533 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_SHIFT (0x00000010U)
3534 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_MAX (0x000000FFU)
3536 #define CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_MASK (0xFF000000U)
3537 #define CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_SHIFT (0x00000018U)
3538 #define CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_MAX (0x000000FFU)
3543 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_MASK (0x000000FFU)
3544 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_SHIFT (0x00000000U)
3545 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_MAX (0x000000FFU)
3547 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_MASK (0x0000FF00U)
3548 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_SHIFT (0x00000008U)
3549 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_MAX (0x000000FFU)
3551 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_MASK (0x00FF0000U)
3552 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_SHIFT (0x00000010U)
3553 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_MAX (0x000000FFU)
3555 #define CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_MASK (0xFF000000U)
3556 #define CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_SHIFT (0x00000018U)
3557 #define CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_MAX (0x000000FFU)
3562 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_MASK (0x000000FFU)
3563 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_SHIFT (0x00000000U)
3564 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_MAX (0x000000FFU)
3566 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_MASK (0x0000FF00U)
3567 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_SHIFT (0x00000008U)
3568 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_MAX (0x000000FFU)
3570 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_MASK (0x00FF0000U)
3571 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_SHIFT (0x00000010U)
3572 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_MAX (0x000000FFU)
3574 #define CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_MASK (0xFF000000U)
3575 #define CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_SHIFT (0x00000018U)
3576 #define CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_MAX (0x000000FFU)
3581 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_MASK (0x000000FFU)
3582 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_SHIFT (0x00000000U)
3583 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_MAX (0x000000FFU)
3585 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_MASK (0x0000FF00U)
3586 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_SHIFT (0x00000008U)
3587 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_MAX (0x000000FFU)
3589 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_MASK (0x00FF0000U)
3590 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_SHIFT (0x00000010U)
3591 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_MAX (0x000000FFU)
3593 #define CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_MASK (0xFF000000U)
3594 #define CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_SHIFT (0x00000018U)
3595 #define CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_MAX (0x000000FFU)
3600 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_MASK (0x000000FFU)
3601 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_SHIFT (0x00000000U)
3602 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_MAX (0x000000FFU)
3604 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_MASK (0x0000FF00U)
3605 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_SHIFT (0x00000008U)
3606 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_MAX (0x000000FFU)
3608 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_MASK (0x00FF0000U)
3609 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_SHIFT (0x00000010U)
3610 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_MAX (0x000000FFU)
3612 #define CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_MASK (0xFF000000U)
3613 #define CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_SHIFT (0x00000018U)
3614 #define CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_MAX (0x000000FFU)
3619 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_MASK (0x000000FFU)
3620 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_SHIFT (0x00000000U)
3621 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_MAX (0x000000FFU)
3623 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_MASK (0x0000FF00U)
3624 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_SHIFT (0x00000008U)
3625 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_MAX (0x000000FFU)
3627 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_MASK (0x00FF0000U)
3628 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_SHIFT (0x00000010U)
3629 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_MAX (0x000000FFU)
3631 #define CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_MASK (0xFF000000U)
3632 #define CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_SHIFT (0x00000018U)
3633 #define CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_MAX (0x000000FFU)
3638 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_MASK (0x000000FFU)
3639 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_SHIFT (0x00000000U)
3640 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_MAX (0x000000FFU)
3642 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_MASK (0x0000FF00U)
3643 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_SHIFT (0x00000008U)
3644 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_MAX (0x000000FFU)
3646 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_MASK (0x00FF0000U)
3647 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_SHIFT (0x00000010U)
3648 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_MAX (0x000000FFU)
3650 #define CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_MASK (0xFF000000U)
3651 #define CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_SHIFT (0x00000018U)
3652 #define CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_MAX (0x000000FFU)
3657 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_MASK (0x000000FFU)
3658 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_SHIFT (0x00000000U)
3659 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_MAX (0x000000FFU)
3661 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_MASK (0x0000FF00U)
3662 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_SHIFT (0x00000008U)
3663 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_MAX (0x000000FFU)
3665 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_MASK (0x00FF0000U)
3666 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_SHIFT (0x00000010U)
3667 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_MAX (0x000000FFU)
3669 #define CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_MASK (0xFF000000U)
3670 #define CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_SHIFT (0x00000018U)
3671 #define CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_MAX (0x000000FFU)
3676 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_MASK (0x000000FFU)
3677 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_SHIFT (0x00000000U)
3678 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_MAX (0x000000FFU)
3680 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_MASK (0x0000FF00U)
3681 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_SHIFT (0x00000008U)
3682 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_MAX (0x000000FFU)
3684 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_MASK (0x00FF0000U)
3685 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_SHIFT (0x00000010U)
3686 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_MAX (0x000000FFU)
3688 #define CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_MASK (0xFF000000U)
3689 #define CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_SHIFT (0x00000018U)
3690 #define CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_MAX (0x000000FFU)
3695 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_MASK (0x000000FFU)
3696 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_SHIFT (0x00000000U)
3697 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_MAX (0x000000FFU)
3699 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_MASK (0x0000FF00U)
3700 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_SHIFT (0x00000008U)
3701 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_MAX (0x000000FFU)
3703 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_MASK (0x00FF0000U)
3704 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_SHIFT (0x00000010U)
3705 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_MAX (0x000000FFU)
3707 #define CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_MASK (0xFF000000U)
3708 #define CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_SHIFT (0x00000018U)
3709 #define CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_MAX (0x000000FFU)
3714 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_MASK (0x000000FFU)
3715 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_SHIFT (0x00000000U)
3716 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_MAX (0x000000FFU)
3718 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_MASK (0x0000FF00U)
3719 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_SHIFT (0x00000008U)
3720 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_MAX (0x000000FFU)
3722 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_MASK (0x00FF0000U)
3723 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_SHIFT (0x00000010U)
3724 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_MAX (0x000000FFU)
3726 #define CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_MASK (0xFF000000U)
3727 #define CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_SHIFT (0x00000018U)
3728 #define CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_MAX (0x000000FFU)
3733 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_MASK (0x000000FFU)
3734 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_SHIFT (0x00000000U)
3735 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_MAX (0x000000FFU)
3737 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_MASK (0x0000FF00U)
3738 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_SHIFT (0x00000008U)
3739 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_MAX (0x000000FFU)
3741 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_MASK (0x00FF0000U)
3742 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_SHIFT (0x00000010U)
3743 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_MAX (0x000000FFU)
3745 #define CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_MASK (0xFF000000U)
3746 #define CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_SHIFT (0x00000018U)
3747 #define CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_MAX (0x000000FFU)
3752 #define CSL_DSS_VP1_DSS_OLDI_CFG_ENABLE_MASK (0x00000001U)
3753 #define CSL_DSS_VP1_DSS_OLDI_CFG_ENABLE_SHIFT (0x00000000U)
3754 #define CSL_DSS_VP1_DSS_OLDI_CFG_ENABLE_MAX (0x00000001U)
3756 #define CSL_DSS_VP1_DSS_OLDI_CFG_ENABLE_VAL_DISABLED (0x0U)
3757 #define CSL_DSS_VP1_DSS_OLDI_CFG_ENABLE_VAL_ENABLED (0x1U)
3759 #define CSL_DSS_VP1_DSS_OLDI_CFG_MAP_MASK (0x0000000EU)
3760 #define CSL_DSS_VP1_DSS_OLDI_CFG_MAP_SHIFT (0x00000001U)
3761 #define CSL_DSS_VP1_DSS_OLDI_CFG_MAP_MAX (0x00000007U)
3763 #define CSL_DSS_VP1_DSS_OLDI_CFG_MAP_VAL_TYPE_A (0x0U)
3764 #define CSL_DSS_VP1_DSS_OLDI_CFG_MAP_VAL_TYPE_B (0x1U)
3765 #define CSL_DSS_VP1_DSS_OLDI_CFG_MAP_VAL_TYPE_C (0x2U)
3766 #define CSL_DSS_VP1_DSS_OLDI_CFG_MAP_VAL_TYPE_D (0x4U)
3767 #define CSL_DSS_VP1_DSS_OLDI_CFG_MAP_VAL_TYPE_E (0x5U)
3768 #define CSL_DSS_VP1_DSS_OLDI_CFG_MAP_VAL_TYPE_F (0x6U)
3770 #define CSL_DSS_VP1_DSS_OLDI_CFG_SRC_MASK (0x00000010U)
3771 #define CSL_DSS_VP1_DSS_OLDI_CFG_SRC_SHIFT (0x00000004U)
3772 #define CSL_DSS_VP1_DSS_OLDI_CFG_SRC_MAX (0x00000001U)
3774 #define CSL_DSS_VP1_DSS_OLDI_CFG_SRC_VAL_CHANNEL0 (0x0U)
3775 #define CSL_DSS_VP1_DSS_OLDI_CFG_SRC_VAL_CHANNEL1 (0x1U)
3777 #define CSL_DSS_VP1_DSS_OLDI_CFG_MODE_MASK (0x00000020U)
3778 #define CSL_DSS_VP1_DSS_OLDI_CFG_MODE_SHIFT (0x00000005U)
3779 #define CSL_DSS_VP1_DSS_OLDI_CFG_MODE_MAX (0x00000001U)
3781 #define CSL_DSS_VP1_DSS_OLDI_CFG_MODE_VAL_SINGLE (0x0U)
3782 #define CSL_DSS_VP1_DSS_OLDI_CFG_MODE_VAL_DUPLICATE (0x1U)
3784 #define CSL_DSS_VP1_DSS_OLDI_CFG_MASTERSLAVE_MASK (0x00000040U)
3785 #define CSL_DSS_VP1_DSS_OLDI_CFG_MASTERSLAVE_SHIFT (0x00000006U)
3786 #define CSL_DSS_VP1_DSS_OLDI_CFG_MASTERSLAVE_MAX (0x00000001U)
3788 #define CSL_DSS_VP1_DSS_OLDI_CFG_MASTERSLAVE_VAL_MASTER (0x0U)
3789 #define CSL_DSS_VP1_DSS_OLDI_CFG_MASTERSLAVE_VAL_SLAVE (0x1U)
3791 #define CSL_DSS_VP1_DSS_OLDI_CFG_DEPOL_MASK (0x00000080U)
3792 #define CSL_DSS_VP1_DSS_OLDI_CFG_DEPOL_SHIFT (0x00000007U)
3793 #define CSL_DSS_VP1_DSS_OLDI_CFG_DEPOL_MAX (0x00000001U)
3795 #define CSL_DSS_VP1_DSS_OLDI_CFG_DEPOL_VAL_HIGH (0x0U)
3796 #define CSL_DSS_VP1_DSS_OLDI_CFG_DEPOL_VAL_LOW (0x1U)
3798 #define CSL_DSS_VP1_DSS_OLDI_CFG_MSB_MASK (0x00000100U)
3799 #define CSL_DSS_VP1_DSS_OLDI_CFG_MSB_SHIFT (0x00000008U)
3800 #define CSL_DSS_VP1_DSS_OLDI_CFG_MSB_MAX (0x00000001U)
3802 #define CSL_DSS_VP1_DSS_OLDI_CFG_MSB_VAL_18B (0x0U)
3803 #define CSL_DSS_VP1_DSS_OLDI_CFG_MSB_VAL_24B (0x1U)
3805 #define CSL_DSS_VP1_DSS_OLDI_CFG_LBEN_MASK (0x00000200U)
3806 #define CSL_DSS_VP1_DSS_OLDI_CFG_LBEN_SHIFT (0x00000009U)
3807 #define CSL_DSS_VP1_DSS_OLDI_CFG_LBEN_MAX (0x00000001U)
3809 #define CSL_DSS_VP1_DSS_OLDI_CFG_LBEN_VAL_DISABLE (0x0U)
3810 #define CSL_DSS_VP1_DSS_OLDI_CFG_LBEN_VAL_ENABLE (0x1U)
3812 #define CSL_DSS_VP1_DSS_OLDI_CFG_LBDATA_MASK (0x00000400U)
3813 #define CSL_DSS_VP1_DSS_OLDI_CFG_LBDATA_SHIFT (0x0000000AU)
3814 #define CSL_DSS_VP1_DSS_OLDI_CFG_LBDATA_MAX (0x00000001U)
3816 #define CSL_DSS_VP1_DSS_OLDI_CFG_DUALMODESYNC_MASK (0x00000800U)
3817 #define CSL_DSS_VP1_DSS_OLDI_CFG_DUALMODESYNC_SHIFT (0x0000000BU)
3818 #define CSL_DSS_VP1_DSS_OLDI_CFG_DUALMODESYNC_MAX (0x00000001U)
3820 #define CSL_DSS_VP1_DSS_OLDI_CFG_DUALMODESYNC_VAL_DISABLE (0x0U)
3821 #define CSL_DSS_VP1_DSS_OLDI_CFG_DUALMODESYNC_VAL_ENABLE (0x1U)
3823 #define CSL_DSS_VP1_DSS_OLDI_CFG_SOFTRST_MASK (0x00001000U)
3824 #define CSL_DSS_VP1_DSS_OLDI_CFG_SOFTRST_SHIFT (0x0000000CU)
3825 #define CSL_DSS_VP1_DSS_OLDI_CFG_SOFTRST_MAX (0x00000001U)
3827 #define CSL_DSS_VP1_DSS_OLDI_CFG_SOFTRST_VAL_ASSERT (0x0U)
3828 #define CSL_DSS_VP1_DSS_OLDI_CFG_SOFTRST_VAL_DEASSERT (0x1U)
3830 #define CSL_DSS_VP1_DSS_OLDI_CFG_TPATCFG_MASK (0x00002000U)
3831 #define CSL_DSS_VP1_DSS_OLDI_CFG_TPATCFG_SHIFT (0x0000000DU)
3832 #define CSL_DSS_VP1_DSS_OLDI_CFG_TPATCFG_MAX (0x00000001U)
3834 #define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_MASK (0xFFFFC000U)
3835 #define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_SHIFT (0x0000000EU)
3836 #define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_MAX (0x0003FFFFU)
3841 #define CSL_DSS_VP1_DSS_OLDI_STATUS_REVMIN_MASK (0x0000003FU)
3842 #define CSL_DSS_VP1_DSS_OLDI_STATUS_REVMIN_SHIFT (0x00000000U)
3843 #define CSL_DSS_VP1_DSS_OLDI_STATUS_REVMIN_MAX (0x0000003FU)
3845 #define CSL_DSS_VP1_DSS_OLDI_STATUS_CUSTOM_MASK (0x000000C0U)
3846 #define CSL_DSS_VP1_DSS_OLDI_STATUS_CUSTOM_SHIFT (0x00000006U)
3847 #define CSL_DSS_VP1_DSS_OLDI_STATUS_CUSTOM_MAX (0x00000003U)
3849 #define CSL_DSS_VP1_DSS_OLDI_STATUS_REVMAJOR_MASK (0x00000700U)
3850 #define CSL_DSS_VP1_DSS_OLDI_STATUS_REVMAJOR_SHIFT (0x00000008U)
3851 #define CSL_DSS_VP1_DSS_OLDI_STATUS_REVMAJOR_MAX (0x00000007U)
3853 #define CSL_DSS_VP1_DSS_OLDI_STATUS_REVRTL_MASK (0x0000F800U)
3854 #define CSL_DSS_VP1_DSS_OLDI_STATUS_REVRTL_SHIFT (0x0000000BU)
3855 #define CSL_DSS_VP1_DSS_OLDI_STATUS_REVRTL_MAX (0x0000001FU)
3857 #define CSL_DSS_VP1_DSS_OLDI_STATUS_MODID_MASK (0xFFFF0000U)
3858 #define CSL_DSS_VP1_DSS_OLDI_STATUS_MODID_SHIFT (0x00000010U)
3859 #define CSL_DSS_VP1_DSS_OLDI_STATUS_MODID_MAX (0x0000FFFFU)
3864 #define CSL_DSS_VP1_DSS_OLDI_LB_LBRDATA_MASK (0x000003FFU)
3865 #define CSL_DSS_VP1_DSS_OLDI_LB_LBRDATA_SHIFT (0x00000000U)
3866 #define CSL_DSS_VP1_DSS_OLDI_LB_LBRDATA_MAX (0x000003FFU)
3868 #define CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_MASK (0xFFFFFC00U)
3869 #define CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_SHIFT (0x0000000AU)
3870 #define CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_MAX (0x003FFFFFU)
volatile uint32_t BA_EXT_0
Definition: cslr_dss.h:1282
volatile uint32_t VP_IRQENABLE_0
Definition: cslr_dss.h:812
volatile uint32_t GAMMA_TABLE_3
Definition: cslr_dss.h:2645
volatile uint32_t CONTROL
Definition: cslr_dss.h:2611
volatile uint32_t DISPC_SECURE_DISABLE
Definition: cslr_dss.h:84
volatile uint32_t BA_UV_EXT_1
Definition: cslr_dss.h:1285
volatile uint32_t RESERVED_2
Definition: cslr_dss.h:2350
volatile uint32_t SAFETY_LFSR_SEED
Definition: cslr_dss.h:1311
volatile uint32_t CLUT_9
Definition: cslr_dss.h:1299
volatile uint32_t CLUT_0
Definition: cslr_dss.h:1290
volatile uint32_t GAMMA_TABLE_0
Definition: cslr_dss.h:2642
volatile uint32_t VP_IRQSTATUS_0
Definition: cslr_dss.h:75
volatile uint32_t SAFETY_ATTRIBUTES
Definition: cslr_dss.h:1306
volatile uint32_t GAMMA_TABLE_10
Definition: cslr_dss.h:2652
volatile uint32_t ROW_INC
Definition: cslr_dss.h:1280
volatile uint32_t TIMING_H
Definition: cslr_dss.h:2623
volatile uint32_t LINE_NUMBER
Definition: cslr_dss.h:2619
volatile uint32_t VID_IRQSTATUS_1
Definition: cslr_dss.h:810
volatile uint32_t POL_FREQ
Definition: cslr_dss.h:2621
volatile uint32_t VID_IRQENABLE_1
Definition: cslr_dss.h:68
volatile uint32_t DSS_OLDI_LB
Definition: cslr_dss.h:2660
volatile uint32_t DISPC_IRQENABLE_CLR
Definition: cslr_dss.h:804
volatile uint32_t ATTRIBUTES
Definition: cslr_dss.h:1257
volatile uint32_t DSS_CBA_CFG
Definition: cslr_dss.h:80
volatile uint32_t PRELOAD
Definition: cslr_dss.h:1279
volatile uint32_t VID_IRQENABLE_1
Definition: cslr_dss.h:806
volatile uint32_t DEFAULT_COLOR2
Definition: cslr_dss.h:2343
Definition: cslr_dss.h:2339
volatile uint32_t DISPC_IRQSTATUS_RAW
Definition: cslr_dss.h:800
volatile uint32_t BA_EXT_1
Definition: cslr_dss.h:1283
Definition: cslr_dss.h:2609
volatile uint32_t DISPC_IRQSTATUS_RAW
Definition: cslr_dss.h:62
volatile uint32_t CSC_COEF7
Definition: cslr_dss.h:2629
volatile uint32_t DISPC_GLOBAL_BUFFER
Definition: cslr_dss.h:79
volatile uint32_t CONFIG
Definition: cslr_dss.h:2610
volatile uint32_t DATA_CYCLE_0
Definition: cslr_dss.h:2615
Definition: cslr_dss.h:1255
volatile uint32_t CLUT_8
Definition: cslr_dss.h:1298
volatile uint32_t DATA_CYCLE_2
Definition: cslr_dss.h:2617
volatile uint32_t VP_IRQSTATUS_0
Definition: cslr_dss.h:814
volatile uint32_t CLUT_2
Definition: cslr_dss.h:1292
Definition: cslr_dss.h:55
volatile uint32_t DISPC_IRQENABLE_SET
Definition: cslr_dss.h:64
volatile uint32_t ATTRIBUTES2
Definition: cslr_dss.h:1258
volatile uint32_t TRANS_COLOR_MIN
Definition: cslr_dss.h:2346
volatile uint32_t GAMMA_TABLE_4
Definition: cslr_dss.h:2646
volatile uint32_t GLOBAL_ALPHA
Definition: cslr_dss.h:1273
volatile uint32_t RESERVED_0
Definition: cslr_dss.h:67
volatile uint32_t TRANS_COLOR_MIN2
Definition: cslr_dss.h:2347
volatile uint32_t DISPC_DBG_STATUS
Definition: cslr_dss.h:82
volatile uint32_t CLUT_12
Definition: cslr_dss.h:1302
volatile uint32_t CSC_COEF0
Definition: cslr_dss.h:1265
volatile uint32_t DISPC_GLOBAL_OUTPUT_ENABLE
Definition: cslr_dss.h:78
volatile uint32_t RESERVED_1
Definition: cslr_dss.h:2349
volatile uint32_t DISPC_IRQSTATUS
Definition: cslr_dss.h:63
volatile uint32_t DISPC_IRQ_EOI
Definition: cslr_dss.h:61
volatile uint32_t CLUT_13
Definition: cslr_dss.h:1303
volatile uint32_t CSC_COEF0
Definition: cslr_dss.h:2612
volatile uint32_t SAFETY_REF_SIGNATURE
Definition: cslr_dss.h:1309
volatile uint32_t CLUT_7
Definition: cslr_dss.h:1297
volatile uint32_t BA_UV_1
Definition: cslr_dss.h:1262
volatile uint32_t SAFETY_CAPT_SIGNATURE
Definition: cslr_dss.h:1307
volatile uint32_t DISPC_IRQSTATUS
Definition: cslr_dss.h:801
volatile uint32_t GAMMA_TABLE_13
Definition: cslr_dss.h:2655
volatile uint32_t BA_0
Definition: cslr_dss.h:1259
volatile uint32_t VP_IRQENABLE_0
Definition: cslr_dss.h:73
volatile uint32_t CLUT_3
Definition: cslr_dss.h:1293
volatile uint32_t DSS_OLDI_CFG
Definition: cslr_dss.h:2658
volatile uint32_t CSC_COEF3
Definition: cslr_dss.h:1268
volatile uint32_t GAMMA_TABLE_6
Definition: cslr_dss.h:2648
volatile uint32_t DSS_OLDI_STATUS
Definition: cslr_dss.h:2659
volatile uint32_t CSC_COEF2
Definition: cslr_dss.h:2614
volatile uint32_t VID_IRQSTATUS_1
Definition: cslr_dss.h:71
volatile uint32_t CLUT_11
Definition: cslr_dss.h:1301
volatile uint32_t GAMMA_TABLE_15
Definition: cslr_dss.h:2657
volatile uint32_t TRANS_COLOR_MAX
Definition: cslr_dss.h:2344
volatile uint32_t DATA_CYCLE_1
Definition: cslr_dss.h:2616
volatile uint32_t CSC_COEF1
Definition: cslr_dss.h:2613
volatile uint32_t SIZE_SCREEN
Definition: cslr_dss.h:2622
volatile uint32_t TIMING_V
Definition: cslr_dss.h:2624
volatile uint32_t BUF_SIZE_STATUS
Definition: cslr_dss.h:1263
volatile uint32_t RESERVED_3
Definition: cslr_dss.h:2351
volatile uint32_t GAMMA_TABLE_2
Definition: cslr_dss.h:2644
volatile uint32_t CSC_COEF1
Definition: cslr_dss.h:1266
volatile uint32_t LUMAKEY
Definition: cslr_dss.h:1312
volatile uint32_t BA_1
Definition: cslr_dss.h:1260
volatile uint32_t RESERVED_0
Definition: cslr_dss.h:805
volatile uint32_t ATTRIBUTES_0
Definition: cslr_dss.h:2348
volatile uint32_t DISPC_DBG_CONTROL
Definition: cslr_dss.h:81
volatile uint32_t RESERVERD_1
Definition: cslr_dss.h:70
volatile uint32_t CLUT_15
Definition: cslr_dss.h:1305
volatile uint32_t CSC_COEF5
Definition: cslr_dss.h:2627
volatile uint32_t CSC_COEF6
Definition: cslr_dss.h:1271
Definition: cslr_dss.h:797
volatile uint32_t PIXEL_INC
Definition: cslr_dss.h:1277
volatile uint32_t DISPC_SECURE
Definition: cslr_dss.h:808
volatile uint32_t CLUT_14
Definition: cslr_dss.h:1304
volatile uint32_t BA_UV_0
Definition: cslr_dss.h:1261
volatile uint32_t GAMMA_TABLE_11
Definition: cslr_dss.h:2653
volatile uint32_t DSS_REVISION
Definition: cslr_dss.h:57
volatile uint32_t PICTURE_SIZE
Definition: cslr_dss.h:1276
volatile uint32_t ROW_INC_UV
Definition: cslr_dss.h:1288
volatile uint32_t GAMMA_TABLE_7
Definition: cslr_dss.h:2649
volatile uint32_t GAMMA_TABLE_5
Definition: cslr_dss.h:2647
volatile uint32_t CSC_COEF6
Definition: cslr_dss.h:2628
volatile uint32_t DISPC_IRQENABLE_CLR
Definition: cslr_dss.h:66
volatile uint32_t CSC_COEF2
Definition: cslr_dss.h:1267
volatile uint32_t SAFETY_POSITION
Definition: cslr_dss.h:1308
volatile uint32_t DISPC_IRQENABLE_SET
Definition: cslr_dss.h:802
volatile uint32_t CLUT_10
Definition: cslr_dss.h:1300
volatile uint32_t GAMMA_TABLE_1
Definition: cslr_dss.h:2643
volatile uint32_t CSC_COEF3
Definition: cslr_dss.h:2625
volatile uint32_t BA_UV_EXT_0
Definition: cslr_dss.h:1284
volatile uint32_t DISPC_GLOBAL_MFLAG_ATTRIBUTE
Definition: cslr_dss.h:77
volatile uint32_t CLUT_6
Definition: cslr_dss.h:1296
volatile uint32_t CSC_COEF7
Definition: cslr_dss.h:1286
volatile uint32_t DSS_SYSCONFIG
Definition: cslr_dss.h:58
volatile uint32_t DISPC_CLKGATING_DISABLE
Definition: cslr_dss.h:83
volatile uint32_t DSS_SYSSTATUS
Definition: cslr_dss.h:60
volatile uint32_t SAFETY_LFSR_SEED
Definition: cslr_dss.h:2640
volatile uint32_t CLUT_1
Definition: cslr_dss.h:1291
volatile uint32_t CSC_COEF4
Definition: cslr_dss.h:2626
volatile uint32_t GAMMA_TABLE_9
Definition: cslr_dss.h:2651
volatile uint32_t MFLAG_THRESHOLD
Definition: cslr_dss.h:1275
volatile uint32_t CONFIG
Definition: cslr_dss.h:2340
volatile uint32_t SAFETY_SIZE
Definition: cslr_dss.h:1310
volatile uint32_t CSC_COEF4
Definition: cslr_dss.h:1269
volatile uint32_t BUF_THRESHOLD
Definition: cslr_dss.h:1264
volatile uint32_t DEFAULT_COLOR
Definition: cslr_dss.h:2342
volatile uint32_t DISPC_IRQ_EOI
Definition: cslr_dss.h:799
volatile uint32_t CSC_COEF5
Definition: cslr_dss.h:1270
volatile uint32_t CLUT_4
Definition: cslr_dss.h:1294
volatile uint32_t GAMMA_TABLE_14
Definition: cslr_dss.h:2656
volatile uint32_t GAMMA_TABLE_8
Definition: cslr_dss.h:2650
volatile uint32_t TRANS_COLOR_MAX2
Definition: cslr_dss.h:2345
volatile uint32_t GAMMA_TABLE_12
Definition: cslr_dss.h:2654
volatile uint32_t CLUT_5
Definition: cslr_dss.h:1295
volatile uint32_t RESERVERD_1
Definition: cslr_dss.h:809