AM62Ax MCU+ SDK  10.01.00
udma_ch.h
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31  */
32 
48 #ifndef UDMA_CH_H_
49 #define UDMA_CH_H_
50 
51 /* ========================================================================== */
52 /* Include Files */
53 /* ========================================================================== */
54 
55 /* None */
56 
57 #ifdef __cplusplus
58 extern "C" {
59 #endif
60 
61 /* ========================================================================== */
62 /* Macros & Typedefs */
63 /* ========================================================================== */
64 
69 #define UDMA_DMA_CH_INVALID ((uint32_t) 0xFFFF0000U)
70 
74 #define UDMA_DMA_CH_ANY ((uint32_t) 0xFFFF0001U)
75 
79 #define UDMA_DMA_CH_NA ((uint32_t) 0xFFFF0002U)
80 
81 #define UDMA_UTC_ID_INVALID ((uint32_t) 0xFFFF0003U)
82 
83 #define UDMA_MAPPED_GROUP_INVALID ((uint32_t) 0xFFFF0004U)
84 
86 #define UDMA_SYSFW_EXTENDED_CH_TYPE_BCDMA_BLK_CPY ((uint8_t) 1U)
87 
89 #define UDMA_SYSFW_EXTENDED_CH_TYPE_BCDMA_SPLIT_TR_TX ((uint8_t) 0U)
90 
91 
101 #define UDMA_CH_FLAG_TX ((uint32_t) 0x0001U)
102 
103 #define UDMA_CH_FLAG_RX ((uint32_t) 0x0002U)
104 
105 #define UDMA_CH_FLAG_BLK_COPY ((uint32_t) 0x0004U)
106 
107 #define UDMA_CH_FLAG_PDMA ((uint32_t) 0x0008U)
108 
109 #define UDMA_CH_FLAG_PSIL ((uint32_t) 0x0010U)
110 
111 #define UDMA_CH_FLAG_UTC ((uint32_t) 0x0020U)
112 
113 #define UDMA_CH_FLAG_HC ((uint32_t) 0x0040U)
114 
115 #define UDMA_CH_FLAG_UHC ((uint32_t) 0x0080U)
116 
117 #define UDMA_CH_FLAG_MAPPED ((uint32_t) 0x0100U)
118 
129 #define UDMA_CH_TYPE_TR_BLK_COPY (UDMA_CH_FLAG_BLK_COPY | \
130  UDMA_CH_FLAG_TX | \
131  UDMA_CH_FLAG_RX)
132 
133 #define UDMA_CH_TYPE_TR_BLK_COPY_HC (UDMA_CH_FLAG_BLK_COPY | \
134  UDMA_CH_FLAG_TX | \
135  UDMA_CH_FLAG_RX | \
136  UDMA_CH_FLAG_HC)
137 
138 #define UDMA_CH_TYPE_TR_BLK_COPY_UHC (UDMA_CH_FLAG_BLK_COPY | \
139  UDMA_CH_FLAG_TX | \
140  UDMA_CH_FLAG_RX | \
141  UDMA_CH_FLAG_UHC)
142 
143 #define UDMA_CH_TYPE_TX (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL)
144 
145 #define UDMA_CH_TYPE_TX_HC (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_HC)
146 
147 #define UDMA_CH_TYPE_TX_UHC (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_UHC)
148 
150 #define UDMA_CH_TYPE_RX (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL)
151 
152 #define UDMA_CH_TYPE_RX_HC (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_HC)
153 
154 #define UDMA_CH_TYPE_RX_UHC (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_UHC)
155 
157 #define UDMA_CH_TYPE_PDMA_TX (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PDMA)
158 
159 #define UDMA_CH_TYPE_PDMA_TX_HC (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_HC)
160 
161 #define UDMA_CH_TYPE_PDMA_TX_UHC (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_UHC)
162 
164 #define UDMA_CH_TYPE_PDMA_RX (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PDMA)
165 
166 #define UDMA_CH_TYPE_PDMA_RX_HC (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_HC)
167 
168 #define UDMA_CH_TYPE_PDMA_RX_UHC (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_UHC)
169 
175 #define UDMA_CH_TYPE_TX_MAPPED (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_MAPPED)
176 
181 #define UDMA_CH_TYPE_RX_MAPPED (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_MAPPED)
182 
189 #define UDMA_CH_TYPE_UTC (UDMA_CH_FLAG_UTC)
190 
198 #define UDMA_PDMA_ES_8BITS ((uint32_t) 0x00U)
199 #define UDMA_PDMA_ES_16BITS ((uint32_t) 0x01U)
200 #define UDMA_PDMA_ES_24BITS ((uint32_t) 0x02U)
201 #define UDMA_PDMA_ES_32BITS ((uint32_t) 0x03U)
202 #define UDMA_PDMA_ES_64BITS ((uint32_t) 0x04U)
203 
204 #define UDMA_PDMA_ES_DONTCARE ((uint32_t) 0x00U)
205 
207 /* ========================================================================== */
208 /* Structure Declarations */
209 /* ========================================================================== */
210 
214 typedef struct
215 {
216  uint32_t chNum;
226  uint32_t peerChNum;
244  uint32_t utcId;
249  uint32_t mappedChGrp;
257  void *appData;
276 } Udma_ChPrms;
277 
281 typedef struct
282 {
283  uint8_t pauseOnError;
285  uint8_t filterEinfo;
287  uint8_t filterPsWords;
289  uint8_t addrType;
292  uint8_t chanType;
294  uint16_t fetchWordSize;
296  uint8_t busPriority;
298  uint8_t busQos;
300  uint8_t busOrderId;
302  uint8_t dmaPriority;
306  uint8_t txCredit;
308  uint16_t fifoDepth;
323  uint8_t burstSize;
342  uint8_t supressTdCqPkt;
349 } Udma_ChTxPrms;
350 
354 typedef struct
355 {
356  uint8_t pauseOnError;
358  uint8_t addrType;
361  uint8_t chanType;
363  uint16_t fetchWordSize;
365  uint8_t busPriority;
367  uint8_t busQos;
369  uint8_t busOrderId;
371  uint8_t dmaPriority;
389  uint8_t flowSopOffset;
396  uint8_t ignoreLongPkts;
408  uint8_t burstSize;
427 } Udma_ChRxPrms;
428 
429 
433 typedef struct
434 {
435  uint8_t pauseOnError;
437  uint8_t addrType;
440  uint8_t chanType;
442  uint16_t fetchWordSize;
444  uint8_t busPriority;
446  uint8_t busQos;
448  uint8_t busOrderId;
450  uint8_t dmaPriority;
454  uint8_t burstSize;
467  uint8_t supressTdCqPkt;
475 #if (UDMA_NUM_UTC_INSTANCE > 0)
476  /* Below fields are applicable only for DRU UTC */
477  uint64_t druOwner;
485  uint32_t druQueueId;
493 #endif
495 
496 
500 typedef struct
501 {
502  uint32_t elemSize;
511  uint32_t elemCnt;
530  uint32_t fifoCnt;
547  uint8_t burst;
555  uint8_t acc32;
563  uint8_t eol;
572 
576 typedef struct
577 {
578  uint32_t packetCnt;
582  uint32_t startedByteCnt;
584 } Udma_ChStats;
585 
586 /* ========================================================================== */
587 /* Function Declarations */
588 /* ========================================================================== */
589 
612 int32_t Udma_chOpen(Udma_DrvHandle drvHandle,
613  Udma_ChHandle chHandle,
614  uint32_t chType,
615  const Udma_ChPrms *chPrms);
616 
629 int32_t Udma_chClose(Udma_ChHandle chHandle);
630 
648 int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms);
649 
669 int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms);
670 
688 int32_t Udma_chConfigUtc(Udma_ChHandle chHandle, const Udma_ChUtcPrms *utcPrms);
689 
690 #if defined (BUILD_C7X)
691 
702 void Udma_chDruSubmitTr(Udma_ChHandle chHandle, const CSL_UdmapTR *tr);
703 #endif
704 
721  const Udma_ChPdmaPrms *pdmaPrms);
722 
735 int32_t Udma_chEnable(Udma_ChHandle chHandle);
736 
758 int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout);
759 
773 int32_t Udma_chPause(Udma_ChHandle chHandle);
774 
788 int32_t Udma_chResume(Udma_ChHandle chHandle);
789 
802 uint32_t Udma_chGetNum(Udma_ChHandle chHandle);
803 
813 
823 
833 
844 
857 
867 
884 uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger);
885 
906 
929 int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger);
930 
953 int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle,
954  Udma_ChHandle chainedChHandle,
955  uint32_t trigger);
956 
969 int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle,
970  Udma_ChHandle chainedChHandle);
971 
972 /*
973  * Structure Init functions
974  */
982 void UdmaChPrms_init(Udma_ChPrms *chPrms, uint32_t chType);
983 
991 void UdmaChTxPrms_init(Udma_ChTxPrms *txPrms, uint32_t chType);
992 
1000 void UdmaChRxPrms_init(Udma_ChRxPrms *rxPrms, uint32_t chType);
1001 
1009 
1021 int32_t Udma_chRingQueueRaw(Udma_ChHandle chHandle, uint8_t *phyDescMem,
1022  uint64_t noEleCnt);
1023 
1033 int32_t Udma_chRingRingDbRaw(Udma_ChHandle chHandle, uint64_t noOfEntries);
1034 
1045 int32_t Udma_chRingDeQueueRaw(Udma_ChHandle chHandle, uint64_t noElem,
1046  uint64_t *eleInRing);
1047 
1057 int32_t Udma_chRingRingRvrDbRaw(Udma_ChHandle chHandle, uint64_t noOfEntries);
1058 
1066 
1079 int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats);
1080 
1090 int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData);
1091 
1101 int32_t Udma_clearPeerData(Udma_ChHandle chHandle, uint32_t peerData);
1102 
1111 int32_t Udma_chReset(Udma_ChHandle chHandle);
1112 /* ========================================================================== */
1113 /* Static Function Definitions */
1114 /* ========================================================================== */
1115 
1116 /* None */
1117 
1118 /* ========================================================================== */
1119 /* Internal/Private Structure Declarations */
1120 /* ========================================================================== */
1121 #if (UDMA_NUM_UTC_INSTANCE > 0)
1122 
1128 typedef struct
1129 {
1130  uint32_t utcId;
1132  uint32_t utcType;
1135  uint32_t startCh;
1138  uint32_t numCh;
1140  uint32_t startThreadId;
1142  uint8_t txCredit;
1144  CSL_DRU_t *druRegs;
1147  uint32_t numQueue;
1149 } Udma_UtcInstInfo;
1150 #endif
1151 
1155 typedef struct Udma_ChObject_t
1156 {
1157  uintptr_t rsv[178U];
1159 } Udma_ChObject;
1160 
1161 #ifdef __cplusplus
1162 }
1163 #endif
1164 
1165 #endif /* #ifndef UDMA_CH_H_ */
1166 
Udma_chGetCqRingHandle
Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle)
Returns the default completion ring handle of the channel.
Udma_ChRxPrms::pauseOnError
uint8_t pauseOnError
Definition: udma_ch.h:356
Udma_ChStats::startedByteCnt
uint32_t startedByteCnt
Definition: udma_ch.h:582
Udma_FlowHandle
void * Udma_FlowHandle
UDMA flow handle.
Definition: udma_types.h:73
Udma_ChRxPrms::flowIdFwRangeStart
uint16_t flowIdFwRangeStart
Definition: udma_ch.h:375
Udma_ChTxPrms
UDMA TX channel parameters.
Definition: udma_ch.h:282
Udma_ChPrms
UDMA channel open parameters.
Definition: udma_ch.h:215
Udma_ChRxPrms::ignoreLongPkts
uint8_t ignoreLongPkts
Definition: udma_ch.h:396
Udma_RingPrms
UDMA ring parameters.
Definition: udma_ring.h:124
Udma_chOpen
int32_t Udma_chOpen(Udma_DrvHandle drvHandle, Udma_ChHandle chHandle, uint32_t chType, const Udma_ChPrms *chPrms)
UDMA open channel.
Udma_ChPdmaPrms::acc32
uint8_t acc32
Definition: udma_ch.h:555
Udma_chReset
int32_t Udma_chReset(Udma_ChHandle chHandle)
Hard reset the channel if teardown fails.
Udma_ChRxPrms::configDefaultFlow
uint32_t configDefaultFlow
Definition: udma_ch.h:400
Udma_ChTxPrms::fetchWordSize
uint16_t fetchWordSize
Definition: udma_ch.h:294
Udma_chEnable
int32_t Udma_chEnable(Udma_ChHandle chHandle)
UDMA channel enable API.
Udma_ChHandle
void * Udma_ChHandle
UDMA channel handle.
Definition: udma_types.h:67
Udma_ChRxPrms::flowErrorHandling
uint8_t flowErrorHandling
Definition: udma_ch.h:386
Udma_ChRxPrms
UDMA RX channel parameters.
Definition: udma_ch.h:355
Udma_chGetTdCqRingHandle
Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle)
Returns the teardown completion ring handle of the channel.
Udma_ChTxPrms::txCredit
uint8_t txCredit
Definition: udma_ch.h:306
Udma_ChTxPrms::busOrderId
uint8_t busOrderId
Definition: udma_ch.h:300
Udma_chDisable
int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout)
UDMA channel teardown and disable API.
Udma_ChPdmaPrms::elemCnt
uint32_t elemCnt
Definition: udma_ch.h:511
Udma_ChRxPrms::ignoreShortPkts
uint8_t ignoreShortPkts
Definition: udma_ch.h:392
Udma_chRingDeQueueRaw
int32_t Udma_chRingDeQueueRaw(Udma_ChHandle chHandle, uint64_t noElem, uint64_t *eleInRing)
De Queue elements from the ring.
Udma_ChPdmaPrms
UDMA PDMA channel Static TR parameters.
Definition: udma_ch.h:501
UdmaChPdmaPrms_init
void UdmaChPdmaPrms_init(Udma_ChPdmaPrms *pdmaPrms)
Udma_ChPdmaPrms structure init function.
Udma_ChPrms::mappedChGrp
uint32_t mappedChGrp
Definition: udma_ch.h:249
Udma_chGetStats
int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats)
Get real-time channel statistics.
Udma_chGetNum
uint32_t Udma_chGetNum(Udma_ChHandle chHandle)
Returns the channel number offset with in a channel type - TX, RX and External (UTC) channel types.
Udma_chPause
int32_t Udma_chPause(Udma_ChHandle chHandle)
UDMA channel pause API.
Udma_ChPrms::fqRingPrms
Udma_RingPrms fqRingPrms
Definition: udma_ch.h:262
Udma_chGetDefaultFlowHandle
Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle)
Returns the default flow handle of the RX channel.
Udma_ChRxPrms::busPriority
uint8_t busPriority
Definition: udma_ch.h:365
Udma_ChRxPrms::flowPsInfoPresent
uint8_t flowPsInfoPresent
Definition: udma_ch.h:383
Udma_ChRxPrms::flowSopOffset
uint8_t flowSopOffset
Definition: udma_ch.h:389
Udma_chConfigTx
int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms)
UDMA configure TX channel.
Udma_chSetSwTrigger
int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger)
Sets the software trigger register based on the trigger mode provided.
Udma_ChPrms::tdCqRingPrms
Udma_RingPrms tdCqRingPrms
Definition: udma_ch.h:269
Udma_ChPrms::cqRingPrms
Udma_RingPrms cqRingPrms
Definition: udma_ch.h:264
Udma_RingHandle
void * Udma_RingHandle
UDMA ring handle.
Definition: udma_types.h:71
Udma_ChRxPrms::flowEInfoPresent
uint8_t flowEInfoPresent
Definition: udma_ch.h:380
Udma_ChUtcPrms::fetchWordSize
uint16_t fetchWordSize
Definition: udma_ch.h:442
Udma_getPeerData
int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData)
Get real-time peer data which contains number of bytes written.
Udma_ChPdmaPrms::elemSize
uint32_t elemSize
Definition: udma_ch.h:502
Udma_ChObject
Opaque UDMA channel object.
Definition: udma_ch.h:1156
Udma_chResume
int32_t Udma_chResume(Udma_ChHandle chHandle)
UDMA channel resume API.
Udma_ChUtcPrms::supressTdCqPkt
uint8_t supressTdCqPkt
Definition: udma_ch.h:467
Udma_ChUtcPrms
UDMA UTC channel parameters.
Definition: udma_ch.h:434
Udma_ChTxPrms::burstSize
uint8_t burstSize
Definition: udma_ch.h:323
Udma_ChTxPrms::filterPsWords
uint8_t filterPsWords
Definition: udma_ch.h:287
Udma_ChTxPrms::busPriority
uint8_t busPriority
Definition: udma_ch.h:296
Udma_ChUtcPrms::busPriority
uint8_t busPriority
Definition: udma_ch.h:444
Udma_chGetSwTriggerRegister
void * Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle)
Returns the software trigger register address for the channel.
Udma_ChPrms::chNum
uint32_t chNum
Definition: udma_ch.h:216
Udma_ChPdmaPrms::fifoCnt
uint32_t fifoCnt
Definition: udma_ch.h:530
UdmaChUtcPrms_init
void UdmaChUtcPrms_init(Udma_ChUtcPrms *utcPrms)
Udma_ChUtcPrms structure init function.
Udma_ChTxPrms::addrType
uint8_t addrType
Definition: udma_ch.h:289
Udma_ChRxPrms::fetchWordSize
uint16_t fetchWordSize
Definition: udma_ch.h:363
Udma_ChUtcPrms::burstSize
uint8_t burstSize
Definition: udma_ch.h:454
Udma_chGetTriggerEvent
uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger)
Returns the global trigger event for the channel.
Udma_chGetCqRingNum
uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle)
Returns the default completion ring number to be programmed in descriptor.
UdmaChPrms_init
void UdmaChPrms_init(Udma_ChPrms *chPrms, uint32_t chType)
Udma_ChPrms structure init function.
Udma_ChUtcPrms::chanType
uint8_t chanType
Definition: udma_ch.h:440
Udma_chSetChaining
int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, Udma_ChHandle chainedChHandle, uint32_t trigger)
Chains the trigger channel with the chained channel.
Udma_ChPrms::peerChNum
uint32_t peerChNum
Definition: udma_ch.h:226
UdmaChTxPrms_init
void UdmaChTxPrms_init(Udma_ChTxPrms *txPrms, uint32_t chType)
Udma_ChTxPrms structure init function.
UdmaChRxPrms_init
void UdmaChRxPrms_init(Udma_ChRxPrms *rxPrms, uint32_t chType)
Udma_ChRxPrms structure init function.
Udma_ChUtcPrms::dmaPriority
uint8_t dmaPriority
Definition: udma_ch.h:450
Udma_ChStats::completedByteCnt
uint32_t completedByteCnt
Definition: udma_ch.h:580
Udma_ChRxPrms::dmaPriority
uint8_t dmaPriority
Definition: udma_ch.h:371
Udma_ChStats
UDMA channel statistics.
Definition: udma_ch.h:577
Udma_chConfigUtc
int32_t Udma_chConfigUtc(Udma_ChHandle chHandle, const Udma_ChUtcPrms *utcPrms)
UDMA configure UTC channel.
Udma_ChTxPrms::fifoDepth
uint16_t fifoDepth
Definition: udma_ch.h:308
Udma_chRingRingDbRaw
int32_t Udma_chRingRingDbRaw(Udma_ChHandle chHandle, uint64_t noOfEntries)
Ring Forward door bell.
Udma_clearPeerData
int32_t Udma_clearPeerData(Udma_ChHandle chHandle, uint32_t peerData)
Clear real-time peer data which contains number of bytes written.
Udma_DrvHandle
void * Udma_DrvHandle
UDMA driver handle.
Definition: udma_types.h:65
Udma_ChTxPrms::supressTdCqPkt
uint8_t supressTdCqPkt
Definition: udma_ch.h:342
Udma_ChUtcPrms::busQos
uint8_t busQos
Definition: udma_ch.h:446
Udma_ChUtcPrms::pauseOnError
uint8_t pauseOnError
Definition: udma_ch.h:435
Udma_ChUtcPrms::busOrderId
uint8_t busOrderId
Definition: udma_ch.h:448
Udma_ChTxPrms::pauseOnError
uint8_t pauseOnError
Definition: udma_ch.h:283
Udma_ChRxPrms::flowIdFwRangeCnt
uint16_t flowIdFwRangeCnt
Definition: udma_ch.h:377
Udma_ChPdmaPrms::eol
uint8_t eol
Definition: udma_ch.h:563
Udma_chClose
int32_t Udma_chClose(Udma_ChHandle chHandle)
UDMA close channel.
Udma_ChStats::packetCnt
uint32_t packetCnt
Definition: udma_ch.h:578
Udma_chGetFqRingHandle
Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle)
Returns the default free ring handle of the channel.
Udma_chConfigPdma
int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, const Udma_ChPdmaPrms *pdmaPrms)
UDMA configure PDMA channel (peerChNum as part of Udma_ChPrms) paired with the UDMAP channel.
Udma_ChTxPrms::chanType
uint8_t chanType
Definition: udma_ch.h:292
Udma_ChPrms::appData
void * appData
Definition: udma_ch.h:257
Udma_ChRxPrms::burstSize
uint8_t burstSize
Definition: udma_ch.h:408
Udma_chRingRingRvrDbRaw
int32_t Udma_chRingRingRvrDbRaw(Udma_ChHandle chHandle, uint64_t noOfEntries)
Ring Forward door bell.
Udma_chRingQueueRaw
int32_t Udma_chRingQueueRaw(Udma_ChHandle chHandle, uint8_t *phyDescMem, uint64_t noEleCnt)
Queue TR into channels ring.
Udma_ChTxPrms::dmaPriority
uint8_t dmaPriority
Definition: udma_ch.h:302
Udma_ChRxPrms::busOrderId
uint8_t busOrderId
Definition: udma_ch.h:369
Udma_ChTxPrms::filterEinfo
uint8_t filterEinfo
Definition: udma_ch.h:285
Udma_ChPrms::utcId
uint32_t utcId
Definition: udma_ch.h:244
Udma_ChRxPrms::addrType
uint8_t addrType
Definition: udma_ch.h:358
Udma_ChRxPrms::chanType
uint8_t chanType
Definition: udma_ch.h:361
Udma_ChUtcPrms::addrType
uint8_t addrType
Definition: udma_ch.h:437
Udma_ChPdmaPrms::burst
uint8_t burst
Definition: udma_ch.h:547
Udma_ChTxPrms::busQos
uint8_t busQos
Definition: udma_ch.h:298
Udma_chBreakChaining
int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle, Udma_ChHandle chainedChHandle)
Breaks the chaining by resetting the trigger channel's OES.
Udma_chConfigRx
int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms)
UDMA configure RX channel.
Udma_ChRxPrms::busQos
uint8_t busQos
Definition: udma_ch.h:367
Udma_chGetFqRingNum
uint16_t Udma_chGetFqRingNum(Udma_ChHandle chHandle)
Returns the default free ring number to be programmed in descriptor.