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AM62Ax MCU+ SDK
10.01.00
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AM62Ax MCU+ SDK
10.01.00
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This file contains the prototype of UART driver APIs.
Go to the source code of this file.
Data Structures | |
| struct | UART_Transaction |
| Data structure used with UART_read() and UART_write() More... | |
| struct | UART_Params |
| UART Parameters. More... | |
| struct | UART_Attrs |
| UART instance attributes - used during init time. More... | |
| struct | UART_Object |
| UART driver object. More... | |
| struct | UART_Config |
| UART global configuration array. More... | |
Macros | |
| #define | UART_FIFO_SIZE (64U) |
| Uart FIFO Size. More... | |
| #define | UART_TRANSMITEMPTY_TRIALCOUNT (3000U) |
| Timeout in ms used for TX FIFO empty at the time of delete. Three seconds is more than sufficient to transfer 64 bytes (FIFO size) at the lowest baud rate of 2400. More... | |
| #define | UART_ERROR_COUNT (0x00FFFFFFU) |
| Count Value to check error in the recieved byte More... | |
Transfer Status Code | |
| #define | UART_TRANSFER_STATUS_SUCCESS (0U) |
| Transaction success. More... | |
| #define | UART_TRANSFER_STATUS_TIMEOUT (1U) |
| Time out error. More... | |
| #define | UART_TRANSFER_STATUS_ERROR_BI (2U) |
| Break condition error. More... | |
| #define | UART_TRANSFER_STATUS_ERROR_FE (3U) |
| Framing error. More... | |
| #define | UART_TRANSFER_STATUS_ERROR_PE (4U) |
| Parity error. More... | |
| #define | UART_TRANSFER_STATUS_ERROR_OE (5U) |
| Overrun error. More... | |
| #define | UART_TRANSFER_STATUS_CANCELLED (6U) |
| Cancelled. More... | |
| #define | UART_TRANSFER_STATUS_STARTED (7U) |
| Transaction started. More... | |
| #define | UART_TRANSFER_STATUS_READ_TIMEOUT (8U) |
| Read timeout error. More... | |
| #define | UART_TRANSFER_STATUS_ERROR_INUSE (9U) |
| UART is currently in use. More... | |
| #define | UART_TRANSFER_STATUS_ERROR_OTH (10U) |
| Other errors. More... | |
Transfer Mode | |
This determines whether the driver operates synchronously or asynchronously In UART_TRANSFER_MODE_BLOCKING mode UART_read() and UART_write() blocks code execution until the transaction has completed In UART_TRANSFER_MODE_CALLBACK UART_read() and UART_write() does not block code execution and instead calls a UART_CallbackFxn callback function when the transaction has completed | |
| #define | UART_TRANSFER_MODE_BLOCKING (0U) |
| UART read/write APIs blocks execution. This mode can only be used when called within a Task context. More... | |
| #define | UART_TRANSFER_MODE_CALLBACK (1U) |
| UART read/write APIs does not block code execution and will call a UART_CallbackFxn. This mode can be used in a Task, Swi, or Hwi context. More... | |
UART Read length | |
This enumeration defines the return modes for UART_read(). UART_READ_RETURN_MODE_FULL unblocks or performs a callback when the read buffer has been filled with the number of bytes passed to UART_read(). UART_READ_RETURN_MODE_PARTIAL unblocks or performs a callback whenever a read timeout error occurs on the UART peripheral. The read timeout occurs if the read FIFO is non-empty and no new data has been received for a specific device/baudrate dependent number of clock cycles. This mode can be used when the exact number of bytes to be read is not known. | |
| #define | UART_READ_RETURN_MODE_FULL (0U) |
| Unblock/callback when buffer is full. More... | |
| #define | UART_READ_RETURN_MODE_PARTIAL (1U) |
| Unblock/callback when no new data comes in. More... | |
UART data length | |
| #define | UART_LEN_5 (0U) |
| #define | UART_LEN_6 (1U) |
| #define | UART_LEN_7 (2U) |
| #define | UART_LEN_8 (3U) |
UART stop bits | |
| #define | UART_STOPBITS_1 (0U) |
| #define | UART_STOPBITS_2 (1U) |
UART Parity | |
| #define | UART_PARITY_NONE (0x00U) |
| #define | UART_PARITY_ODD (0x01U) |
| #define | UART_PARITY_EVEN (0x03U) |
| #define | UART_PARITY_FORCED0 (0x07U) |
| #define | UART_PARITY_FORCED1 (0x05U) |
UART Flow Control Type | |
| #define | UART_FCTYPE_NONE (0x00U) |
| #define | UART_FCTYPE_HW (0x02U) |
UART Flow Control Params for RX | |
| #define | UART_FCPARAM_RXNONE (0x00U) |
| #define | UART_FCPARAM_RXXONXOFF_2 (0x01U) |
| #define | UART_FCPARAM_RXXONXOFF_1 (0x02U) |
| #define | UART_FCPARAM_RXXONXOFF_12 (0x03U) |
| #define | UART_FCPARAM_AUTO_RTS (0x40U) |
UART Flow Control Params for TX | |
| #define | UART_FCPARAM_TXNONE (0x00U) |
| #define | UART_FCPARAM_TXXONXOFF_2 (0x04U) |
| #define | UART_FCPARAM_TXXONXOFF_1 (0x08U) |
| #define | UART_FCPARAM_TXXONXOFF_12 (0x0CU) |
| #define | UART_FCPARAM_AUTO_CTS (0x80U) |
UART RX trigger level | |
| #define | UART_RXTRIGLVL_1 (1U) |
| #define | UART_RXTRIGLVL_8 (8U) |
| #define | UART_RXTRIGLVL_16 (16U) |
| #define | UART_RXTRIGLVL_56 (56U) |
| #define | UART_RXTRIGLVL_60 (60U) |
UART TX trigger level | |
| #define | UART_TXTRIGLVL_1 (1U) |
| #define | UART_TXTRIGLVL_8 (8U) |
| #define | UART_TXTRIGLVL_16 (16U) |
| #define | UART_TXTRIGLVL_32 (32U) |
| #define | UART_TXTRIGLVL_56 (56U) |
UART Operational Mode | |
| #define | UART_OPER_MODE_16X (0U) |
| #define | UART_OPER_MODE_SIR (1U) |
| #define | UART_OPER_MODE_16X_AUTO_BAUD (2U) |
| #define | UART_OPER_MODE_13X (3U) |
| #define | UART_OPER_MODE_MIR (4U) |
| #define | UART_OPER_MODE_FIR (5U) |
| #define | UART_OPER_MODE_CIR (6U) |
| #define | UART_OPER_MODE_DISABLED (7U) |
Values indicating the filled status of TX FIFO | |
| #define | UART_TX_FIFO_NOT_FULL |
| #define | UART_TX_FIFO_FULL |
Values related to status of Interrupt souces. | |
| #define | UART_INTID_MODEM_STAT |
| Values pertaining to status of UART Interrupt sources. More... | |
| #define | UART_INTID_TX_THRES_REACH |
| #define | UART_INTID_RX_THRES_REACH |
| #define | UART_INTID_RX_LINE_STAT_ERROR |
| #define | UART_INTID_CHAR_TIMEOUT |
| #define | UART_INTID_XOFF_SPEC_CHAR_DETECT |
| #define | UART_INTID_MODEM_SIG_STATE_CHANGE |
| #define | UART_INTR_PENDING (0U) |
| Values indicating the UART Interrupt pending status. More... | |
| #define | UART_N0_INTR_PENDING (1U) |
Values related to enabling/disabling of Interrupts. | |
| #define | UART_INTR_CTS (UART_IER_CTS_IT_MASK) |
| Values for enabling/disabling the interrupts of UART. More... | |
| #define | UART_INTR_RTS (UART_IER_RTS_IT_MASK) |
| #define | UART_INTR_XOFF (UART_IER_XOFF_IT_MASK) |
| #define | UART_INTR_SLEEPMODE (UART_IER_SLEEP_MODE_MASK) |
| #define | UART_INTR_MODEM_STAT (UART_IER_MODEM_STS_IT_MASK) |
| #define | UART_INTR_LINE_STAT (UART_IER_LINE_STS_IT_MASK) |
| #define | UART_INTR_THR (UART_IER_THR_IT_MASK) |
| #define | UART_INTR_RHR_CTI (UART_IER_RHR_IT_MASK) |
| #define | UART_INTR2_RX_EMPTY (UART_IER2_EN_RXFIFO_EMPTY_MASK) |
| #define | UART_INTR2_TX_EMPTY (UART_IER2_EN_TXFIFO_EMPTY_MASK) |
Values related to Line Status information. | |
| #define | UART_FIFO_PE_FE_BI_DETECTED (UART_LSR_RX_FIFO_STS_MASK) |
| Values pertaining to UART Line Status information. More... | |
| #define | UART_BREAK_DETECTED_ERROR (UART_LSR_RX_BI_MASK) |
| #define | UART_FRAMING_ERROR (UART_LSR_RX_FE_MASK) |
| #define | UART_PARITY_ERROR (UART_LSR_RX_PE_MASK) |
| #define | UART_OVERRUN_ERROR (UART_LSR_RX_OE_MASK) |
Values related to Register Mode Configuration. | |
| #define | UART_REG_CONFIG_MODE_A ((uint32_t) 0x0080) |
| Values to be used while switching between register configuration modes. More... | |
| #define | UART_REG_CONFIG_MODE_B ((uint32_t) 0x00BF) |
| #define | UART_REG_OPERATIONAL_MODE ((uint32_t) 0x007F) |
UART Configration Mode | |
| #define | UART_CONFIG_MODE_POLLED (0x00U) |
| #define | UART_CONFIG_MODE_INTERRUPT (0x01U) |
| #define | UART_CONFIG_MODE_USER_INTR (0x02U) |
| #define | UART_CONFIG_MODE_DMA (0x03U) |
Typedefs | |
| typedef void * | UART_Handle |
| A handle that is returned from a UART_open() call. More... | |
| typedef void(* | UART_CallbackFxn) (UART_Handle handle, UART_Transaction *transaction) |
| The definition of a callback function used by the UART driver when used in UART_TRANSFER_MODE_CALLBACK. More... | |
Functions | |
| void | UART_init (void) |
| This function initializes the UART module. More... | |
| void | UART_deinit (void) |
| This function de-initializes the UART module. More... | |
| UART_Handle | UART_open (uint32_t index, const UART_Params *prms) |
| This function opens a given UART peripheral. More... | |
| void | UART_close (UART_Handle handle) |
| Function to close a UART peripheral specified by the UART handle. More... | |
| int32_t | UART_write (UART_Handle handle, UART_Transaction *trans) |
| Function to perform UART write operation. More... | |
| int32_t | UART_read (UART_Handle handle, UART_Transaction *trans) |
| Function to perform UART read operation. More... | |
| int32_t | UART_writeCancel (UART_Handle handle, UART_Transaction *trans) |
| Function to perform UART canceling of current write transaction. More... | |
| int32_t | UART_readCancel (UART_Handle handle, UART_Transaction *trans) |
| Function to perform UART canceling of current read transaction. More... | |
| UART_Handle | UART_getHandle (uint32_t index) |
| Function to return a open'ed UART handle given a UART instance index. More... | |
| void | UART_flushTxFifo (UART_Handle handle) |
| Function to flush a TX FIFO of peripheral specified by the UART handle. More... | |
| static void | UART_Params_init (UART_Params *prms) |
| Function to initialize the UART_Params struct to its defaults. More... | |
| static void | UART_Transaction_init (UART_Transaction *trans) |
| Function to initialize the UART_Transaction struct to its defaults. More... | |
| uint32_t | UART_getBaseAddr (UART_Handle handle) |
| Function to get base address of UART instance of a particular handle. More... | |
| void | UART_enableLoopbackMode (uint32_t baseAddr) |
| Function to enable loopback mode. This function is for internal use. Not recommended for customers to use. More... | |
| void | UART_disableLoopbackMode (uint32_t baseAddr) |
| Function to disable loopback mode. This function is for internal use. Not recommended for customers to use. More... | |
| static void | UART_putChar (uint32_t baseAddr, uint8_t byteTx) |
| This API writes a byte to the Transmitter FIFO without checking for the emptiness of the Transmitter FIFO or the Transmitter Shift Register(TSR). More... | |
| static uint32_t | UART_getChar (uint32_t baseAddr, uint8_t *pChar) |
| This API reads a byte from the Receiver Buffer Register (RBR). It checks once if any character is ready to be read. More... | |
| static void | UART_intrEnable (uint32_t baseAddr, uint32_t intrFlag) |
| This API enables the specified interrupts in the UART mode of operation. More... | |
| static void | UART_intrDisable (uint32_t baseAddr, uint32_t intrFlag) |
| This API disables the specified interrupts in the UART mode of operation. More... | |
| static void | UART_intr2Enable (uint32_t baseAddr, uint32_t intrFlag) |
| This API enables the specified interrupts in the UART mode of operation for IER2. More... | |
| static void | UART_intr2Disable (uint32_t baseAddr, uint32_t intrFlag) |
| This API disables the specified interrupts in the UART mode of operation for IER2. More... | |
| static uint32_t | UART_getIntrIdentityStatus (uint32_t baseAddr) |
| This API determines the UART Interrupt Status. More... | |
| static uint32_t | UART_getIntr2Status (uint32_t baseAddr) |
| This API determines the UART Interrupt Status 2. More... | |
| static uint32_t | UART_checkCharsAvailInFifo (uint32_t baseAddr) |
| This API checks if the RX FIFO (or RHR in non-FIFO mode) has atleast one byte of data to be read. More... | |
| static uint32_t | UART_readLineStatus (uint32_t baseAddr) |
| This API reads the line status register value. More... | |
| static uint8_t | UART_getCharFifo (uint32_t baseAddr, uint8_t *readBuf) |
| This API reads the data present at the top of the RX FIFO, that is, the data in the Receive Holding Register(RHR). However before reading the data from RHR, it checks for RX error. More... | |
Variables | |
| UART_Config | gUartConfig [] |
| Externally defined driver configuration array. More... | |
| uint32_t | gUartConfigNum |
| Externally defined driver configuration array size. More... | |
1.8.20