DDR_EccRegion Struct Reference

Detailed Description

DDR Inline ECC region The structure specifies the DDR inline ECC region start and End address.

Data Fields
uint64_t	ddrEccStart0
uint64_t	ddrEccEnd0
uint64_t	ddrEccPrimeEnd0
uint64_t	ddrEccStart1
uint64_t	ddrEccEnd1
uint64_t	ddrEccPrimeEnd1
uint64_t	ddrEccStart2
uint64_t	ddrEccEnd2
uint64_t	ddrEccPrimeEnd2

Field Documentation

ddrEccStart0

uint64_t DDR_EccRegion::ddrEccStart0

DDR inline ECC region-0 start address

ddrEccEnd0

uint64_t DDR_EccRegion::ddrEccEnd0

DDR inline ECC region-0 end address

ddrEccPrimeEnd0

uint64_t DDR_EccRegion::ddrEccPrimeEnd0

DDR inline ECC region-0 primed end address

ddrEccStart1

uint64_t DDR_EccRegion::ddrEccStart1

DDR inline ECC region-1 start address

ddrEccEnd1

uint64_t DDR_EccRegion::ddrEccEnd1

DDR inline ECC region-1 end address

ddrEccPrimeEnd1

uint64_t DDR_EccRegion::ddrEccPrimeEnd1

DDR inline ECC region-1 primed end address

ddrEccStart2

uint64_t DDR_EccRegion::ddrEccStart2

DDR inline ECC region-2 start address

ddrEccEnd2

uint64_t DDR_EccRegion::ddrEccEnd2

DDR inline ECC region-2 end address

ddrEccPrimeEnd2

uint64_t DDR_EccRegion::ddrEccPrimeEnd2

DDR inline ECC region-2 primed end address