CSL_UdmapTR5 Struct Reference

Detailed Description

CSL_UdmapTR5 specifies a Type 5 (Four dimensional cache warm) Transfer Request.

Data Fields
uint32_t	flags
uint16_t	icnt0
uint16_t	icnt1
uint64_t	addr
int32_t	dim1
uint16_t	icnt2
uint16_t	icnt3
int32_t	dim2
int32_t	dim3
uint32_t	cacheflags

Field Documentation

flags

uint32_t CSL_UdmapTR5::flags

Specifies type of TR and how the TR should be handled. It also supports the TR triggering and output events.

icnt0

uint16_t CSL_UdmapTR5::icnt0

Total loop iteration count for level 0 (innermost)

icnt1

uint16_t CSL_UdmapTR5::icnt1

Total loop iteration count for level 1

addr

uint64_t CSL_UdmapTR5::addr

Starting address for the source data or destination data if it is a half duplex write

dim1

int32_t CSL_UdmapTR5::dim1

Signed dimension for loop level 1 for the source data

icnt2

uint16_t CSL_UdmapTR5::icnt2

Total loop iteration count for level 2

icnt3

uint16_t CSL_UdmapTR5::icnt3

Total loop iteration count for level 3 (outermost)

dim2

int32_t CSL_UdmapTR5::dim2

Signed dimension for loop level 2

dim3

int32_t CSL_UdmapTR5::dim3

Signed dimension for loop level 3

cacheflags

uint32_t CSL_UdmapTR5::cacheflags

Tells how the data is formatted either between the input and the output or if the data should use different addressing schemes or sizes